LT1122 - Fast Settling, JFET Input Operational Amplifier

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LT1122
Fast Settling, JFET Input
Operational Amplifier
FEATURES
DESCRIPTION
100% Tested Settling Time340ns Typ
to 1mV at Sum Node, 10V Step 540ns Max
Tested with Fixed Feedback Capacitor
n Slew Rate 60V/µs Min
n Gain-Bandwidth Product 14MHz
n Power Bandwidth (20V
P-P)1.2 MHz
n Unity-Gain Stable; Phase Margin
60°
n Input Offset Voltage
600µV Max
n Input Bias Current 25°C
75pA Max
70°C 600pA Max
■ Input Offset Current 25°C
40pA Max
70°C 150pA Max
■ Low Distortion
The LT®1122 JFET input operational amplifier combines
high speed and precision performance.
n
APPLICATIONS
n
n
n
n
n
n
n
n
A unique poly-gate JFET process minimizes gate series
resistance and gate-to-drain capacitance, facilitating wide
bandwidth performance, without degrading JFET transistor matching.
It slews at 80V/µs and settles in 340ns. The LT1122 is
internally compensated to be unity-gain stable, yet it has
a bandwidth of 14MHz at a supply current of only 7mA. Its
speed makes the LT1122 an ideal choice for fast settling
12-bit data conversion and acquisition systems.
The LT1122 offset voltage of 120µV, and voltage gain of
500,000 also support the 12-bit accurate applications.
The input bias current of 10pA and offset current of 4pA
combined with its speed allow the LT1122 to be used in
such applications as high speed sample and hold amplifiers, peak detectors, and integrators.
Fast 12-Bit D/A Output Amplifiers
High Speed Buffers
Fast Sample-and-Hold Amplifiers
High Speed Integrators
Voltage to Frequency Converters
Active Filters
Log Amplifiers
Peak Detectors
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and C-Load
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
TYPICAL APPLICATION
12-Bit Voltage Output D/A Converter
CF
2
0mA TO 2mA
OR 4mA
LT1122
3
12-BIT CURRENT OUTPUT D/A CONVERTER
CF = 5pF TO 17pF
(DEPENDING ON D/A CONVERTER USED)
–
+
6
VOUT
0V TO 10V
LT1122•TA01
5V/DIV
+
Large-Scale Response
200ns/DIV
AV = –1
1122 TA07
1122fb
For more information www.linear.com/LT1122
1
LT1122
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage....................................................... ± 20V
Differential Input Voltage........................................ ± 40V
Input Voltage........................................................... ± 20V
Output Short Circuit Duration........................... Indefinite
Lead Temperature (Soldering, 10 sec.)................... 300°C
Operating Temperature Range
LT1122AM/BM/CM/DM (OBSOLETE)... –55°C to 125°C
LT1122AC/BC/CC/DC/CS/DS..................–40°C to 85°C
Storage Temperature Range
All Devices........................................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
7
SPEED BOOST/
OVERCOMP
V+
+IN 3
6
OUT
V– 4
5
VOS TRIM
VOS
1
TRIM
–IN 2
8
TOP VIEW
VOS
1
TRIM
–IN 2
7
SPEED BOOST/
OVERCOMP
V+
+IN 3
6
OUT
V– 4
5
VOS TRIM
N8 PACKAGE
8-LEAD PDIP
8
TJMAX = 150°C, θJA = 130°C/W
S8 PACKAGE
8-LEAD PLASTIC SO
OBSOLETE PACKAGE
TJMAX = 150°C, θJA = 190°C/W
J8 PACKAGE 8-LEAD HERMETIC DIP
TJMAX = 175°C, θJA = 100°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT1122ACN8#PBF
LT1122ACN8#TRPBF
LT1122ACN8
8-Lead Plastic DIP
–40°C to 85°C
LT1122BCN8#PBF
LT1122BCN8#TRPBF
LT1122BCN8
8-Lead Plastic DIP
–40°C to 85°C
LT1122CCN8#PBF
LT1122CCN8#TRPBF
LT1122CCN8
8-Lead Plastic DIP
–40°C to 85°C
LT1122DCN8#PBF
LT1122DCN8#TRPBF
LT1122DCN8
8-Lead Plastic DIP
–40°C to 85°C
LT1122CS8#PBF
LT1122CS8#TRPBF
1122C
8-Lead Plastic SO
–40°C to 85°C
LT1122DS8#PBF
LT1122DS8#TRPBF
1122D
8-Lead Plastic SO
–40°C to 85°C
LT1122AMJ8#PBF
LT1122AMJ8#TRPBF
LT1122AMJ8
8-Lead Hermetic DIP
–55°C to 125°C
LT1122BMJ8#PBF
LT1122BMJ8#TRPBF
LT1122BMJ8
8-Lead Hermetic DIP
–55°C to 125°C
LT1122CMJ8#PBF
LT1122CMJ8#TRPBF
LT1122CMJ8
8-Lead Hermetic DIP
–55°C to 125°C
LT1122DMJ8#PBF
LT1122DMJ8#TRPBF
LT1122DMJ8
8-Lead Hermetic DIP
–55°C to 125°C
LT1122ACJ8#PBF
LT1122ACJ8#TRPBF
LT1122ACJ8
8-Lead Hermetic DIP
–40°C to 85°C
LT1122BCJ8#PBF
LT1122BCJ8#TRPBF
LT1122BCJ8
8-Lead Hermetic DIP
–40°C to 85°C
LT1122CCJ8#PBF
LT1122CCJ8#TRPBF
LT1122CCJ8
8-Lead Hermetic DIP
–40°C to 85°C
LT1122DCJ8#PBF
LT1122DCJ8#TRPBF
LT1122DCJ8
8-Lead Hermetic DIP
–40°C to 85°C
OBSOLETE PACKAGE
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part markings, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1122fb
2
For more information www.linear.com/LT1122
LT1122
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V unless otherwise noted. (Note 2)
SYMBOL PARAMETER
CONDITIONS
LT1122AM/BM
LT1122AC/BC
MIN TYP MAX
LT1122CM/DM
LT1122CC/DC
LT1122CS/DS
MIN TYP MAX
UNITS
VOS
Input Offset Voltage
120
600
130
900
µV
IOS
Input Offset Current
4
40
5
50
pA
Input Bias Current
10
75
12
100
pA
IB
Input Resistance
Differential
Common Mode
VCM = –10V to 8V
VCM = 8V to 11V
Input Capacitance
SR
Slew Rate
AV = – 1
60
Settling Time (Note 2)
10V to 0V, – 10V to 0V
100% Tested: A- and C-Grades to 1mV at Sum Node
B- and D-Grades to 1mV at Sum Node
All Grades to 0.5mV at Sum Node
GBW
Gain-Bandwidth Product Power
Bandwidth
VOUT = 20VP-P
AVOL
Large-Signal Voltage Gain
CMRR
Common-Mode Rejection Ratio VCM = ±10V
Input Voltage Range
(Note 4)
PSRR
Power Supply Rejection Ratio
VS = ±10V to ±18V
Input Noise Voltage
0.1Hz to 10Hz
Input Noise Voltage Density
VOUT = ±10V, RL = 2kΩ
VOUT = ±10V, RL = 600Ω
1012
1012
1011
1012
1012
1011
Ω
Ω
Ω
4
4
pF
75
V/µs
80
340
350
450
50
540
350
360
470
14
1.2
590
ns
ns
ns
13
1.1
MHz
MHz
180
130
500
250
150
110
450
220
V/mV
V/mV
83
99
80
98
dB
±10.5
±11
±10.5
±11
V
86
103
82
101
dB
3.0
3.3
µVP-P
fO = 100Hz
fO = 10kHz
25
14
27
15
nV/√Hz
nV/√Hz
Input Noise Current Density
fO = 100Hz, fO = 10kHz
2
2
fA/√Hz
VOUT
Output Voltage Swing
RL = 2kΩ
RL = 600Ω
IS
Supply Current
±12 ±12.5
±11.5 ±12
7.5
Minimum Supply Voltage
(Note 5)
±5
Offset Adjustment Range
RPOT ≥ 10k, Wiper to V+
±4
±12 ±12.5
±11.5 ±12
10
7.8
±5
±10
±4
V
V
11
mA
V
±10
mV
1122fb
For more information www.linear.com/LT1122
3
LT1122
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at 0°C ≤ TA ≤ 70°C. VS = ±15V, VCM = 0V. (Note 2)
SYMBOL PARAMETER
CONDITIONS
LT1122AC/BC
MIN
TYP
MAX
LT1122CC/DC
LT1122CS/DS
MIN
TYP
MAX
UNITS
Input Offset Voltage
l
350
1400
400
2000
Average Temperature Coefficient of
Input Offset Voltage
l
5
18
6
25
µV/°C
IOS
Input Offset Current
l
12
150
15
200
pA
IB
Input Bias Current
l
80
600
90
800
pA
AVOL
Large-Signal Voltage Gain
VOUT = ±10V, RL ≥ 2kΩ
l
120
380
100
340
V/mV
CMRR
Common-Mode Rejection Ratio
VCM = ±10V
l
82
98
78
96
dB
Power Supply Rejection Ratio
VS = ±10V to ±17V
VOS
PSRR
Input Voltage Range
µV
l
84
101
80
99
dB
l
±10
±10.8
±10
±10.8
V
VOUT
Output Voltage Swing
RL = 2kΩ
l
±11.5
±12.4
±11.5
±12.4
SR
Slew Rate
AV = –1
l
50
70
40
65
V
V/µs
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications
are at –55°C ≤ TA ≤ 125°C. VS = ±15V, VCM = 0V. (Note 2)
SYMBOL PARAMETER
VOS
CONDITIONS
LT1122AM/BM
MIN
TYP
MAX
LT1122CS/DS
MIN
TYP
MAX
UNITS
Input Offset Voltage
l
650
2400
800
3400
µV
Average Temperature Coefficient of
Input Offset Voltage
l
6
18
7
25
µV/°C
IOS
Input Offset Current
l
0.5
6
0.6
9
nA
IB
Input Bias Current
l
6
25
7
35
nA
AVOL
Large-Signal Voltage Gain
VOUT = ±10V, RL ≥ 2kΩ
l
70
230
60
200
V/mV
CMRR
Common-Mode Rejection Ratio
VCM = ±10V
l
80
97
76
94
dB
Power Supply Rejection Ratio
VS = ±10V to ±17V
PSRR
Input Voltage Range
l
83
100
78
98
dB
l
±10
±10.5
±10
±10.5
V
VOUT
Output Voltage Swing
RL = 2kΩ
l
±11.3
±12.1
±11.3
±12.1
SR
Slew Rate
AV = –1
l
45
60
35
55
V
V/µs
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications
are at –40°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V. (Note 6)
SYMBOL PARAMETER
CONDITIONS
LT1122AM/BM
MIN
TYP
MAX
LT1122CS/DS
MIN
TYP
MAX
UNITS
Input Offset Voltage
l
450
1900
500
2700
Average Temperature Coefficient of
Input Offset Voltage
l
6
20
7
28
IOS
Input Offset Current
l
30
600
40
900
pA
IB
Input Bias Current
l
230
2000
260
2700
pA
AVOL
Large-Signal Voltage Gain
VOUT = ±10V, RL ≥ 2kΩ
l
95
340
80
300
V/mV
CMRR
Common-Mode Rejection Ratio
VCM = ±10V
l
80
98
76
96
dB
PSRR
Power Supply Rejection Ratio
VS = ±10V to ±17V
l
83
100
78
98
dB
l
±10
±10.6
±10
±10.6
V
VOUT
Output Voltage Swing
RL = 2kΩ
l
±11.3
±12.2
±11.3
±12.2
V
SR
Slew Rate
AV = –1
l
45
60
35
60
VOS
Input Voltage Range
µV
µV/°C
V/µs
1122fb
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For more information www.linear.com/LT1122
LT1122
ELECTRICAL CHARACTERISTICS
Note 4: Input voltage range functionality is assured by testing offset
voltage at the input voltage range limits to a maximum of 4mV
(A, B grades), to 5.7mV (C, D grades).
Note 5: Minimum supply voltage is tested by measuring offset voltage to
7mV maximum at ±5V supplies.
Note 6: The LT1122 is not tested and not quality-assurance-sampled
at –40°C and at 85°C. These specifications are guaranteed by design,
correlation and/or inference from –55°C, 0°C, 25°C, 70°C and/or 125°C
tests.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT1122 is measured in an automated tester in less than one
second after application of power. Depending on the package used, power
dissipation, heat sinking, and air flow conditions, the fully warmed up chip
temperature can be 10°C to 50°C higher than the ambient temperature.
Note 3: Settling time is 100% tested for A- and C-grades using the settling
time test circuit shown. This test is not included in quality assurance
sample testing.
Settling Time Test Fixture
DEVICE UNDER TEST
5pF
10V
(REGULATED)
7
1
51Ω
6
1
16
2
–
2
15
3
14
7
LT1122
3
5
–15V
4
1
HA5002
5
+
6
4
–15V
5.1k
1%
5.1k*
1%
V IN
(MEASURE INPUT
PULSE HERE)
13
LTC201A
3
2
5
12
6
11
7
10
8
9
15V
+
15V
0.1µF
7
1k
1µF TANT
TYPICAL SUPPLY
BYPASSING FOR
EACH AMP/BUFFER
SETTLING
TIME OUTPUT
(20 TIMES SUM
NODE OUTPUT)
1N5712
7
15V
NO CONNECTION ON PINS
10, 11, 12, 14, AND 15
–10V
(REGULATED)
6
+
HA5002
2
LT1223
4
3 51Ω 8
1
–
2
1.5k –15V
–15V
4 51Ω
SUMMING
NODE
OUTPUT
5
79Ω
1N5712
–15V
0.1µF
+
TTL
IN
4
15V
2k
1%
51Ω
8
2
4
74LS00
GROUND ALL
OTHER INPUTS
2k
1%
15V
1µF TANT
*THIS RESISTOR CAN BE ADJUSTED TO
NULL OUT ALL OFFSETS AT THE SETTLING
TIME OUTPUT. THE AUTOMATED TESTER
USES A SEPARATE AUTOZERO CIRCUIT.
LT1122•TA02
1122fb
For more information www.linear.com/LT1122
5
LT1122
TYPICAL PERFORMANCE CHARACTERISTICS
Settling Time
(Input from 0V to 10V)
1mV/DIV AT SUM NODE
1mV/DIV AT SUM NODE
Settling Time
(Input from 10V to 0V)
1mV/DIV AT SUM NODE
Settling Time
(Input from –10V to 0V)
100ns/DIV
1122 G01
100ns/DIV
Settling Time
(Input from 0V to –10V)
100ns/DIV
1122 G02
1122 G03
Undistorted Output Swing
vs Frequency
Large-Signal Response
PEAK-TO-PEAK OUTPUT SWING (V)
5V/DIV
1mV/DIV AT SUM NODE
30
100ns/DIV
AV = 1
1122 G04
200ns/DIV
1122 G05
VS = ±15V
TA = 25°C
25
20
15
10
5
0
100k
1M
10M
100M
FREQUENCY (Hz)
1122 TPC01
Voltage Gain vs Frequency
80
VS = ±15V
TA = 25°C
100
100
20
GAIN (dB)
GAIN (dB)
40
20
140
10
160
180
0
200
0
VS = ±15V
10 TA = 25°C
C L = 15pF
–20
–40
1
10
100
1k
10k 100k 1M 10M 100M
FREQUENCY (Hz)
1M
10M
100M
VS = ±15V
TA = 25°C
100
80
60
40
20
0
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
1122 TPC02
PHASE SHIFT (DEGREES)
120
80
60
120
COMMON-MODE REJECTION RATIO (dB)
120
Common-Mode Rejection
vs Frequency
Gain, Phase vs Frequency
1122 TPC03
1122 TPC04
1122fb
6
For more information www.linear.com/LT1122
LT1122
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Input Offset
Voltage
NUMBER OF UNITS
600
400
200
0
–900
–100 100
–500
100k
10k
3k
BIAS
CURRENT
1k
300
100
30
OFFSET
CURRENT
10
3
1
900
500
120
VS = ±15V
30k VCM = 0V
25
0
50
75
VOLTAGE NOISE DENSITY (nV/√Hz)
CHANGE IN OFFSET VOLTAGE (µV)
SO PACKAGE
N PACKAGE
150
J PACKAGE
100
50
IN STILL AIR (SO PACKAGE
SOLDERED ONTO BOARD)
1
2
1
3
10
100 300
1k
3k
10k
AV = –10
AV = –1
100
1k
10k 20k
FREQUENCY (Hz)
15
4
6
8
10
1122 TPC10
0.1
0.01
AV = 50
AV = 10
0.001
0.0001
20
AV =1
100
T A = 25°C
VS = ±15V
Z L = 5k//15pF
VO = 7V RMS
1k
10k 20k
Intermodulation Distortion
(CCIF Method) vs Frequency
LT1122 and LF156*
0.1
0.01
VS = ±15V
T A = 25°C
AV = –10
VO = 7V RMS
Z L = 5k//15pF
LF156
0.001
LT1122
0.0001
3k
10k
20k
FREQUENCY (Hz)
FREQUENCY (Hz)
1122 TPC11
10
5
0
TIME (SECONDS)
Total Harmonic Distortion + Noise
vs Frequency Noninverting Gain
AV = –50
2
0
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION + NOISE (%)
TOTAL HARMONIC DISTORTION + NOISE (%)
30
Total Harmonic Distortion + Noise
vs Frequency Inverting Gain
0.01
5
1122 TPC07
100
10
3
T A = 25°C
VS = ±15V
Z L = 5k//15pF
VO = 7V RMS
10
0.1Hz to 10Hz Noise
1122 TPC09
0.0001
20
15
COMMON-MODE INPUT VOLTAGE (V)
1122 TPC08
0.001
0
VS = ±15V
TA = 25°C
TIME AFTER POWER ON (MINUTES)
0.1
OFFSET
CURRENT
20
Noise Spectrum
1000
200
0
40
NOISE VOLTAGE (1µV/DIV)
Warm-Up Drift
VS = ±15V
TA = 25°C
BIAS
CURRENT
60
1122 TPC06
1122 TPC05
1
80
125
100
VS = ±15V
TA = 25°C
(NOT-WARMED UP)
100
CHIP TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (µV)
250
INPUT BIAS AND OFFSET CURRENT (pA)
VS = ±15V
TA = 25°C
(NOT WARMED UP)
Bias and Offset Currents Over the
Common-Mode Range
INTERMODULATION DISTORTION (IMD) (%)
3370 UNITS TESTED
IN ALL PACKAGES
INPUT BIAS AND OFFSET CURRENTS (pA)
800
Input Bias and Offset Currents
Over Temperature
1122 TPC12
*SEE LT1115 DATA SHEET FOR DEFINITION
OF CCIF TESTING
1122 TPC13
1122fb
For more information www.linear.com/LT1122
7
LT1122
APPLICATIONS INFORMATION
Settling time test circuits shown on some competitive
devices’ data sheets require:
1.A “flat top” pulse generator. Unfortunately, flat top pulse
generators are not commercially available.
2.A variable feedback capacitor around the device under
test. This capacitor varies over a four-to-one range.
Presumably, as each op amp is measured for settling
time, the capacitor is fine tuned to optimize settling
time for that particular device.
The power supply connections to the LT1122 must maintain
a low impedance to ground over a bandwidth of 20MHz.
This is especially important when driving a significant
resistive or capacitive load, since all current delivered to
the load comes from the power supplies. Multiple high
quality bypass capacitors are recommended for each power
supply line in any critical application. A 0.1µF ceramic and
a 1µF electrolytic capacitor, as shown, placed as close as
possible to the amplifier (with short lead lengths to power
supply common) will assure adequate high frequency
bypassing, in most applications.
3.A small inductor load to optimize settling.
V+
The LT1122’s settling time is 100% tested in the test circuit
shown. No “flat top” pulse generator is required. The test
circuit can be readily constructed, using commercially
available ICs. Of course, standard high frequency board
construction techniques should be followed. All LT1122s
are measured with a constant feedback capacitor. No fine
tuning is required.
Speed Boost/Overcompensation Terminal
Pin 8 of the LT1122 can be used to change the input stage
operating current of the device. Shorting Pin 8 to the positive supply (Pin 7) increases slew rate and bandwidth by
about 25%, but at the expense of a reduction in phase
margin by approximately 18 degrees. Unity-gain capacitive
load handling decreases from typically 500pF to 100pF.
Conversely, connecting a 15k resistor from Pin 8 to ground
pulls 1mA out of Pin 8 (with V+ = 15V). This reduces slew
rate and bandwidth by 25%. Phase margin and capacitive
load handling improve; the latter typically increasing to
800pF.
2
3
+
7
–
1µF
0.1µF
1µF
0.1µF
6
LT1122
+
4
+
Settling Time Measurements
V–
1122 TA03
When the feedback around the op amp is resistive (RF),
a pole will be created with RF, the source resistance and
capacitance (RS, CS), and the amplifier input capacitance
(CIN ≈ 4pF). In low closed-loop gain configurations and
with RS and RF in the kilohm range, this pole can create
excess phase shift and even oscillation. A small capacitor (CF) in parallel with RF eliminates this problem. With
RS (CS + CIN) = RFCF, the effect of the feedback pole is
completely removed.
CF
RF
High Speed Operation
–
As with most high speed amplifiers, care should be
taken with supply decoupling, lead dress and component
placement.
RS
CS
CIN
OUTPUT
+
1122 TA04
1122fb
8
For more information www.linear.com/LT1122
LT1122
TYPICAL APPLICATIONS
Quartz Stabilized Oscillator With 9ppm Distortion
OUTPUT
–15V
4.7k
LT1004
2.5V
15V
+
LT1122
430pF
50k
4.7k
LT1010
–
DISTORTION
TRIM
5k
+
4.7k
47k
4kHz
J CUT
OUTPUT
AMPLITUDE 10µF
TRIM
MOUNT IN CLOSE
PROXIMITY
–
LT1006
+
560k
470W
15V
2k
–
1M
15V
LT1122
+
GROUND CRYSTAL CASE
560k
= VACTEC VTL5C10 OR
CLAIREX CLM410
–15V
1/4 LTC201
Q1
2N3904
100k
= 1N4148
1122 TA05
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9
LT1122
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
N Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
.255 ±.015*
(6.477 ±0.381)
.300 – .325
(7.620 – 8.255)
.008 – .015
(0.203 – 0.381)
(
+.035
.325 –.015
8.255
+0.889
–0.381
)
.045 – .065
(1.143 – 1.651)
.065
(1.651)
TYP
.100
(2.54)
BSC
.130 ±.005
(3.302 ±0.127)
.120
(3.048) .020
MIN
(0.508)
MIN
.018 ±.003
N8 REV I 0711
(0.457 ±0.076)
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
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LT1122
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
J8 Package
3-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
CORNER LEADS OPTION
(4 PLCS)
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.005
(0.127)
MIN
.405
(10.287)
MAX
8
7
6
5
.025
(0.635)
RAD TYP
.220 – .310
(5.588 – 7.874)
1
.300 BSC
(7.62 BSC)
2
3
4
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.008 – .018
(0.203 – 0.457)
0° – 15°
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
.045 – .065
(1.143 – 1.651)
.014 – .026
(0.360 – 0.660)
.100
(2.54)
BSC
.125
3.175
MIN
J8 0801
OBSOLETE PACKAGE
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11
LT1122
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
.245
MIN
.160 ±.005
.010 – .020
× 45°
(0.254 – 0.508)
NOTE:
1. DIMENSIONS IN
5
.150 – .157
(3.810 – 3.988)
NOTE 3
1
RECOMMENDED SOLDER PAD LAYOUT
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
6
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
.008 – .010
(0.203 – 0.254)
7
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 REV G 0212
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LT1122
REVISION HISTORY
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
B
02/14
Updated data sheet to current standards. New Order Information Table, Package Descriptions
PAGE NUMBER
2, 10-12
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT1122
13
LT1122
TYPICAL APPLICATION
Wide-Band, Filtered, Full Wave Rectifier
200k
1%
1µF
200k
1%
20k
1%
VIN
20k
1%
100k
1%
1k
50k
–
EOUT DC
LT1122
–
LT1122
+
+
OUTPUT DC = RMS VALUE OF INPUT
BANDWIDTH WITH 10VP-P INPUT = 2MHz
1122 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1022
High Speed Precision JFET Op Amp
23V/µs Min Slew Rate, 250µV VOS
LT1055/LT1056
Precision High Speed JFET Op Amps
16V/µs Slew Rate, 150µV VOS
LT1464
1MHz C-Load™ Stable JFET Op Amp
Capacitive Loads Up to 10nF
LTC 6244
50MHz Low Noise CMOS Op Amp
1pA IB, 100µV Max VOS, 1.5µVP-P, 0.1Hz to 10Hz Noise
®
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14 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT1122
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT1122
LT 0214 REV B • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 1991
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