27th European Photovoltaic Solar Energy Conference and Exhibition
FULLY SOLDERABLE LARGE-AREA SCREEN-PRINTED AL-BSF P-TYPE MC-SI SOLAR CELLS
FROM 100 % SOLAR GRADE FEEDSTOCK YIELDING  > 17 %:
CHALLENGES AND POTENTIAL ON CELL AND MODULE LEVEL
Fabian Fertig1*), Karin Krauß1, Ino Geisemeyer1, Juliane Broisch1, Hannes Höffler1, Jan Ove Odden2,
Anne-Karin Soiland2 and Stefan Rein1
1
Fraunhofer ISE, Heidenhofstrasse 2, 79110 Freiburg, Germany
2
Elkem Solar AS, Fiskaavn 100, 4621 Kristiansand, Norway
*)
Phone: +49 761 4588 5482, Fax: +49 761 4588 9250, Email: fabian.fertig@ise.fraunhofer.de
ABSTRACT: A promising alternative to purifying metallurgical grade silicon via the gaseous phase is purification by
for example slag refinement, leaching and solidification yielding so-called solar grade silicon (SoG-Si). Despite
several advantages of SoG-Si, a wider distribution in PV industry has so far been hindered by reservations towards
efficiency potential, reverse bias behaviour, module reliability and material yield. We achieved peak efficiencies over
17 % on standard (15.6×15.6 cm2) industrial fully-solderable screen-printed aluminium back-surface field (SP AlBSF) solar cells on multi-crystalline silicon (mc-Si) wafers from 100 % Elkem Solar Silicon (ESSTM). To our
knowledge, this is amongst the highest efficiencies reported for SP Al-BSF cells on 100 % SoG-mc-Si so far. The
average efficiency over an entire brick is 16.6 % which is the same value as for a reference brick from pure polysilicon feedstock. The reverse bias behaviour of all cells appears to be well suited for standard industrial module
integration concerning global current density and locally resolved power dissipation behaviour.
Keywords: Multicrystalline Silicon, Compensation, Metallurgical-Grade, Diode Breakdown, Hot Spots, Shading
1
2
INTRODUCTION
Although the price of poly-silicon has decreased
dramatically from 500 USD/kg in 2008 [1] to 22 USD/kg
in 2012 [2], it is still a significant cost driver in silicon
PV accounting for approximately 16 % of solar module
manufacturing cost according to recent cost analyses data
published, e.g., by Centrotherm in 2012 [3,4]. Out of this
share of 16 %, a cost percentage of 83 % is attributed to
process-related expenses of purifying metallurgical-grade
silicon.
A promising alternative to the standard Siemens
process of purifying metallurgical-grade silicon via the
gaseous phase is purification by other techniques such as
slag refinement, leaching and solidification yielding socalled solar-grade silicon (SoG-Si). No standard process
for gaining SoG-Si via a metallurgical refining route has
been established so far, which leads to strong variations
in the material quality from different suppliers. However,
even when almost all contaminants can be cleaned out of
the feedstock, phosphorus is difficult to eliminate via the
metallurgical route leaving dopant compensation as the
dominating challenging phenomenon in SoG-Si. Despite
several advantages of SoG-Si towards its Siemensprocess counterpart such as a reduced energy
consumption by a factor of 4 and a reduced investment
cost for production equipment by a factor of 3 [5-9], three
main arguments are so far hindering a wider distribution
in industry (processing yield has been shown to be no
limiting factor [10,11]): Compensation is assumed (i) to
limit the achievable solar cell and module efficiency,
including possibly higher light-induced degradation
(LID), (ii) to cause an inferior reverse bias behaviour,
i.e., it is suspected to affect module reliability due to
possibly critical hot-spot heating and (iii) to lead to a p/ntype change-over during crystallisation which means that
only a part of a brick could be used for cell processing.
The purpose of this work is to address these points on
standard industrial screen-printed aluminium backsurface field (SP Al-BSF) solar cells from p-type mc-Si
crystallised from Elkem Solar Silicon (ESSTM) feedstock.
Elkem Solar’s purification process includes slag
treatment, wet chemical leaching and directional
solidification [5-7].
APPROACH
Base resistivity b (cm)
2.1 Experimental design
To evaluate feedstock-dependent effects on
efficiency, LID and hot spot endurance, two blocks are
crystallised in the same furnace at an industrial crystal
grower: one from 100 % ESSTM feedstock and one from
highly pure, virgin-grade poly silicon feedstock. To
enable a meaningful comparison, similar resistivity levels
across the bricks are targeted. From both blocks, one
edge brick of similar positions within the blocks is cut
into 15.6×15.6 cm2 full square wafers. A selection of
wafers covering the entire commercially utilizable brick
height of both bricks is used for solar cell manufacturing.
Furthermore, reference virgin-grade wafers from an
industrial supplier in the same base resistivity range are
included into the experiments (named “ISE reference”
within this paper).
2.0
TM
ESS
virgin
1.8
1.6
1.4
1.2
1.0
0
20
40
60
80 100
E
IS
Relative brick height (%)
f.
Re
Fig. 1: Base resistivity as a function of relative brick
height for wafers from the investigated solar-grade and
virgin-grade bricks as well as base resistivity of ISE
reference wafers.
Fig. 1 shows the base resistivity distribution as a
function of relative brick height for all wafers used within
the described experiment; the range is b,virgin = 1.26 -
1031
27th European Photovoltaic Solar Energy Conference and Exhibition
1.72 cm and b,ESS = 0.99 - 1.98 cm. The ESSTM brick
shows the characteristic increase of base resistivity with
increasing brick height for feedstock being compensated
by boron and phosphorus. The virgin brick exhibits the
correspondent characteristic decrease in resistivity due to
boron segregation with a segregation coefficient below 1.
Hence, wafers in a comparable resistivity range from
both, compensated and uncompensated, feedstock are
investigated. Fig. 1 also shows that there is no type
change-over within the commercially usable brick height
for the ESSTM crystal.
Efficiency  (%)
area Al-BSF and Kohler/Braun [15,16] avg = 15.4 % and
peak ≈ 16.2 % using a full-area Al-BSF. A direct
comparison is difficult since the cited results date back a
few years. However, this study shows that higher peak
efficiencies than those reported are possible in a standard
industrial SP Al-BSF process using 100 % SoG-mc-Si.
2.2 Cell process
For solar cell processing, we applied a standard
industrial cell process at Fraunhofer ISE’s pilot line PVTEC [12], whose sequence is displayed in Fig. 2. The
applied process contains an adapted but not prolonged
diffusion, no additional cleaning steps and printing
solderable busbars on the rear side. Therefore, the
resulting solar cells are completely usable for integration
into solar modules.
16.5
TM
ESS
virgin
16.0
degraded
0
20
40
60
80 100
E
IS
Relative brick height (%)
f
Re
.
Fig. 3: Efficiencies as a function of relative brick height
(filled symbols = as-processed, open symbols = degraded
under 0.2 suns for t >48 h) for the ESSTM and the virgingrade brick as well as for industrial reference wafers.
Fig. 2:
Process
flow
applied at Fraunhofer
ISE’s pilot line PV-TEC
for standard industrial SP
Al-BSF solar cells. The
process
contains
an
adapted but not prolonged
diffusion, no additional
cleaning steps and printing
solderable busbars on the
rear side.
3
17.0
Table 1 summarizes the results of the IV
measurements; both the cells from the ESSTM and the
virgin-grade brick yield equal medium efficiencies of
medium ≈ 16.6 % which is on the same level as the solar
cells processed from the industrial reference material
used. However, the cells from the solar-grade brick
exhibit a standard deviation of ESSTM,std,dev = 0.35 %
compared to virgin,std,dev = 0.20 % for the virgin brick.
The industrial reference wafers are in a narrower corridor
of ISEref,std,dev = 0.11 % but do not represent an entire
brick. This would mean a larger number of power bins
during classification in industrial production for the
ESSTM cells, but also better top quality bins. For the
ESSTM brick, all cells between relative brick heights of
10 – 40 % exhibit efficiencies of  > 16.95 % whereas
the maximum efficiency of the virgin brick is
max,virgin = 16.97 %.
Efficiencies of both bricks strongly degrade with
increasing brick height, due to a decrease in both, opencircuit voltage Voc and short-circuit current density Jsc.
Fig. 4 shows the dependence of Voc and Jsc on base
resistivity while indicating the direction of solidification
during crystallisation (compare to Fig. 1). For both
parameters, the dependence on base resistivity is in
opposite directions for cells from each feedstock
following the direction of solidification. Hence, the
higher the relative brick height is, the lower is Voc and Jsc
for both bricks independently of the development of base
resistivity with brick height.
First, the limitation of Voc with increasing brick
height is addressed using luminescence imaging. Three
representative cells from the bottom, middle and top part
of the two bricks, as well as one reference cell, are
discussed. Fig. 6 (row 1) depicts PL images under opencircuit conditions at an illumination level of I = 1 sun for
the cells of the ESSTM brick and Fig. 6 (row 2) the
corresponding spatially-resolved images of the total dark
saturation current density J0 assuming a one-diode model
[17]. Fig. 6 (row 3,4) depicts the same images for cells
from the virgin-grade brick and Fig. 6 (row 5,6) for a cell
from an industrial reference wafer. The PL images
CHARACTERISATION
The discussion of the experimental results is divided
into forward and reverse characteristics. Under forward
bias, the focus lies on efficiency and LID, whereas the
focus of the reverse bias investigation lies on breakdown
characteristics and hot spot endurance.
3.1 Forward bias
3.1.1 IV parameters
Fig. 3 depicts the efficiency distribution as a function
of relative brick height (filled symbols = as-processed
values, open symbols = degraded values under 0.2 suns
illumination, see next section) for the solar cells
processed from the ESSTM and the virgin-grade brick as
well as the values for the industrial reference wafers. The
gained efficiencies are on an equal level, with the cells
from ESSTM feedstock even exhibiting slightly higher
peak efficiency values of  > 17 %. The best cell reached
an
independently
confirmed
efficiency
of
max = 17.13 %. This value is amongst the highest
efficiencies reported for standard SP Al-BSF cells on
100 % SoG-mc-Si. To our knowledge, the highest
efficiency on SoG-mc-Si using an industrial high
efficiency concept with dielectrically-passivated and
locally-contacted rear, seed and plate front contacts etc.
was reported by Engelhardt with  = 18.5 % [13].
Concerning industrial SP Al-BSF Si solar cells, Petter
[11] showed avg = 16.0 % and peak ≈ 16.5 % for one
block with a “slightly more sophisticated process”, Peter
[14] achieved avg = 16.0 % and peak ≈ 16.3 % for one
block using an optimized POCl diffusion step and a full-
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27th European Photovoltaic Solar Energy Conference and Exhibition
Table 1: IV parameters of the processed solar cells: efficiency , open-circuit voltage Voc, short-circuit current density Jsc,
fill factor FF, pseudo fill factor pFF, parallel resistance Rp, dark current density J(-12V) and breakdown voltage Vbd. For the
best ESSTM and virgin-grade cells, Vbd has not been determined. All cells have the format 15.6×15.6 cm2 and the values are
given as-processed.
*)
independently certified by Fraunhofer ISE Callab

Material
virgin
ISE Ref.
Average
(59 cells)
Best cell*)
Average
(56 cells)
Best cell
Average
(40 cells)
Best cell
Open-circuit
voltage Voc (mV)
Short circuit-current
2
density Jsc (mA/cm )
(b)
FF
2
J(-12V)
2
2
Vbd
mA/cm
%
%
kcm
mA/cm
V
16.63
620.2
33.88
79.1
81.8
7.5
3.6
-15.0
17.13
628.7
34.06
80.0
-
-
-
NA
16.62
617.3
34.17
78.8
81.5
8.1
3.2
-16.7
16.97
620.9
34.51
79.2
81.9
8.1
1.8
NA
16.59
620.6
33.84
79.0
81.7
7.7
3.1
-16.4
16.76
622.4
34.01
79.2
81.8
8.9
1.9
-16.5
TM
ESS
virgin
620
615
610 crystallisation
direction
605
TM
(a) ESS
34.5
virgin
1.0
0.8
TM
crystallisation
direction
33.5
1.50
1.75
2.00
Base resistivity b (cm)
Fig. 4: (a) Open-circuit voltage Voc and (b) short-circuit
current density Jsc as a function of wafer base resistivity.
The arrows indicate the direction of solidification during
crystallisation.
ESS bottom
TM
ESS middle
TM
ESS top
virgin bottom
virgin middle
virgin top
ISE ref.
0.6
0.4
0.2
0.0
300 450 600 750 900 10501200
(a)
34.0
1.25
Rp
mV
625
1.00
pFF
%
630
(a)
Jsc
Internal quantum efficiency Internal quantum efficiency
IQE (%/100)
IQE (%/100)
ESSTM
Voc
Wavelength  (m)
1.0
0.9
0.8
0.7
(b)
900
950
1000
Wavelength  (m)
Fig 5: (a) Internal quantum efficiencies of selected cells
from the bottom, middle and top part of both ingots and
one ISE reference cell and (b) zoom into the diffusionlength-sensitive wavelength range.
illustrate, that the dislocation density increases with
increasing brick height (which is true for every casted
mc-Si crystal). These dislocations lead to increased
recombination activity, i.e., a reduced minority carrier
lifetime as illustrated in the J0 images which causes a
decrease in Voc. Besides the carrier lifetime, the base
saturation current density amongst other parameters also
depends on base doping [18]. That is, the effect of
increasing base resistivity (which correlates to a
decreasing net doping) with brick height for the ESSTM
cells amplifies the drop in Voc whereas for the virgin
grade cells an increasing base doping attenuates the drop
in Voc with increasing brick height.
The increasing dislocation density with increasing
brick height also leads to degradation of Jsc over brick
height. This degradation can also be explained by
increased recombination in the base under short-circuit
conditions as can be seen in the long wavelength regime
of the internal quantum efficiencies, see Fig. 5 (a)-(b).
Table 2: Short-circuit current densities Jsc determined
via IV measurements and effective diffusion length Lb,eff
extracted from the quantum efficiencies of the cells
shown in Fig. 5.
Material
Brick height
Jsc
Lb,eff
2
ESSTM
ESSTM
ESSTM
Virgin
Virgin
Virgin
ISE Ref.
1033
Bottom
Middle
Top
Bottom
Middle
Top
-
[mA/cm ]
34.11
33.93
33.59
34.42
34.27
33.94
33.88
[m]
417
353
291
531
439
396
388
27th European Photovoltaic Solar Energy Conference and Exhibition
Fig. 6: PL images under Voc-conditions and spatially-resolved dark saturation current density J0 determined via the “coupled
determination of dark saturation current and series resistance (C-DCR)” technique [17] for ESSTM and virgin-grade cells from
the bottom, middle and top part of the two bricks and for one ISE reference cell.
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27th European Photovoltaic Solar Energy Conference and Exhibition
The higher the relative brick position is, the lower is the
respective internal quantum efficiency for both bricks.
From QE measurements, an effective bulk diffusion
length Lb,eff can be extracted using Fischer’s model [19].
Table 2 shows the Jsc values of the investigated cells and
the corresponding Lb,eff values extracted from the QE
measurements which show a close correlation.
In summary, the efficiency degradation of both bricks
with increasing brick height is due to increasing
dislocations density which leads to larger recombinationactive regions that cause a drop in both Voc and Jsc.
complex concentration linearly depends on the net doping
in compensated silicon [23,24], which decreases with
increasing brick height, and quadratically depends on the
oxygen concentration [25], which also decreases with
increasing brick height due an effective segregation
coefficient of oxygen > 1 [26], the BO complex
concentration is expected to decrease with increasing
brick height. As this differs from the experimental
results, we doubt that the observed light-induced
degradation can be assigned to the formation of BO
complexes but is caused by another metastable defect,
which is further investigated. Furthermore, the amplitude
of the degradation is in the same order for the ESSTM and
virgin-grade cells not indicated a higher light-induced
degradation for cells from compensated feedstock.
3.1.2 Light-induced degradation
To investigate light-induced degradation of the cells
due to the boron-oxygen (BO) complex, e.g. Ref. [20,21],
we exposed all cells to illumination with an intensity of
I ≈ 0.2 suns for a time of t > 48 h. The open symbols in
Fig. 3 show the results. No degradation can be observed
within the measurement inaccuracy of the industrial cell
tester in Fraunhofer ISE’s PV-TEC. To assure that the
solar cells had not been degraded already at the point of
the initial measurement, we annealed selected samples
covering the entire brick height for t = 20 min at a sample
temperature of T = 250°C in the dark (those conditions
should anneal the BO complex [20,21]) and degraded
them again at I ≈ 0.2 suns for t > 48 h. The deviations
between both measurements were below  < 0.1 % not
showing a significant degradation effect.
However, in other publications significant lightinduced degradation in mc-Si has been reported, e.g. Ref.
[22]. The studies vary in applied illumination levels and
degradation times. To investigate the effect of varying
illumination level during degradation, we exposed the
same cells to an illumination level of I š1 sun for
t > 48 h. In Fig. 7 (a), the resulting efficiency values are
given. All efficiencies degrade after the degradation at
I ≈ 1 sun compared to the previous degradation at
I ≈ 0.2 suns. For some cells, the 1 sun degradation step
leads to an increase in series resistance which reduces
efficiency, see e.g. cells 1 and 9 in Fig. 7 (b). We
attribute this effect to thermal degradation of the contacts
due to the thermal treatment. To exclude a potential
effect of the sequential order of the performed
degradation steps, the cells are subsequently annealed
again at T = 250°C for t = 20 min in the dark and then
again degraded at I ≈ 0.2 suns, this time for t > 90 h.
Fig 7 (b) shows the effects of the additional thermal
treatment steps on series resistance.
With this approach, we can conclude, that if a later
measurement in time yields higher efficiency values than
a previous measurement, it is not caused by series
resistance effects. Hence, to validate the effect of higher
light-induced degradation for an illumination level of
I ≈ 1 sun compared to I ≈ 0.2 suns, we consider the
differences in efficiencies between the annealed state
(point in time 3) and the degraded state after illumination
at I ≈ 1 sun for t > 48 h (point in time 2) and the
difference between the annealed state and the degraded
state after illumination at I ≈ 0.2 suns for t > 90 h (point
in time 4). Fig. 7 (c) shows the efficiency differences for
the annealed state compared to the different degraded
states. It can be seen, that the difference is highest for the
degraded state after illumination at I ≈ 1 sun compared to
the other degraded states.
No dependence of the increased degradation at
I ≈ 1 sun illumination over brick height is observed,
which would be typical for the BO complex. As the BO
TM
ESS
virgin
ISE Ref.
degraded 1 (0.2 suns, > 48 h)
degraded 2 (1.0 suns, > 48 h)
annealed (250°C, 20 min)
degraded 3 (0.2 suns, > 90 h)
3
4
annealed - degraded (%)
Fill factor difference
pFF-FF (%)
Efficiency  (%)
17.2
17.0
16.8
28
16.6
9
16.4
1
16.2
16.0
15.8
(a) 15.6
4.0
3.8
9
3.6
3.4
3.2
8
3.0
1
2.8
2.6
3
2.4
2
(b) 2.2
0.3
0.2 1
12
5
10
11
6
6
10
11
4
12
5
13
7
23
6
4
10
89
0.1
13
7
11 5
7
13
12
0.0
-0.1
-0.2
(c) -0.3
0
20
40
60
80 100
E
IS
Relative brick height (%)
f.
Re
Fig. 7: (a) Efficiencies, (b) series-resistance-enhanced fill
factor losses and (c) efficiency difference between
annealed and degraded states for different degradation
states of selected cells from the ESSTM and virgin-grade
brick as well as for ISE reference wafers. The
measurement accuracy of the IV-Test used for repeated
measurements is ≤ 0.1 %abs.
3.2 Reverse bias
When cells are partially shaded during module
operation, they can be reverse-biased by the other,
unshaded cells in the module and dissipate power rather
than generating it [27]. If the dissipated power is
1035
27th European Photovoltaic Solar Energy Conference and Exhibition
concentrated in a small area on the partially shaded cells,
those “hot spots” can lead to a significant increase of the
cell temperature and in the worst case to the failure of the
solar module. One prejudice hindering a wider use of
solar cells made from solar-grade feedstock is that they
exhibited a higher hot spot risk than cells from virgingrade feedstock. That is why we investigate the global
and locally distributed reverse behaviour of the cells
within this experiment.
7
1
,
Current I (A)
5
4
Vrev,max (24 cells/string)
3
Vrev,max(20 cells/string)
2
I=1.5 A
Vbd
1
3.2.1 Global characteristics
Fig. 8 (a) depicts the dark reverse characteristics of
one cell from the ESSTM and one cell from the virgingrade brick, both from a relative brick height of
approximately 25 %. Both cells exhibit an almost
identical global reverse characteristic down to a reverse
bias of Vrev ≈ -12.5 V. For lower reverse voltages, the
ESSTM cell breaks down significantly earlier than the
virgin-grade cell causing an increase in global current.
When interpreting the reverse characteristic of solar
cells and the possible hot spot risk arising from partial
shading of those cells, the applied module architecture
has to be taken into account since it determines the
possible operating conditions of the incorporated cells.
The standard architecture used in industrial modules from
mc-Si solar cells consists of 60 solar cells connected in
series using one bypass diode connected in parallel to 20
cells, each. That is, the voltage being applied to a single
shaded solar cells is limited to
,
TM
ESS
virgin
6
Current density
2
J(Vrev= -12 V) (mA/cm )
(a)
(b)
0
-18 -15 -12
-9
-6
-3
0
Voltage V (V)
TM
ESS
virgin
8
I=1.5 A
6
4
2
0
0
20
40
60
80 100
SE
Re
f.
I
Relative brick height (%)
Fig. 8: (a) Global reverse characteristics of one cell from
the ESSTM and one from the virgin brick from a relative
brick height of approximately 25 %. (b) Current density
of all cells at an applied voltage of Vrev = -12 V in the
dark.
1
As indicated in Fig 8 (a), the reverse behaviour of the
cells from the ESSTM and the virgin-grade brick differ for
voltages significantly smaller than Vrev = -12 V. This
difference is due to local junction pre-breakdown as will
be shown in the next section. To discuss the effect of prebreakdown on the global reverse characteristic, we use
the value Vbd(Idark = 10 A); that is a voltage for which the
cells are completely broken down. Fig 9 (a) shows the
dependence of Vbd on relative brick height for the
investigated cells. For both bricks, the well-known
[28,29] anti-correlation between base resistivity and
breakdown voltage is observed (compare to Fig. 1).
However, when plotting Vbd versus base resistivity, see
Fig. 9 (b), the cells from ESSTM feedstock exhibit a
significantly earlier breakdown voltage than their virgingrade counterparts for equal base resistivities. We
attribute this to the effect that a higher net doping in
compensated silicon is necessary for equal base
resistivities because of decreased carrier mobility [28].
The solar cells from industrial reference wafers behave
similarly to the virgin-grade cells. The slight difference
can be caused by multiple reasons, including different
crystallization processes and therefore different
dislocation
densities,
other
metal
precipitate
concentrations and so on.
for every operating point of the module, with VBPD being
the voltage of the bypass diode in operation. In real
modules, a term considering the resistive losses in the
feed lines of the bypass diodes and cell interconnectors
in-between the cells of the module has to be taken into
account, which generally slightly reduces the maximum
voltage being applied to the cell in reverse (the BPD feed
lines increase the voltage, the module interconnectors
decrease it). This will be discussed in more detail
elsewhere. However, Eq. (1) is well-suited to estimate the
worst case operating conditions for a solar cell under full
shading conditions. If we assume an average open-circuit
voltage of Voc,mean = 620 mV (compare Table 1) and a
bypass-diode voltage of VBPD = 0.3 V, a worst case
reverse voltage of Vrev,worst case = -19×620 mV-0.3 V =
-12.08 V in a standard 60 cell module can be estimated at
a temperature of T = 25°C.
Fig 8 (b) shows the current density of all cells at a
voltage of Vrev = -12 V as a function of relative brick
height. A current value in the regime of Vrev = -10 to
-12 V is generally used for binning during cell testing
within industrial solar cell lines. The critical value is
generally in the regime of Ilimit = 1 to 3 A. Almost all
cells of both bricks and the reference wafers exhibit
values of I(Vrev = -12 V) < 1.5 A and therefore fulfill
common reverse specifications. The mean values across
brick height are in a comparable range, as shown in
Table 1 (3.5 mA/cm2 ≙ 0.85 A). Also, no significant
dependence on brick height can be observed. That is,
cells covering the entire commercially usable brick height
meet common reverse bias specifications for both
investigated bricks.
1036
Breakdown voltage
Vbd (Idark = 10 A) (V)
27th European Photovoltaic Solar Energy Conference and Exhibition
24 cells/string and 60-72 cells/string (that is, no bypass
diodes are incorporated which causes complete junction
breakdown when shading one cell).
TM
ESS
virgin
-14
-15
3.2.2 Spatially-resolved characteristics
Fig. 10 (a)-(c) show dark lock-in thermography
(DLIT) images of an ESSTM cell from a relative brick
position of approximately 25 % - for the reverse
characteristic see Fig. 8 (a) – for the three operating
points discussed above. Under full shading conditions,
Fig 10 (a) represents the case of 20 cells/string
(Vrev,20 cells/string = -12.0 V, Idark(Vrev = -12.0 V) = 0.6 A),
Fig. 10 (b) the case of 24 cells/string (Vrev,24 cells/string =
-14.2 V, Idark(Vrev = -14.2 V) = 5.2 A) and Fig. 10 (c) the
case if no bypass diodes were incorporated
(Vrev(Idark = Isc,mean = 8.5 A) = -14.7 V). The value for this
cell given in fig. 9 is Vrev(Idark = 10 A) = -14.8 V but
since the Isc value of the cells is lower than 10 A, this
value cannot be reached for module operation condition
at ≤ 1sun. The depicted DLIT signal (phase shift of -90°)
is proportional to the local power dissipation [30] and can
be calibrated accordingly. This power-calibrated image
can be used as the input for the simulation of the
temperature development under partial shading
conditions in a solar module using standard commercially
available glass, EVA and back sheet [31]. For this
simulation, we assumed a surrounding temperature of the
module of T = 50°C (which represents the circumstances
during certification) while keeping the cell parameters at
T = 25°C. That is, a worst case scenario is addressed.
-16
-17
(a)
0
20
40
60
80 100
SE
Re
f.
Breakdown voltage
Vbd (Idark = 10 A) (V)
I
Relative brick height (%)
-14
TM
ESS
virgin
ISE Ref.
-15
-16
-17
(b)
1.00
1.25
1.50
1.75
2.00
Base resistivity b (cm)
Fig. 9: Breakdown voltage Vbd(Idark = 10 A) as a function
(a) of relative brick height and (b) of wafer base
resistivity.
We have discussed, that for modules with 20 cells per
string, none of the cells breaks down and therefore the
ESSTM, virgin-grade and ISE reference cells exhibit a
comparable global reverse behaviour. However, the
breakdown behaviour significantly differs between the
cells from compensated ESSTM and the cells from virgingrade feedstock. Some module manufacturers have
recently started to incorporate 72 cells (with
Acell = 15.6×15.6 cm2) into solar modules without
increasing the number of bypass diodes. That is, a string
then contains 24 instead of 20 cells. For the worst case
conditions derived in Eq. (1), a worst case voltage of
results
Vrev,worst case = -23×620 mV-0.3 V = -14.56 V
assuming Voc,mean = 620 mV, VBPD = 0.3V and T = 25°C.
For the ESSTM cells, this value is in the order of
Vbd(I = 10 A) whereas for the cells from virgin-grade
feestock there is still a corridor in-between. Fig. 8 (a)
illustrates the different scenarios; the ESSTM cell and
virgin-grade cell exhibit a comparable behaviour for
20 cells/string but a different behaviour for lower reverse
voltages. In solar modules under realistic operating
conditions, the discussed worst case situation can
overestimate the actually applied voltage. Besides the
reasons addressed before, another point is, that the higher
the current of the shaded, reverse-biased cell is, the
further the other, non-shaded cells in the string veer away
from open-circuit conditions and therefore exhibit a
smaller voltage than Voc. That is, the actually applied
voltage to the shaded cell in reverse is reduced [27].
Also, for temperatures higher than T = 25°C, the voltages
of the forward biased cells decrease with increasing
temperature which leads to another attenuating effect on
the reverse bias of the shaded cell. Those effects can be
considered in the determination of the adequate operating
point of shaded cells and will be discussed elsewhere.
Within this work, we address the operating points under
full shading conditions for a module with 20 cells/string,
Fig. 10: (a)-(c) Dark lock-in thermography images of the
ESSTM cell from Fig. 8 (a) at the worst case operating
conditions under full shading conditions in a module with
(a) 20 cells/string, (b) 24 cells/string and (c) no
incorporated bypass diodes. (d)-(f) Corresponding
simulation results of the backsheet temperature fields
assuming commercially available module encapsulation
materials.
Fig. 10 (d)-(f) depict the simulation results of the
temperature fields on the backsheet of the corresponding
1037
27th European Photovoltaic Solar Energy Conference and Exhibition
[3]
modules. Detrimental module encapsulation failure can
generally occur at module backsheet temperatures of
T ≥ 150°C [27]. For 20 cells/string, the simulation gives a
maximum temperature of Tmax,20cells/string ≈ 60°C which is
far from being critical for the module encapsulation
materials. The resulting temperature for 24 cells/string is
Tmax,24cells/string ≈ 122°C which should still be tolerable.
When completely omitting bypass diodes however, a
maximum temperature of Tmax,no BPDs ≈ 167°C is
simulated which is in the critical range.
In summary, the simulation results indicate, that fully
shading a typical solar cell from the ESSTM brick should
be uncritical for standard modules exhibiting
20 cells/string. Although localized junction prebreakdown occurs for the assumed voltages representing
a module architectures with 24 cells/string, the simulated
temperatures under full shading conditions are uncritical.
Only when completely omitting bypass diodes, the
temperature of the fully shaded cell is expected to reach
critical values.
4
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
CONCLUSION AND OUTLOOK
[13]
The results of this study are that both wafers from the
ESSTM and the virgin-Si brick yielded average
efficiencies of avg = 16.6 % over the entire brick. The
peak efficiency
of the ESSTM brick was
peak,ESS = 17.13 % which is even higher than
peak,virgin = 16.97 % for the virgin brick and amongst the
highest efficiencies reported for standard industrial SP
Al-BSF solar cells on 100 % SoG-mc-Si. No lightinduced degradation could be measured for long-term
illumination under I = 0.2 suns but for illumination under
I = 1sun. This effect points towards another origin than
the typically assumed BO defect. However, the
degradation effect was in the same order for cells from
ESSTM and virgin-grade feedstock.
The solar cells from ESSTM break down earlier than
their virgin reference at comparable base resistivities.
This well-known effect [28] is caused by a higher net
base doping due to compensation which is confirmed by
this study. However, within standard (60 cells) industrial
modules, reverse voltages are usually limited to Vrev ≈
-12 V by incorporating bypass diodes [27]. The average
current density at Vrev = -12 V is J = 3 mA/cm2 (~0.73 A)
for all ESSTM, virgin and reference cells which therefore
fulfill common specifications, that are usually in the
range of Ilimit = 1 – 3 A. Measuring the spatially resolved
breakdown behaviour via DLIT and simulating the worstcase hot-spot temperature under full shading conditions
in a solar module has not led to critical temperatures in
modules with 20 and 24 cells/string. Only when omitting
bypass diodes completely, critical temperatures are
assumed to be reached.
In a next step, we will transfer the investigations on
module level. If the very promising results on efficiency
level can be transferred while ensuring module reliability,
as is expected by our simulation results, this work could
contribute to a wider acceptance of SoG-Si in
photovoltaic industry and possibly a wider distribution in
the market.
5
[1]
[2]
[14]
[15]
[16]
[17]
[18]
[19]
[20]
[21]
[22]
[23]
[24]
[25]
[26]
[27]
[28]
[29]
[30]
[31]
6
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ACKNOWLEDGEMENTS
The authors would like to acknowledge the help of all
colleagues with cell processing and characterisation in
Fraunhofer ISE’s PV-TEC.
1038