EE 461 - Section 4b Numerically Controlled Oscillators EE 461 Section 4b - Numerically Controlled Oscillators 1 Building the Cosine Function ݂ Frequency Control Phase Generator clk cos 2ߨ߮ ݊ Output ݂ ݊ Phase in Cycles = cos 2 EE 461 ݊ݕ ߮݊ = cos 2 Section 4b - Numerically Controlled Oscillators 2 1 Building the Cosine Function (cont.) • There are several algorithms available for computing the cosine of an angle • These algorithms usually require several multipliers which makes them slow to run on a DSP and expensive to implement on an FPGA • A fast yet economical circuit that implements a cosine function is a ROM • This is classified as a look-up-table (L.U.T.) algorithm • In an FPGA implementation, the bit output of the phase generator is connected to address lines of a ROM: • The ROM is programmed so that its output is cos 2 each corresponding address EE 461 for Section 4b - Numerically Controlled Oscillators 3 Building the Cosine Function (cont.) • In a DSP chip implementation, the output of the phase generator is used as an index to a buffer that has 2ேೝ words • The buffer is initialized so that = cos 2 BUFF + 2ேೝ FPGA ROM cos 2 index = BUFF + Computer cos 2 Memory (2ேೝ words in length) BUFF is treated as an bit unsigned integer EE 461 Section 4b - Numerically Controlled Oscillators 4 2 Word Length Quantization • The size of the ROM measured in bits is the product of the number or words and the number of bits in each word • The number of words is 2ேೝ • Let the number of bits in a word be bits/word: ROM size = 2ேೝ words × bits/word = 2ேೝ bit • should be as small as possible to reduce the size of the ROM • Making small causes severe quantization problems • To make a decision on the word length, , the engineer needs an equation that relates SNR to EE 461 Section 4b - Numerically Controlled Oscillators 5 Word Length Quantization (cont.) • The model used for the quantization noise analysis is: signed fraction ROM with infinite word length bit number connected to address lines EE 461 ∞ cos 2 Round to bits cos 2 + Noise due to rounding to bits Section 4b - Numerically Controlled Oscillators 6 3 Word Length Quantization (cont.) • Since −1 ≤ cos 2 ≤ 1, cos can not technically be represented with an bit signed fraction as the largest number that is possible is: 1 2 0.111 … 1 = 1 − ேವ ିଵ • There are two choices: • Add an integer bit • Store the value of 1 − 2 ଵ ேವ ଶ cos 2 • Makes the ROM output cos 2 in the ROM where = 1 − 2 ଵ ேವ ଶ • The second choice is more economical so will be used here EE 461 Section 4b - Numerically Controlled Oscillators 7 Word Length Quantization (cont.) • The quantization noise due to rounding to − 1 fraction bits is: ଶ = ଶ = 12 1 2 ேವ ିଵ 12 ଶ = 2ିଶேವ 3 • The signal power for a sinusoid with amplitude is మ ଶ • Therefore the SNR is: = ଶ 2 2ିଶேವ = 3 ଶ ଶே 2 ವ 2 3 EE 461 Section 4b - Numerically Controlled Oscillators 8 4 Word Length Quantization (cont.) • For of any reasonable length, = 1 − 2 ଵ ேವ ଶ ≈1 • Therefore the approximate SNR is: ≈ 3 ଶே 2 ವ 2 EE 461 Section 4b - Numerically Controlled Oscillators 9 Further Reducing the Size of the ROM • The size of the phase accumulator is determined by the accuracy needed for the frequency • This may be a number like 32 bits • The L.U.T. would then need a ROM with 32 address bits (4 billion words), which is far too large to be practical • To make the ROM a practical size, must be truncated ߮݊ Phase Accumulator ߮ ݊−1 ܰ + ܰ ߮݊ ∑ + ܰ ݂ ܰ ்߮ ݊ ROM with address lines cos 2 ் clk EE 461 Section 4b - Numerically Controlled Oscillators 10 5 Further Reducing the Size of the ROM (cont.) • is truncated to get ் • The most significant bits of are retained: ் = + Therefore: Truncation noise = cos 2 ் ≈ 1: = cos 2 + 2 Phase noise EE 461 Section 4b - Numerically Controlled Oscillators 11 Further Reducing the Size of the ROM (cont.) • Using the identitycos + = cos cos − sin sin : = cos 2 cos 2 − sin 2 sin 2 • The phase noise will certainly be small, so: cos 2 ≈1 sin 2 ≈ 2 • Which leads to: = cos 2 − 2 sin 2 • has a DC component and an AC component • Let the DC component be and the AC component be : = + EE 461 Section 4b - Numerically Controlled Oscillators 12 6 Further Reducing the Size of the ROM (cont.) = cos 2 • • − 2πsin 2 The DC component of causes a phase shift in the noise free component of the output Using the relation cos + sin = cos − , where = ଶ + ଶ , and = tanିଵ = • − 2 sin 2 : 1ଶ + 2π ଶ cos 2 + tanିଵ Since is sure to be small, 1ଶ + 2π 2π 1 ଶ − 2 sin 2 = 1 and tanିଵ 2 = 2π: = cos 2 + 2 − 2 sin 2 Noise free output Additive noise • The phase shift of 2 in the NCO output is not a problem EE 461 Section 4b - Numerically Controlled Oscillators 13 Further Reducing the Size of the ROM (cont.) = cos 2 + 2 + = 2 sin 2 Amplitude noise due to truncating ଶ = 4 ଶ ଶ sinଶ 2 ଶ = 2 ଶ ଶ • is the AC component of the noise generated by truncating • If ≫ , then ଶ approaches ଶ = 2ିேೌ 12 ଶ = 2 ଶ EE 461 ଶ = ௦మ with = 2ିேಲ : ଵଶ 2ିଶேೌ 12 2ିଶேೌ ଶ ିଶே ಲ = 2 12 6 Section 4b - Numerically Controlled Oscillators 14 7 Further Reducing the Size of the ROM (cont.) • The SNR due to quantizing is: 1 ୱ୧୬ୟ୪ 2 = = ୬୭୧ୱୣ ଶ ିଶேಲ 2 6 = 1 ଶ ିଶேಲ 2 3 = 3 × 2ଶேಲ ଶ • When all is considered: = cos 2 + 2 + + where and are the noises resulting from quantizing and the output of the ROM respectively EE 461 Section 4b - Numerically Controlled Oscillators 15 SNR • The total SNR is given by: = = EE 461 ୱ୧୬ୟ୪ ଶ + ଶ = 1 2 ଶ 6 2ିଶேಲ + 2ିଶேವ 3 1 ଶ ିଶேಲ 2 ିଶேವ 2 + 2 3 3 Section 4b - Numerically Controlled Oscillators 16 8 SNR (cont.) • Taking each of the terms (inequalities) separately: ≤ 1 ଶ 3 ≤ = 2ିଶேಲ 1 2 × 2ିଶேವ 3 3 × 2ଶேಲ ଶ = 3 × 2ଶேವ 2 • Taking 10log SNR yields: ௗ ≤ −5.17dB + 6.02 ௗ ≤ 1.76dB + 6.02 EE 461 dB bit dB bit Section 4b - Numerically Controlled Oscillators 17 Example 4.5 • An NCO with an SNR greater than 70 dB is required What are the dimensions of the ROM required for the lookup-table? • Find minimum word size for : ௗ ≤ 1.76dB + 6.02 ≥ dB bit 70 − 1.76 = 11.34bits 6.02 ≥ 12bits EE 461 Section 4b - Numerically Controlled Oscillators 18 9 Example 4.5 (cont.) • Find minimum word size for : ௗ ≤ −5.17dB + 6.02 ≥ dB bit 70 + 5.17 = 12.49bits 6.02 ≥ 13bits • Check overall SNR using = 12bits and = 13bits: = 1 = ଶ 1 ଶ 2 2 2ିଶேಲ + 2ିଶேವ 2ିଶ ଵଷ + 2ିଶ ଵଶ 3 3 3 1 = = 11,266,336 → 70.5dB 4.902 × 10ି଼ + 3.974 × 10ି଼ 3 EE 461 Section 4b - Numerically Controlled Oscillators 19 Example 4.6 • A system needs a frequency agile NCO: • Operating at a sampling rate of ௦ = 10଼ samples/second • The frequency must be settable within a tolerance of ±0.5Hz • The SNR of the output sinusoid must be at least 55dB Find the size of the smallest ROM and the minimum length for the phase accumulator to achieve the required performance • First find : −log 2∆ > = log 2 −log 2 0.5 10଼ log 2 = 26.6 • Therefore minimum is 27 • As a frequency agile NCO is specified, the length of cannot be reduced EE 461 Section 4b - Numerically Controlled Oscillators 20 10 Example 4.6 (cont.) • Next find minimum values for and : ௗ ≤ 1.76dB + 6.02 ≥ dB bit 55 − 1.76 = 8.84bits 6.02 ≥ 9bits ௗ ≤ −5.17dB + 6.02 ≥ dB bit 55 + 5.17 = 9.99bits 6.02 ≥ 10bits EE 461 Section 4b - Numerically Controlled Oscillators 21 Example 4.6 (cont.) • Finally calculate SNR and check if it meets requirements: 1 1 = ଶ ିଶேಲ 2 ିଶேವ ଶ ିଶ ଵ 2 2 + 2 2 + 2ିଶ ଽ 3 3 3 3 1 = = 176,056 → 52.5dB 3.137 × 10ି + 2.543 × 10ି = SNR is too low • Next try = 9 + 1 = 10 and = 10: = 1 ଶ 3 2ିଶ ଵ 2 + 2ିଶ 3 = 54.3dB ଵ SNR is still too low EE 461 Section 4b - Numerically Controlled Oscillators 22 11 Example 4.6 (cont.) • Next try = 9 and = 10 + 1 = 11: = 1 ଶ 3 2ିଶ ଵଵ 2 + 2ିଶ 3 = 54.8dB ଽ SNR is also too low • Next try = 9 + 1 = 10 and = 10 + 1 = 11: = 1 ଶ 3 2ିଶ ଵଵ 2 + 2ିଶ 3 = 58.5dB ଵ SNR meets the specification EE 461 Section 4b - Numerically Controlled Oscillators 23 Example 4.6 (cont.) • Therefore: • A ROM with = 11 (11 address lines) and = 10 (word length of 10 bits) will work • Size of ROM (in bits) = 2ேಲ words × bits⁄word = 2ଵଵ words × 10 bits⁄word = 20,480bits • = 10 and = 11 are sufficient but may not yield the smallest ROM EE 461 Section 4b - Numerically Controlled Oscillators 24 12 Example 4.6 (cont.) • From the inequality for noise due to truncating : ௗ ≤ −5.17dB + 6.02 dB bit with equality holding when = ∞. With = 10 and = ∞, SNR = 55.03dB • Now find the minimum value for to make the SNR 55 dB with = 10: Trials for SNR 9 + 1 = 10 bits 54.3 dB 9 + 2 = 11 bits 54.82 dB 9 + 3 = 12 bits 54.98 dB 9 + 4 = 13 bits 55.02 dB EE 461 Section 4b - Numerically Controlled Oscillators 25 Example 4.6 (cont.) • With = 10 and = 13 (which also meets SNR spec): • Size of ROM (in bits) = 2ேಲ words × bits⁄word = 2ଵ words × 13 bits⁄word = 13,312bits • Therefore answer is: = 10, = 13, and = 27 • Comments: • In practice, there is usually an upper limit on , for example, it could be the size of the DAC • The ROM can be shrunk to ଵ⁄ସ of its size by storing the coefficients for ଵ⁄ସ cycle and using a logic circuit to recompute the address of the OM EE 461 Section 4b - Numerically Controlled Oscillators 26 13