Chapter 9 Metal-Semiconductor Contacts
Two kinds of metal-semiconductor contacts:
• metal on lightly doped silicon –
• rectifying Schottky diodes
• metal on heavily doped silicon –
• low-resistance ohmic contacts
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-1
9.1 Schottky Barriers
Energy Band Diagram of Schottky Contact
Metal
qφBn
Depletion
layer
Neutral region
Ec
Ef
Ev
Ec
qφBp
Ef
Ev
• Schottky barrier height, φB ,
is a function of the metal
material.
• φB is the single most
important parameter. The
sum of qφBn and qφBp is equal
to Eg .
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-2
Schottky barrier heights for electrons and holes
Metal
φ Bn (V)
φ Bp (V)
Work
Function
ψ m (V)
Mg
0.4
Ti
0.5
0.61
Cr
0.61
0.5
W
0.67
Mo
0.68
0.42
Pd
0.77
Au
0.8
0.3
Pt
0.9
3.7
4.3
4.5
4.6
4.6
5.1
5.1
5.7
φBn + φBp ≈ 1.1 V
φBn increases with increasing metal work function
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-3
φBn Increases with Increasing Metal Work Function
Vacuum level, E0
χSi = 4.05 eV
Ideally,
qφBn= qψM – χSi
qψ M
q φBn
Ec
Ef
Ev
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-4
φBn is typically 0.4 to 0.9 V
Vacuum level, E0
χSi = 4.05 eV
qψ M
q φ Bn
+ −
Ec
Ef
• A high density of
energy states in the
bandgap at the metalsemiconductor interface
pins Ef to a range of
0.4 eV to 0.9 eV below
Ec
• Question: What is the
typical range of φBp?
Ev
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-5
Schottky barrier heights of metal silicide on Si
Silicide ErSi1.7 HfSi MoSi2 ZrSi2
φ Bn (V) 0.28 0.45 0.55 0.55
0.55 0.49
φ Bp (V)
TiSi2 CoSi2 WSi2
0.61 0.65 0.67
0.45 0.45 0.43
NiSi2 Pd2Si
0.67 0.75
0.43 0.35
PtSi
0.87
0.23
Silicide-Si interfaces are more stable than metal-silicon
interfaces. After metal is deposited on Si, an annealing step is
applied to form a silicide-Si contact. The term metal-silicon
contact includes silicide-Si contacts.
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-6
Using CV Data to Determine φB
qφbi
qφBn
Ec
Ef
Ev
qφBn
q(φbi + V)
qV
q φ bi = q φ Bn − ( E c − E f )
= q φ Bn
W dep =
C=
Ec
Ef
Ev
Nc
− kT ln
Nd
2ε s (φ bi + V )
qN d
εs
W dep
A
Question:
How should we plot the CV
data to extract φbi?
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-7
Using CV Data to Determine φB
1/C 2
1
2(φbi + V )
=
2
C
qN d ε s A2
V
− φbi
Once φbi is known, φΒ can be determined using
Nc
qφbi = qφ Bn − ( Ec − E f ) = qφ Bn − kT ln
Nd
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-8
9.2 Thermionic Emission Theory
vthx
-
V
Metal
N-type
Silicon
Efm
q(φ B − V)
q φB
qV
Ec
Efn
Ev
x
 2πmn kT 
n = N c e − q (φ B −V ) / kT = 2 
2

 h

vth = 3kT / mn
J S →M
3/ 2
e − q (φ B −V ) / kT
vthx = − 2kT / πmn
1
4πqmn k 2 2 − qφ B / kT qV / kT
= − qnvthx =
T e
e
3
2
h
= J 0 e qV / kT , where J o ≈ 100e − qφ B / kT A/cm 2
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-9
9.3 Schottky Diode
IS → M
-
= −Ι 0
qφB
IM → S
IS→ M = Ι
0
-
-
=
− Ι0
IS → M = Ι eqV/kT
0
qφB
E − Ef = q φB
- < qφ
B
qV
Efn
Ef
(a) V = 0.
IM →S
-
=
−Ι0
IS → M = I M → S = Ι0
(b) Forward bias. Metal is positive wrt
Si. IS → M >> IM → S = Ι0
IM → S ≈ 0
I
qφB
> qφ B
qV
EEfnfn
V
Reverse bias
(c) Reverse bias. Metal is negative wrt Si.
Forward bias
(d) Schottky diode IV.
IS → M << IM → S = Ι0
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-10
9.3 Schottky Diode
IM → S
-
=
− Ι0
IS → M = Ι eqV/kT
0
qφB
- < qφ
B
qV
Efn
Ef
I 0 = AKT 2e − qφ B / kT
4πqmn k 2
2
2
≈
100
A/(cm
⋅
K
)
K=
3
h
I = I S →M + I M →S = I 0e qV / kT − I 0 = I 0 (e qV / kT − 1)
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-11
9.4 Applications of Schottky Diodes
I I
Schottky diode
Schottky
I = I 0 (e qV / kT − 1)
I 0 = AKT 2e −qφB / kT
φφBB
PN junction
junction
PN
diode
V
V
• I0 of a Schottky diode is 103 to 108 times larger than a PN
junction diode, depending on φB . A larger I0 means a smaller
forward drop V.
• A Schottky diode is the preferred rectifier in low voltage,
high current applications.
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-12
Switching Power Supply
PN Junction
rectifier
110V/220V
AC
utility
power
Schottky
rectifier
Transformer
100kHz
Hi-voltage
Hi-voltage
DC
MOSFET
AC
Lo-voltage
AC
50A
1.8V
DC
inverter
feedback to modulate the pulse width to keep Vout = 1.8 V
Question: What sets the lower limit in a Schottky diode’s
forward drop?
Synchronous Rectifier: For an even lower forward drop,
replace the diode with a wide-W MOSFET which is not
bound by the tradeoff between diode V and I0 : I = I0eqV/kT
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-13
9.4 Applications of Schottky Diodes
There is no minority carrier injection at the Schottky
junction. Thus, the CMOS latch-up problem can be
eliminated by replacing the source/drain of the NFET with
Schottky junctions.
In addition, the Schottky S/D MOSFET would have shallow
junctions and low series resistance. So far, Schottky S/D
MOSFETs have lower performance.
silicide
source
gate
P-body
silicide
drain
No excess carrier storage.
What application may benefit
from that?
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-14
GaAs MESFET
source
gate
drain
metal
N
+
N-channel
N+
GaAs
Semi-insulating substrate
The MESFET has similar IV characteristics as the MOSFET,
but does not require a gate oxide.
Question: What is the advantage of GaAs over Si?
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-15
9.5 Ohmic Contacts
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-16
SALICIDE (Self-Aligned Silicide) Source/Drain
contact metal
dielectric spacer
G
gate
oxide
S
Rs
Rd
channel
D
N+ source or drain
CoSi2 or TiSi2
After the spacer is formed, a Ti or Mo film is deposited. Annealing causes
the silicide to be formed over the source, drain, and gate. Unreacted metal
(over the spacer) is removed by wet etching.
Question:
• What is the purpose of siliciding the source/drain/gate?
• What is self-aligned to what?
Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 9-17
9.5 Ohmic Contacts
2ε sφ Bn
qN d
Wdep =
Silicide
N+ Si
φBn
-
-
Tunneling
probability:
P=e
− Hφ Bn
Nd
x
Ec , Ef
φBn – V
-
Efm
Ev
V
Ec , Ef
Ev
x
H = 4π ε s mn / h = 5.4 × 10 9 mn / mo cm −3/2 V −1
J S →M
1
− H (φ Bn −V ) /
≈ qN d vthx P = qN d kT / 2πmn e
2
Semiconductor Devices for Integrated Circuits (C. Hu)
Nd
Slide 9-18
9.5 Ohmic Contacts
−1
Hφ Bn / N d
e
 dJ S → M 
Hφ Bn /
Rc ≡ 
∝e
 =
qvthx H N d
 dV 
Semiconductor Devices for Integrated Circuits (C. Hu)
Nd
Ω ⋅ cm 2
Slide 9-19