Data Sheet No. PD60028-M
IR2111(S) & (PbF)
HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
CMOS Schmitt-triggered inputs with pull-down
Matched propagation delay for both channels
Internally set deadtime
High side output in phase with input
Also available LEAD-FREE
Description
Product Summary
VOFFSET
600V max.
IO+/-
200 mA / 420 mA
VOUT
10 - 20V
ton/off (typ.)
750 & 150 ns
Deadtime (typ.)
650 ns
Packages
The IR2111(S) is a high voltage, high speed power
MOSFET and IGBT driver with dependent high and
low side referenced output channels designed for halfbridge applications. Proprietary HVIC and latch
immune CMOS technologies enable ruggedized
monolithic construction. Logic input is compatible with
standard CMOS outputs. The output drivers feature a
high pulse current buffer stage designed for minimum
8-Lead PDIP
driver cross-conduction. Internal deadtime is provided
to avoid shoot-through in the output half-bridge. The
floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
8-Lead SOIC
Typical Connection
up to 600V
VCC
VCC
IN
IN
COM
VB
HO
VS
TO
LOAD
LO
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2111(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in figures 7 through 10.
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply voltage
-0.3
625
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
25
VLO
Low side output voltage
-0.3
VCC + 0.3
Logic input voltage
VIN
dVs/dt
PD
RthJA
V
-0.3
VCC + 0.3
Allowable offset supply voltage transient (figure 2)
—
50
Package power dissipation @ TA ≤ +25°C
(8 Lead PDIP)
—
1.0
(8 lead SOIC)
—
0.625
(8 lead PDIP)
—
125
(8 lead SOIC)
—
200
Thermal resistance, junction to ambient
TJ
Junction temperature
—
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
Min.
Max.
VB
Definition
High side floating supply absolute voltage
VS + 10
VS + 20
VS
High side floating supply offset voltage
Note 1
600
VHO
High side floating output voltage
VS
VB
VCC
Low side and logic fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage
0
VCC
TA
Ambient temperature
-40
125
Units
V
°C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
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IR2111(S) & (PbF)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in figure 3.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
550
750
950
VS = 0V
toff
Turn-off propagation delay
—
150
180
VS = 600V
tr
Turn-on rise time
—
80
130
tf
Turn-off fall time
—
40
65
DT
Deadtime, LS turn-off to HS turn-on &
HS turn-off to LS turn-on
480
650
820
MT
Delay matching, HS & LS turn-on/off
—
30
—
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH
VIL
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
Min. Typ. Max. Units Test Conditions
6.4
—
—
VCC = 10V
9.5
—
—
VCC = 15V
12.6
—
—
VCC = 20V
V
—
—
3.8
—
—
6.0
VCC = 15V
—
—
8.3
VCC = 20V
VOH
High level output voltage, VBIAS - VO
—
—
100
VOL
Low level output voltage, VO
—
—
100
ILK
Offset supply leakage current
—
—
50
VCC = 10V
IO = 0A
mV
IO = 0A
VB = VS = 600V
IQBS
Quiescent VBS supply current
—
50
100
VIN = 0V or VCC
IQCC
Quiescent VCC supply current
—
70
180
VIN = 0V or VCC
IIN+
Logic “1” input bias current
—
30
50
VIN = VCC
IIN-
Logic “0” input bias current
—
—
1.0
VIN = 0V
VBSUV+
VBS supply undervoltage positive going threshold
7.6
8.6
9.6
VBSUV-
VBS supply undervoltage negative going threshold
7.2
8.2
9.2
VCCUV+
VCC supply undervoltage positive going threshold
7.6
8.6
9.6
VCCUV-
VCC supply undervoltage negative going threshold
7.2
8.2
9.2
Output high short circuit pulsed current
200
250
—
IO+
µA
V
VO = 0V, VIN = VCC
mA
IO-
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Output low short circuit pulsed current
420
500
—
PW ≤ 10 µs
VO = 15V, VIN = 0V
PW ≤ 10 µs
3
IR2111(S) & (PbF)
Functional Block Diagram
VB
HV
LEVEL
SHIFT
DEAD
TIME
UV
DETECT
R
PULSE
FILTER
R
Q
PULSE
GEN
IN
HO
S
VS
UV
DETECT
VCC
LO
DEAD
TIME
COM
Lead Definitions
Symbol Description
IN
VB
HO
VS
VCC
LO
COM
Logic input for high side and low side gate driver outputs (HO & LO), in phase with HO
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
8 Lead DIP
8 Lead SOIC
IR2111
IR2111S
Part Number
4
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IR2111(S) & (PbF)
IN
HO
LO
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
IN(LO)
50%
50%
IN(HO)
ton
toff
tr
90%
LO
HO
Figure 3. Switching Time Test Circuit
50%
tf
90%
10%
10%
Figure 4. Switching Time Waveform Definition
IN (LO)
50%
50%
50%
IN
IN (HO)
LO
90%
HO
10%
10%
90%
90%
10%
Figure 5. Deadtime Waveform Definitions
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MT
MT
DT
LO
HO
LO
HO
Figure 6. Delay Matching Waveform Definitions
5
IR2111(S) & (PbF)
1500
1250
M ax.
1000
T yp.
750
M in.
500
250
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
1500
1250
Max.
1000
750
Typ.
Min.
500
250
0
0
-50
-25
0
25
50
75
100
125
10
12
o
Temperature ( C)
400
350
350
Turn-Off Delay Time (ns)
Turn-Off Delay Time (ns)
18
20
V BIA S Supply V oltage (V)
400
300
Max
200
Typ
150
16
Figure 11B Turn-On Time vs Voltage
Figure 11A Turn-On Time vs Temperature
250
14
100
50
300
250
Max
200
150
Typ
100
50
0
0
-50
-25
0
25
50
Temperature (°C)
75
100
10
125
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 12B Turn-Off Time vs Voltage
400
400
350
350
Turn-On Rise Time (ns)
Turn-On rise Time (ns)
Figure 12A Turn-Off Time vs Temperature
300
250
200
Max
150
100
Typ
50
250
200
Max
150
100
Typ
50
0
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 13A Turn-On RiseTime vs Temperature
6
300
10
12
14
16
18
20
V B IA S Supply V oltage (V )
Figure 13B Turn-On RiseTime vs Voltage
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200
200
150
150
100
Turn-Off Fall Time (ns)
Turn -Off Fall Time (ns)
IR2111(S) & (PbF)
Max
50
Typ
100
Max
50
Typ
0
0
-50
-25
0
25
50
75
Temperature (°C)
100
125
10
18
20
Figure 14B Turn-Off Fall Time vs Voltage
1000
M ax.
Typ.
750
M in.
500
Deadtime (ns)
Deadtime (ns)
1000
Max.
Typ.
750
Min.
500
250
250
0
-25
0
25
50
75
100
10
125
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (oC)
Figure 15A Dead Time vs Temperature
6
3
0
-25
0
25
50
75
100
125
9
9
Min
6
Min
3
12
0
15
12
15
Figure 15B Dead Time vs Voltage
Logic " 1 " Input Treshold (V)
Logic "1" Input Threshold (V)
16
1250
1250
-50
14
VBIAS Supply Voltage (V)
Figure 14A Turn-Off Fall Time vs Temperature
0
-50
12
10
12
14
16
18
20
Temperature (°C)
Figure 16A Logic “I” Input voltage for HO &
Logic “0” for LO vs Temperature
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Figure 16B Logic “I” Input voltage for HO &
Logic “0” for LO vs Voltage
7
3
9
Max
6
Max
6
3
9
12
Logic " 0 " Input Treshold (V)
12
0
Logic "0" Input Threshold (V)
15
15
IR2111(S) & (PbF)
0
-50
-25
0
25
50
Temperature (°C)
75
100
10
125
18
20
H igh Level O utput V oltage (V )
1
0.8
0.6
0.4
M ax.
0.2
0.8
0.6
0.4
M ax.
0.2
0
0
-50
-25
0
25
50
75
100
125
10
Low Level Output Voltage (V)
1
0.8
0.6
0.4
Max.
0.2
-25
0
25
50
14
16
18
20
Figure 18B. High Level Output vs. Voltage
Figure 18A. High Level Output vs. Temperature
0
-50
12
V B A IS S upply V otage (V )
T e m p e ra tu re
Low Level Output Voltage (V)
16
Figure 17B Logic “0” Input voltage for HO &
Logic “I” for LO vs Voltage
1
75
100
125
Temperature (°C)
Figure 19A. Low Level Output vs. Temperature
8
14
VCC Logic Supply Voltage (V)
Figure 17A Logic “0” Input voltage for HO &
Logic “I” for LO vs Temperature
H igh Level O utput V oltage (V )
12
1
0.8
0.6
0.4
Max.
0.2
0
10
12
14
16
18
20
VBIAS Supply Votage (V)
Figure 19B. Low Level Output vs. Voltage
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500
400
300
200
Max.
100
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
500
Offset Supply Leakage Current (uA)
Offset Supply Leakage Current (uA)
IR2111(S) & (PbF)
400
300
200
M ax .
100
0
0
300
400
500
600
Figure 20B Offset Supply Current vs Voltage
200
VBS Supply Current (uA)
200
VBS Supply Current (uA)
200
V B B oos t V oltage (v)
Figure 20A Offset Supply Current vs
Temperature
150
Max.
100
Typ.
50
0
150
Max.
100
Typ.
50
0
-50
-25
0
25
50
75
100
125
10
Temperature (°C)
14
16
18
20
Figure 21B VBS Supply Current vs Voltage
500
400
400
V cc S upply C urrent (uA )
500
300
Max.
200
Typ.
100
12
VBS Floating Supply Voltage (V)
Figure 21A VBS Supply Current vs Temperature
Vcc Supply Current (uA)
100
0
300
Max
200
100
Typ
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 22A VCC Supply Current vs Temperature
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10
12
14
16
18
20
V cc F ixed S upply V oltage (V )
Figure 22B VCC Supply Current vs Voltage
9
120
120
100
100
Logic " 1" Input Bias Current (uA)
Logic "1 " Input Bias Current (uA)
IR2111(S) & (PbF)
80
60
40
20
0
-50
-25
0
25
50
75
100
125
80
Max.
60
40
20
Typ.
0
10
12
Figure 23A Logic “1” Input Current vs Temperature
4
3
2
Max.
1
25
50
4
3
2
Max.
1
0
75
100
14
16
18
20
VCC Supply Voltage (V)
Figure 24A. Logic “0” Input Current vs. Temperature
Figure 24B. Logic “0” Input Current vs. VCC Voltage
12
V B S U V LO Threshold -(V )
12
VBS UVLO Threshold +(V)
12
125
Temperature (°C)
11
Max.
10
Typ.
9
8
7
Min.
11
10
M ax.
9
Typ.
8
7
M in.
6
6
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 25 VBS Undervoltage Threshold (+)
vsTemperature
10
20
5
10
0
0
18
Figure 23B Logic “1” Input Current vs VCC Voltage
Logic "0" Input Current (uA)
Logic "0" Input Bias Current (uA)
5
-25
16
VCC Supply Voltage (V)
Temperature (°C)
-50
14
125
-50
-25
0
25
50
75
100
125
Tem perature (°C )
Figure 26 VBS Undervoltage Threshold (-)
vsTemperature
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IR2111(S) & (PbF)
11
10
VCC Undervoltage Lockout - (V)
Vcc Undervoltage Lockout +(V)
11
Max.
9
Typ.
8
Min.
7
6
-50
10
Max.
9
Typ.
8
Min.
7
6
-25
0
25
50
75
100
-50
125
-25
0
Temperature (°C)
Figure 27 VCC Undervoltage (-) vs Temperature
75
100
125
Figure 28 VCC Undervoltage (-) vs Temperature
Output source Current (mA)
Output source Current (mA)
50
500
500
400
300
Typ.
200
Min.
100
400
Typ.
300
Min.
200
100
0
0
-50
-25
0
25
50
75
100
10
125
12
Temperature (°C)
14
16
18
20
VBIAS Supply Voltage (V)
Figure 29B Output Source Current vs Voltage
Figure 29A Output Source Current vs Temperature
750
Output Sink Current (mA)
750
Output Sink Current (mA)
25
Temperature (°C)
600
Typ.
450
300
Min.
150
600
Typ.
450
300
Min.
150
0
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (°C)
Figure 30A Output Sink Current vs Temperature
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Figure 30B Output Sink Current vs Voltage
11
IR2111(S) & (PbF)
100
160
75
30V
50
25
1E+3
1E+4
1E+5
30V
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (Hz)
Figure 31. IR2111 TJ vs. Frequency (IRFBC20)
Ω, VCC = 15V
RGATE = 33Ω
Figure 32. IR2111 TJ vs. Frequency (IRFBC30)
Ω, VCC = 15V
RGATE = 22Ω
320V 160V
150
30V
125
125
Ju n ctio n T e m p e ratu re (°C )
Ju n ctio n T e m p e ratu re (°C )
1E+6
100
Frequency (Hz)
150
100
75
50
25
0
1E+2
12
160V
125
125
0
1E+2
320V
150
320
Ju n ctio n T e m p e ratu re (°C )
Ju n ctio n T e m p e ratu re (°C )
150
1E+3
1E+4
1E+5
1E+6
320V 160V 30V
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (Hz)
Frequency (Hz)
Figure33. IR2111 TJ vs. Frequency (IRFBC40)
Ω, VCC = 15V
RGATE = 15Ω
Figure 34. IR2111 TJ vs. Frequency (IRFPC50)
Ω, VCC = 15V
RGATE = 10Ω
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IR2111(S) & (PbF)
320V 140V
320V
150
150
160
100
75
30V
50
25
0
1E+2
30V
125
1E+3
1E+4
1E+5
Ju n ctio n T e m p e ratu re (°C )
Ju n ctio n T e m p e ratu re (°C )
125
100
75
50
25
0
1E+2
1E+6
1E+3
1E+4
1E+6
Frequency (Hz)
Frequency (Hz)
Figure 35. IR2111S TJ vs. Frequency (IRFBC20)
Ω, VCC = 15V
RGATE = 33Ω
Figure 36. IR2111S TJ vs. Frequency (IRFBC30)
Ω, VCC = 15V
RGATE = 22Ω
320V 140V
150
320V 140V 30V
30V
150
125
125
Ju n ctio n T e m p e ratu re (°C )
Ju n ctio n T e m p e ratu re (°C )
1E+5
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (Hz)
Frequency (Hz)
Figure 37. IR2111S TJ vs. Frequency (IRFBC40)
Ω, VCC = 15V
RGATE = 15Ω
Figure 38. IR2111S TJ vs. Frequency (IRFPC50)
Ω, VCC = 15V
RGATE = 10Ω
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13
IR2111(S) & (PbF)
Case outlines
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
D
DIM
B
5
A
FOOTPRINT
8
6
7
6
5
H
E
1
6X
2
3
0.25 [.010]
4
e
A
6.46 [.255]
3X 1.27 [.050]
e1
0.25 [.010]
A1
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
.1574
3.80
4.00
E
.1497
e
.050 BASIC
e1
MAX
1.27 BASIC
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
y
0.10 [.004]
8X L
8X c
7
C A B
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
8-Lead SOIC
14
MIN
.0532
K x 45°
A
C
8X b
8X 1.78 [.070]
MILLIMETERS
MAX
A
8X 0.72 [.028]
INCHES
MIN
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
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IR2111(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRxxxxxx
YWW?
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2111 order IR2111
8-Lead SOIC IR2111S order IR2111S
Leadfree Part
8-Lead PDIP IR2111 order IR2111PbF
8-Lead SOIC IR2111S order IR2111SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 4/12/2004
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15