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A General Method for Analyzing Resonant and
Soft-charging Operation of Switched-Capacitor
Converters
Yutian Lei, Student Member, IEEE, Robert C.N. Pilawa-Podgurski, Member, IEEE
Abstract—Traditionally, switched-capacitor (SC) converters
have suffered from high transient currents, which limit both the
efficiency and power density of such converters. Soft-charging
operation can be employed to eliminate the current transients
and greatly improve the power density of SC converters. In this
approach, a second-stage magnetic converter is cascaded with the
SC stage to act as a controlled current load. Another approach is
to use resonant SC converters with zero current switching. This
paper shows that resonant and soft-charging operations of SC
converters are closely related, and a technique will be proposed
which achieves either operation by adding a single inductor
to existing SC topologies. In addition, since most preexisting
resonant or soft-charging SC converters were devised in an ad
hoc manner, this paper formulates an analytical method that
can determine whether an existing conventional SC converter
topology is compatible with the proposed approach. A number
of common SC topologies are analyzed, including Dickson, seriesparallel, ladder, Fibonacci and doubler configurations. Through
comparison to simulated results as well as experimental work, the
proposed method is validated and a family of high performance
SC converters is obtained.
Index Terms—soft-charging, switched-capacitor converter, zero
current switching, resonant.
I. I NTRODUCTION
OLTAGE-SOURCE power converters are predominantly
implemented using magnetic components (inductors or
transformers) as energy storage elements. Due to their relatively low energy density, the magnetic components are
bulky in size and costly to build. On the other hand, the
efficiency and power-density of dc-dc converters need to be
continuously improved due to increasing demands in areas
such as computing and portable devices. As a result, switchedcapacitor (SC) converters [1]–[10] are gaining popularity.
These converters use capacitors as the energy storage element
and consequently can achieve higher power density and greater
suitability for on-chip integration compared to magnetic-based
converters. Additionally, SC converters also tend to achieve a
higher efficiency at large voltage conversion ratios [11]. These
advantages make SC converters desirable for a broad range
of applications, including voltage balancing [2], [3], energy
buffering [4], CMOS integrated power conversion [5], [7], [12]
and renewable energy harvesting [8].
However, SC converters also have certain drawbacks, which
limit their performance in some applications [13]. Since the
V
The authors are with the Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, 61801, USA.
E-mail: {lei10, pilawa}@illinois.edu
capacitors are directly charged/discharged by other capacitors
or voltage sources, large transient current spikes can occur,
which limit the efficiency and power density of the converter. Moreover, these transient effects increase the device
stress and can cause undesirable electromagnetic interference
(EMI) problems. To reduce the current spikes, either large
capacitors or higher switching frequency has to be employed,
neither of which is a satisfactory solution. The quasi-switchedcapacitor converter given in [14] manages to reduce the
peak of the current transient, but results in the same power
loss as conventional SC converters. Resonant SC converters
(or soft-switching SC converters), which incorporate one or
more inductors, have been proposed to eliminate the current
transients [15]–[25]. Because of the resonant inductor, the
capacitor current becomes sinusoidal, and if the switching
takes place at the moment when the current reaches zero,
resonant SC converters can operate in zero current switching
(ZCS) mode. This mode of operation enables such converters
to operate at higher frequencies and achieve higher power
density than their hard-switched counterparts.
Another drawback of SC converters is that high efficiency is
only achieved at one or a few conversion ratios. This limits the
application of SC converters to mostly low power applications.
In higher power applications, the solution is usually to cascade
a magnetic converter to act as a post-regulation stage [26]–
[29]. However, the overall converter size may increase and
the peak conversion efficiency may be reduced.
An effective method to enable lossless regulation and eliminate the detrimental current transients in SC converters simultaneously is called soft-charging operation, as first demonstrated with a merged two-stage converter in [30], [31]. In this
architecture, a second-stage buck converter is cascaded to the
output of a step-down SC converter and acts as a controlled
current load. The buck converter operates at a low voltage
and high frequency, enabling high bandwidth regulation and
reduced magnetic component size. The difference between
soft-charging operation and the aforementioned two stage
designs is that in soft-charging operation, the output capacitor
of the SC stage is removed and the flying capacitors of the
SC converter are charged/discharged by a controlled current
source (the buck converter). This mode of operation eliminates
current transients, enabling the SC converter to operate with
large capacitor voltage ripples with high efficiency. Larger capacitor voltage ripples result in larger energy transfer through
capacitors in each switching cycle, yielding significant power
density improvements of the SC converter. Therefore, the size
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II. C APACITOR C HARGE S HARING L OSS AND
S OFT- CHARGING C ONCEPT
A generic SC converter model is shown in Fig. 1, which
consists of an ideal fixed-conversion-ratio stage with an
output-referred impedance [35]. The output impedance directly
reflects the efficiency of the converter, and incorporates both
the conduction loss and the capacitor charging/discharging
loss. This impedance is usually plotted against the switching
frequency to reveal the characteristics of the SC converters. A
typical such plot is shown in Fig. 2, which shows two asymptotic operating regions for SC converters: the fast switching
limit (FSL) and the slow switching limit (SSL) [11] [36]–
[39]. The FSL occurs at high switching frequencies, when the
dominating loss is the conduction loss due to the resistance
of the switches as well as the ESR of the capacitors. As can
be seen in Fig. 2, the output impedance in the FSL region is
independent of the switching frequency. On the other hand,
the SSL occurs at low switching frequencies, when the output
impedance is dominated by the charging/discharging loss of
the capacitors during the charge redistribution process at phase
transitions. The SSL impedance depends on the switching
frequency and capacitor values, and cannot be reduced by
m:n
+
Rout
+
Vin
Vout
-
-
Fig. 1: Generic model of a switched-capacitor converter.
100
Output impedance (Ω)
of both the buck converter as well as the SC converter can
be reduced. It is also possible to achieve the same regulated
soft-charging operation by adding only an inductor and utilizes
the existing switches from the SC converter to form a buck
converter cell. In this approach, no additional switches are
necessary and the control of the converter is simlified [32] The
switched-capacitor stage employed in [30], [31] had a seriesparallel configuration that readily lends itself to soft-charging
operation. Another recent implementation of the soft-charging
two-stage design utilizes a variable ratio SC stage and achieves
significant power density improvements over conventional
approaches [33], [34]. There are many SC topologies that
may also be designed to operate in soft-charging mode and
yield similar benefits, but to date, no formal method exists to
evaluate SC converters for their potential use in soft-charging
architecture. One of the main contributions of this work is the
development of such a formal method.
In this paper, the origin of the transient current and associated loss are first introduced and the concept of soft-charging
revisited. The requirements imposed on the SC converters by
soft-charging operation are postulated. Resonant SC converters
and soft-charging SC converters are then analyzed, and it is
shown that their terminal behaviors are closely related. This
makes it possible to use similar techniques to analyze and
synthesize both types of converters. We present a technique
to achieve soft-charging or resonant mode of operation with
a single inductor added to existing SC converter topologies.
In addition, in order to expand the family of soft-charging SC
converters, a formal method is presented to analyze arbitrary
SC topologies to determine their suitability for the proposed
technique. Supported by simulation and experimental results,
this new family of SC converters is shown to have the
potential to achieve a higher efficiency and higher power
density compared to traditional SC converters.
SSL
10−1
FSL
105
106
Frequency (Hz)
107
Fig. 2: Output impedance of a typical SC converter.
lowering the series resistance. Fundamentally, the SSL power
loss is the result of charging/discharging the capacitor with a
constant voltage source or another capacitor, as illustrated in
Fig. 3a and Fig. 3b respectively. We will examine case 2 (Fig.
3b) more closely since case 1 (Fig. 3a) can be seen identical to
case 2 with C2 being infinite. When the switch closes, since the
capacitor voltage cannot change instantaneously, the mismatch
of the initial capacitor voltages will be present across the
series resistor, resulting in a large instantaneous current as
shown in Fig. 4. The power loss incurred for complete charge
redistribution for the schematic showing in Fig. 3b can be
easily calculated and is given by
1
C1 (VC1(t=0) − VC2(t=0) )2 fsw
4
1
2
fsw ,
(1)
= C1 ∆V(t=0)
4
assuming C1 = C2 . This equation is valid provided that the
duration of each phase is much larger than the time-constant
of the circuit, i.e. in SSL region of operation. As can be
seen, this power loss does not depend on the value of the
series resistance. Instead, it depends on the initial voltage
difference between the capacitors. Additionally, the initial
difference in capacitor voltages is due to the charge transfer in
the previous cycle, and thus is proportional to the charge drawn
by the load and inversely proportional to the capacitor values.
Moreover, the change of charge in the capacitor is proportional
to the duration of the charge/discharge, and thus is inversely
proportional to the switching frequency. These relations are
summarized below.
1
1
,
,
(2)
∆V ∝
fsw Cf ly
Ploss =
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RESR
+
− Vin
RESR
C1
C2
(a) Capacitor charged by a
voltage source.
C1
(b) Capacitor charged by another capacitor.
Fig. 3: Basic capacitor charging scenarios.
0.8
Voltage (V)
100
Voltage of C1
Voltage of C2
80
0.6
60
0.4
40
0.2
0
20
Current of C2
0
0.2
0.4
0.6
0.8
Time (s)
Current (A)
1
0
1.2
1
·10
−5
Fig. 4: Capacitor voltages and current waveform in charge
redistribution process.
where Cf ly represents the overall flying capacitor value, and
for the circuit in Fig. 3b, it is simply C1 . Substituting (2) into
the power loss equation in (1), we have
Ploss ∝
1
1
,
fsw Cf ly .
(3)
For more complex SC converters, more complicated charge
sharing scenarios will arise, but the general relationship stays
the same, as shown by the analytical results given in [11].
To reduce the charge sharing loss, one may simply increase
the switching frequency so that the converter operates in the
FSL region. However, it is often not favorable to do so, since
the transistor switching losses, as well as the bottom plate
capacitance losses in integrated SC converters, increase as
the switching frequency increases. Alternatively, increasing the
flying capacitor values can push the FSL region of operation
to a lower frequency, but it inevitably increases the circuit size
and cost. To overcome this dilemma, the soft-charging technique was proposed to eliminate the capacitor charge sharing
loss [30]. In soft-charging operation, a controlled current load
is placed in the charging/discharging paths of the capacitors.
The majority of the voltage mismatch between the capacitors
and the input/output will be present across the current load,
instead of across the switch resistance. With this technique,
the capacitor charging loss that is present in conventional SC
converters is recovered through the controlled current load,
which typically is a high frequency magnetic converter. As a
result, smaller capacitance can be used without sacrificing the
efficiency, despite the resultant larger capacitor voltage ripples.
This is the key benefit of soft-charging operation.
Given the origin of the charge sharing loss, this paper
postulates two requirements for achieving soft-charging operation. The first requirement is that the load must behave
as a controlled current source, whose voltage is permitted
to change instantaneously to accommodate the voltage mismatch between the flying capacitors and the load during
phase transitions. In practice however, the majority of the
loads are voltage-source loads or current-source loads with
large decoupling capacitors. Therefore, an interfacing element
typically has to be inserted between the SC converters and
the voltage-source load. Buck converters can be such an
interfacing element, providing controlled charging/discharging
of the capacitors while regulating the output voltage [30], [31].
As will be shown in Section III, the buck converter can also
be replaced by an inductor, while still achieving soft-charging
operation.
The second requirement for soft-charging operation is that
there should be no voltage mismatch within the flying capacitor network during phase transitions. In [30], [31], a
series-parallel SC stage was chosen as the SC topology,
since the flying capacitors are simultaneously connected to
the output either in series or in parallel, and therefore, can
always be charged/discharged in the same manner through
the load current. Other SC topologies tend to have more
complex switching configuration and it is not immediately
apparent whether soft-charging of all flying capacitors can
be achieved by cascading a second-stage converter (or an
inductor) alone. Section IV introduces a formal method for
evaluating an arbitrary SC topology and determining whether
soft-charging operation is possible. This method replaces the
ad-hoc approaches that have been employed to date [30], [33].
III. S OFT- CHARGING O PERATION WITH AN I NDUCTOR
Since an inductor allows instantaneous change of its terminal voltage, it can also act as a controlled current load
[40] [32]. In fact, the buck converter is able to facilitate
soft-charging operation precisely because of the inductor it
contains. In this section, the technique of adding an inductor
alone to achieve soft-charging is presented. Furthermore, it
will be shown that resonant operation can also be achieved
using the same technique.
To illustrate the technique, a simple 2-to-1 SC converter
is shown in Fig. 5a, and a modified structure is shown in
Fig. 5b. As can be seen in Fig. 5b, the technique to achieve
resonant and soft-charging operation is to add an inductor at
the output of the SC converter, immediately before the output
capacitor. The simple circuit structure in Fig. 5b allows direct
circuit analysis using differential equations [40]. Figure 6 plots
the simulated output impedance as a function of frequency
for both the original SC converter (Fig. 5a), as well as the
modified converter (Fig. 5b). It can be seen that for the original
SC converter, the output impedance reduces as the frequency
increases, while leveling off at high frequencies, marking the
transition from SSL to FSL. The output impedance curve
is more complicated for the modified converter, but a few
key observations can be made. First, with the additional
inductor, the modified converter is able to reach the same
minimum impedance at a much lower switching frequency,
due to the elimination of the current transient and associated
loss. Therefore, the proposed converter can achieve the same
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φ1
Vin
+
φ2
Cfly
+
−
φ1
φ2
Vload
Cout
(a) Example 2-to-1 SC converter.
L1
φ1
Vin
φ2
+
+
Cfly
+
−
φ2
Vsc
φ1
Cout
Vload
-
(b) Example 2-to-1 SC converter with an inductor.
Fig. 5: Schematics of a simple SC converter.
ConventionalhSChconverter
SChconverterhwithhanhoutputhinductor
0
Outputhimpedanceh(Ω)
10
−1
10
h
4
10
5
10
Frequencyh(Hz)
6
10
Fig. 6: Simulated output impedance vs frequency.
efficiency as conventional SC converters while using significantly lower switching frequency, or equivalently, significantly
smaller flying capacitor values. The second observation is that,
at lower frequencies, the output impedance oscillates around
the SSL impedance of the conventional SC converter.
The minimum frequency at which the converter is able to
stay in FSL operation can be defined as fcrit and for the
modified converter in Fig. 5b, it is given by
1
√
(4)
fcrit =
2π LC
where L is the added inductance and C is the collective
capacitance in series with the inductor. In the case of the
example SC converter in Fig. 5b, the capacitance is simply
Cf ly . For more complex SC converter topologies, this equivalent capacitance can be obtained by calculating the equivalent
series and parallel connected capacitance at the inductor input
node for each phase. For instance, for the 4-to-1 Dickson
converter shown later in Fig. 10, the effective capacitance in
Phase 1 is (C1 k C2 + C3 ) and the capacitance in Phase 2
is (C2 k C3 + C1 ). Both phases have the same equivalent
capacitance of 1.5C1 assuming C1 = C2 = C3 . For converter
topologies that have different equivalent capacitance in each
phase (such as the Fibonacci and series-parallel), there is a critical frequency for each phase, and the overall critical frequency
is the weighted average of the individual frequencies according
to the duty ratio. Note that the critical frequency corresponds
to the resonant frequency of the circuit. To understand the
frequency dependent behavior of the modified SC converter,
the terminal voltage before the inductor (Vsc in Fig. 5b) as
well as the inductor current are shown in Fig. 7 at 3 different
frequencies - the resonant frequency (fcrit ) as well as below
(f2 ) and above (f1 ) the resonant frequency. It can be seen that,
above the resonant frequency, the current waveform (Fig. 7a)
is smooth and has small ripple, due to the filtering effect of the
inductor. Moreover, since the flying capacitor is always in the
same current path as the inductor, the conventional current
spikes of the capacitor are eliminated, and the capacitors
transfer charges in soft-charging mode, with no charge transfer
loss. The effect of this can be seen directly from Fig. 6, where
for switching frequencies larger than the critical frequency,
the SC converter has the minimum FSL output impedance. As
the switching frequency is reduced, the current waveform has
larger ripple, while having the same average value, since the
load current is kept constant. At the resonant frequency, fcrit ,
the inductor current takes the shape of a rectified sinusoid,
and the current reaches zero at moments of phase transitions,
as shown in Fig. 7b. Thus, zero current switching can be
achieved at the resonant frequency. As can be seen in Fig. 6,
the impedance of the converter at resonance is slightly larger
than the FSL impedance. This is because the sinusoidal current
has larger RMS value than the near constant current in FSL
operation. As the switching frequency is reduced further (Fig.
7c), the inductor current drops negative during each cycle,
resulting in a much larger RMS current for the same average
power delivered. This is why the impedance increases sharply
for fsw < fcrit . At one half of the resonant frequency defined
by (4), the current becomes nearly a full-wave sinusoid, giving
a peak impedance in Fig. 6. This peak repeats itself at lower
frequencies when the current waveform has multiple periods of
the full-wave sinusoid, at fsw = n1 fcrit , where n is an integer
and n ≥ 2. Therefore, fcrit given in (4) sets the lower bound
on the switching frequency for which near FSL impedance in
soft-charging operation can be achieved.
It can be noted that the reduction in frequency and capacitance with soft-charging operation can be achieved but at the
expense of adding an inductor. While the trade-off between
the capacitor values and inductor values should be evaluated
on a case-by-case basis, in general, adding an inductor results
in better utilization of passive components than simply using
larger capacitance. For a traditional SC converter circuit,
whether the high current transient takes place is determined
by the time constant of the circuit - RESR C, where RESR
is the series resistance in each conducting branch and C is
the capacitance in each branch. Thus the critical frequency at
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sc
8
8.5
Vsc (V)
(V)
8.5
8
V
Vsc (V)
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10.1109/TPEL.2014.2377738, IEEE Transactions on Power Electronics
7.5
7.5
0
2
4
6
0
5
Time (µs)
0
2
4
6
10
5
0
−5
0
5
Time (µs)
Time (µs)
(a) fsw = f1 > fcrit .
8
7
10
iL (A)
L
10
5
0
−5
i (A)
iL (A)
Time (µs)
9
10
10
5
0
−5
0
5
10
Time (µs)
15
20
0
5
10
Time (µs)
15
20
(b) fsw = fcrit .
(c) fsw = f2 < fcrit .
Fig. 7: SC stage voltage (Vsc in Fig. 5b) and inductor current of the modified 2-to-1 converter.
which the conventional SC converter enters FSL operation is
on
(5)
It can be seen that the switching frequency is inversely proportional to the product of the equivalent series resistance and
capacitance. Thus, for a given desired critical frequency, the
capacitance must be increased if the resistance is lowered. This
limitation can be clearly seen in Fig. 8a, where the power loss
of a pure SC converter is plotted against two different switch
Rds,on values. Even when the Rds,on of the switch is reduced
by a factor of 10, to see a factor of 10 reduction in the power
loss, one needs to increase the switching frequency by a factor
of 10, or equivalently, increase the capacitor values by a factor
of 10. This is due to the inversely proportional relationship
among the resistance, capacitance and switching frequency. On
the other hand, with the additional inductor presented here, the
critical frequency is decoupled from the series resistance, and
only depends on the inductance and the capacitance, as shown
in (4). The effect can be seen in Fig. 8b, where a reduction in
the series resistance instantly brings a nearly equal reduction in
power loss, without the need to increase the capacitance nor
the frequency. Therefore, the addition of the inductor gives
the designer the choice of using smaller on-state-resistance
switches and introduces a new design dimension in which
the converter can be optimized. Also can be observed from
Fig. 8b is that oscillation does not occur for the case of
Ronq= 100 mΩ. This is because the system is over-damped
( R2 C
L < 1) for large resistance values. In this case, the RC
time constant starts to dominate the frequency response of the
system again, and soft-charging operation does not take place.
As a result, there is no change in power loss by adding the
small inductor, as can be seen by comparing the red dotted
lines in Fig. 8a and Fig. 8b. In this case, a larger inductance
would have been needed to achieve a reduction in power loss in
the SSL region. Therefore, in addition to the critical switching
frequency requirement given in (4), the soft-charging (as well
as resonant) SC converters need
q to be designed such that the
system is under-damped ( R2 C
L < 1). Nevertheless, a lower
series resistance is one of the goals for power converters aiming for high conversion efficiency, especially for applications
with small load resistances. This naturally coincides with the
R =10 mΩ
Power loss (W)
2πRESR C
R =100 mΩ
on
0
10
−1
10
−2
10
4
10
5
6
10
7
10
10
Frequency (Hz)
(a) Conventional SC converter.
1
10
R =100 mΩ
on
R =10 mΩ
Power loss (W)
fcrit =
1
1
10
on
0
10
−1
10
−2
10
4
10
5
6
10
10
7
10
Frequency (Hz)
(b) Soft-charging SC converter.
Fig. 8: Power loss at different frequencies for different Rds,on
values, for the circuit in Fig. 5.
Simulation parameters: C = 10 µF , L = 0.1 µH
design goal of the soft-charging SC converters. In discrete
implementations, the addition of the inductors often results
in overall improvement in energy utilization of the passive
components. While the inductor is more difficult to integrate
than the capacitors given the current IC technology, the energy
density and quality of integrated inductors are improving as
more advanced processes are adopted [13], [41], [42], and the
proposed converter is able to take advantage of the progress
and advancement of technologies in inductors, capacitors and
switches simultaneously.
IV. A NALYZING AN A RBITRARY SC T OPOLOGY FOR
S OFT- CHARGING O PERATION
It was shown in the previous section that resonant and softcharging operation are closely related and both modes of op-
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eration can be achieved with a single additional inductor. The
example used was a 2-to-1 SC converter, which easily satisfies
the second condition given in Section II, which states that to
achieve full soft-charging operation, there can be no voltage
mismatch among the flying capacitors during phase transitions.
The example 2-to-1 SC converter satisfies this condition easily
since it only has a single flying capacitance. More complicated
SC converters have multiple flying capacitors connected in
a number of different configurations. Thus, it is of great
interest to determine whether this proposed technique can be
broadly applied to other SC converter topologies. To answer
this question, a general method is derived in this section to
determine if an arbitrary SC converter topology can operate
in resonance or soft-charging operation with the addition of an
output inductor [43]. Since resonance with the inductor at the
output can be viewed as soft-charging operation at a special
switching frequency, only the term, soft-charging, is used in
this section for convenience.
In essence, the proposed method examines the charge flow
characteristics of an SC converter topology and observes the
change in capacitor voltage subject to Kirchhoff’s Voltage Law
(KVL) constraints. In each phase of the SC converter, the
voltage across a capacitor changes according to the charge
flow in the given phase. When the converter switches to the
next phase, KVL poses new constraints on each component.
Complete soft-charging is achieved if and only if the ideal
capacitor network satisfies KVL at all times, including at
phase transitions. If during any period, the KVL constraint
is not satisfied, the voltage discrepancy will appear across the
series resistances, resulting in a charge transfer impulse. The
KVL constraint is present whether soft-charging or resonant
operation is of interest, and thus the analysis presented in this
section applies to both operations.
A. General analysis using Dickson converter as an example
The analysis method in this work is illustrated with a 4-to-1
SC converter in Dickson configuration [5], [44], [45] shown
in Fig. 9. To simplify the analysis, a constant current source
is used as the load for this and all following examples, while
we note that a practical implementation would use a magneticbased converter or an inductor. The two phases of the Dickson
topology are shown in Fig. 10a and Fig. 10b respectively. In
each phase of Fig. 10, the circuit consists of a number of closed
loops, and a KVL equation can be written for each loop. For
example, the following two independent KVL equations can
be written for phase 1 of the Dickson converter (Fig. 10a):
(
Vin − VC3 − Vout = 0
(6)
VC2 − VC1 − Vout = 0
and for phase 2 (Fig. 10b):
(
VC3 − VC2 − Vout = 0
VC1 − Vout = 0
(7)
These KVL equations can be written in a matrix-vectorproduct form as
Ai vi = 0,
(8)
C3
C1
Vin
φ1
+
−
φ2
φ1
φ1
φ2
φ2
Iload
φ1
φ2
C2
Fig. 9: 4-to-1 Dickson topology.
C2
C3
Vin
+
−
C1
C3
Iload
C2
(a) Phase 1.
C1
Iload
(b) Phase 2.
Fig. 10: 4-to-1 Dickson topology in each phase.
where Ai is called the reduced loop matrix of the ith phase
[46] and the voltage vector v is defined as
v = [vin vc1 vc2 vc3 vout ]T
T
T
= [vin vc vout ]
(9)
(10)
In this analysis, the entries of the loop matrices are positive if
the circuit element is traversed from the negative terminal to
the positive terminal and vice versa. Combining the definitions
in (8) (9) and the KVL equations in (6) (7), the loop matrices
are found to be
1 0 0 −1 −1
0 0 −1 1 −1
A1 =
and A2 =
.
0 −1 1 0 −1
0 1 0 0 −1
Denoting the voltage vector at the start of phase 1 as v1 , KVL
analysis yields
A1 v1 = 0,
(11)
which captures the KVL constraints given by (6) at the
moment when the converter has begun phase 1 operation. At
the end of phase 1, the voltage vector becomes v1 + ∆v1 ,
creating a second KVL constraint:
A1 (v1 + ∆v1 ) = 0,
(12)
where ∆v represents the change in voltage due to charge
being delivered to the load, and is in the form of
[∆vin ∆vc T ∆vout ]T , similar to the voltage vector in (9)
. Since both (11) and (12) must be satisfied, a resulting
constraint is that the vector ∆v must satisfy
A1 ∆v1 = 0.
(13)
From a circuit intuition point of view, (13) describes the fact
while the individual node voltages can (and will) change as a
result of charge transfers, the sum of the changes in a KVL
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loop must be zero. Similarly for phase 2, we have
(14)
2
A2 ∆v = 0.
Note that the ∆vin component of ∆vi is typically zero since
the input voltage is considered constant. This information can
be included in the loop matrices by adding a row of [1 0 0 0 0]
to both A1 and A2 , resulting in A1m and A2m respectively,
where the subscript m indicates a modified reduced loop
matrix. Correspondingly, (13) and (14) become
(15)
A1m ∆v1 = 0
(16)
2
A2m ∆v = 0
The solution to (15) and (16) represents the set of permissible
voltage changes that satisfy KVL and ∆vin = 0. This solution
is the nullspace of A1m and A2m , by definition. Let w and
u be the collective basis for nullspaces of A1m and A2m
respectively. It follows that any solution to (15) and (16) can
be represented by a linear combination of the basis:
∆v1 = a1 w1 + a2 w2
(17)
∆v = b1 u1 + b2 u2
(18)
2
In the case of the 4-to-1 Dickson converter, such basis can be
found1 as
 0   0 
 0   0 






 0.362
 0.607

  0.518 

 −0.482
w =  0.763   0.131  and u = 0.398 −0.664 .




 0.761 −0.146 
 −0.157 −0.613 
0.157
0.613
0.362
0.518
For conventional SC converters, we have the additional
constraint that
∆v1 = −∆v2 ,
(19)
from the condition of periodic steady-state operation. This is
because in a capacitive network, the voltage changes must sum
up to zero in a full switching cycle. Combining (17) (18) and
(19), we have
a1 w1 + a2 w2 + b2 u1 + b2 u2 = 0 .
Note that (20) can be written in a matrix form as
 
a1
a2 

w1 w2 u1 u2 
 b1  = 0 .
b2
(20)
(21)
For the conventional Dickson SC converter, no solution for
(21) can be found, except for the trivial case of zero. This
means that no voltage change exists for the circuit that satisfy
KVL at all times. This result is reassuring and consistent
with the behavior of conventional SC converters, where it is
well-known that this instantaneous voltage mismatch at phase
transitions is what gives rise to the power loss from charge
redistribution [11]. Hence, conventional SC converters have to
rely on high switching frequency or larger capacitor values
to minimize the voltage mismatch and the associated power
loss.
1 For example, by using the command ”null” in Matlab, which will yield a
set of orthonormal basis.
However, with soft-charging operation, the SC stage output
node is connected to an inductor, and the inductor voltage is
allowed to change instantaneously during phase transitions, as
opposed to the capacitor voltages, which must be continuous.
Stated in another way, the parameter ∆vout defined previously
is no longer a state variable in a switch-linear circuit, and can
be discontinuous. As a result, the change in output voltage in
1
phase 1 due to the current load, ∆vout
, does not necessarily
2
equal −∆vout . Therefore, the inductor introduces one more
degree of freedom to the system. To mathematically express
this additional degree of freedom, the basis w and u can be
modified by removing the last element in each column (the
entry that represents ∆vout ), resulting in the new basis w̄ and
ū. Now, replacing the basis in (21) with the newly formed w̄
and ū, we obtain for the soft-charging converter:
 
a1
a2 

w̄1 w̄2 ū1 ū2 
(22)
 b1  = 0 .
b2
Mathematically. the matrix in (22) has a reduced rank compared to the one in (21), and thus a non-zero solution can be
found. Solving (22) for the Dickson converter, we obtain
  

a1
0.120
a2  −0.697
 =

(23)
 b1  −0.607 .
−0.364
b2
The voltage change vectors in each phase can then be found
using (17) (18), yielding




0
0
−0.408
 0.408 




2
1



(24)
∆v =  0  and ∆v = 
 0 .
−0.408
 0.4088 
−0.408
−0.408
Note that the original basis are used to obtain the voltage
change at each node. From (24), it can be seen that the net
change in the capacitor voltages is zero (i.e., each column adds
to zero), except for the last entry. This entry represents ∆vout ,
which is the node that can be discontinuous owing to the softcharging operation. Having obtained the change in capacitor
voltage required to satisfy KVL in each phase, we can then
calculate the required capacitance for soft-charging operation
as:
Cj = qj /∆vcj ,
(25)
for each capacitor j. Equation (25) requires the charge that
flows into each flying capacitor to be found for each phase.
For any well-posed switched-capacitor topology, a charge flow
vector can be obtained for each phase either by inspection [11]
or Kirchhoff’s Current Law [36]. In this work, the charge flow
vector is defined as the vector of charge that flows into the
positive terminal of each element in the circuit and is given
in the form of
q = qin qc1 qc2 qc3 qout .
The charge flow vectors for the Dickson converter of this
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100
−1
1
−1
Hard-charging
Soft-charging 1
Soft-charging 2
2 .
Together with the voltage change vector found in (24), the
capacitor values are obtained using (25) and are simplified as
follows.
   
C1
1
C2  = ∞
C3
1
It can be seen that the Dickson topology can achieve complete
soft-charging only when C2 = ∞ and C1 = C3 . In practice,
this means that it can approach soft-charging with a C2 large
enough compared to C1 and C3 . As can be seen from (24), the
output voltage ripple has the same magnitude as the voltage
ripple of C1 and C3 under soft-charging operation. Thus, for
soft-charging operation with the Dickson converter, a designer
would want to minimize the charging/discharging loss by
maintaining a relatively large C2 /C1 ratio while keeping the
output ripple of the SC stage tolerable with a second-stage
converter or an inductor.
To summarize, the following steps are used to determine
whether any given SC topology is compatible with softcharging or resonant operation using a single inductor connected to the output of the SC stage:
1) Obtain the reduced loop matrix for each phase (A1 and
A2 ) using KVL analysis.
2) Add a row of [1 0 0 ... 0] to A1 and A2 , obtaining
A1m and A2m .
3) Find the collective nullspace basis of A1m and A2m
(w and u respectively).
4) Remove the last row of w and u to obtain w̄ and ū.
5) Use (22), (17) and (18) to find the change in capacitor
voltages.
6) Find the charge transfer vector for each capacitor [11],
[36].
7) Use (25) to find the capacitance values required for softcharging.
As demonstrated in this section, for a two-phase SC dc-dc
converter, if a capacitor voltage change vector, ∆vc , can be
found to satisfy KVL at all times, and the resultant capacitor
values required are practical (finite and positive), the given
topology is able to perform soft-charging and resonant operation and will exhibit no charging/discharging loss. Otherwise,
at least one loop of the circuit will not be able to perform
soft-charging, and the benefit will be limited.
Power loss (W)
example are found to be
q1 = −1 1 −1 1 2 and q2 = 0
10−1
105
106
Frequency (Hz)
Fig. 11: Power loss of Dickson converter at different frequencies.
as switching frequency increases, while leveling off at high
frequency, showing the transition from SSL to FSL. In softcharging operation, a significant reduction in power loss at
lower frequencies is seen when the capacitors are such that
C1 = C2 = C3 , as in the hard-charging case. However, a
more prominent reduction is seen when the capacitor values
are chosen such that C2 /C1 = 4, plotted in Fig. 11 as ’Softcharging 2’. This confirms that the Dickson converter can
approach full soft-charging by maintaining a high C2 /C1 ratio,
as predicted by the analysis in this work.
The currents through the capacitor C2 of the Dickson SC
converter (Fig. 9) in hard-charging and soft-charging operations with the converter switching at 250 kHz are shown
in Fig. 12. The different waveforms are shifted apart in the
time axis for clearer observation. It can be seen that under
hard-charging condition, the capacitor current resembles the
exponential discharge, as expected. With soft-charging 1, both
the magnitude and the width of the impulse are reduced,
while the tail of the exponential decay is raised. In the softcharging 2 case, with capacitor values selected according to
the analysis result, the height and the width of the impulse
is further reduced and current waveform resembles more of a
square wave. The transient effect is not completely eliminated,
TABLE I: Simulation parameters.
Vin
Iload
5V
2A
Ron
RESR
10 mΩ
1 mΩ
Co,hard−charging
Co,sof t−charging
100 µF
0.1 µF
B. Simulation verification
To verify that the analytical method is correct, the Dickson
converter shown in Fig. 9 is simulated using LTSpice with
simulation parameters given in Table I and Table II. A total
capacitance of 30 µF is used for the flying capacitors. In
hard-charging (conventional) operation, an additional 100 µF
output capacitor is added in parallel to the current load while
there is no output capacitance in the soft-charging simulation.
The converters are operated at a fixed duty ratio of 0.5.
The simulated power losses are plotted in Fig. 11. It can
be seen that the hard-charging power loss decreases linearly
TABLE II: Flying capacitor values.
Configuration
C1 (µF)
C2 (µF)
C3 (µF)
Hard-charging
Soft-charging 1
Soft-charging 2
10
10
5
10
10
20
10
10
5
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15
10
Current (A)
5
0
−5
Hard−charging
Soft−charging 1
Soft−charging 2
−10
−15
1
2
3
4
5
Time (µs)
6
7
8
Fig. 12: Current waveform of capacitor C2 of the Dickson SC
converter.
TABLE III: The RMS and average current of capacitor C2 in
a single phase.
Configuration
Hard-charging
Soft-charging 1
Soft-charging 2
RMS current (A)
Average current (A)
2.19
1.40
1.11
1.00
1.00
1.00
due to the fact that perfect soft-charging cannot be achieved.
To quantify the change in the current waveform, the RMS
and the average currents through the capacitor for one phase
duration are calculated and tabulated in Table III. It can be
seen that while in all cases the capacitor supplies the same
average current over a phase duration, the RMS value of
the current decreases from hard-charging operation to softcharging operation. Again soft-charging 2 is an improvement
over soft-charging 1. Thus, the soft-charging operation reduces
the impedance in the SSL region due to the improvement in
the charging and discharging current waveform.
C. Application to other topologies
The general analysis method proposed is applied to four
additional commonly used two phase switched-capacitor converter topologies - series-parallel, ladder, Fibonacci and doubler. The schematics are shown in Fig. 13a, 13b, 13c and 13d
respectively. The same analysis is repeated for each of them
and the results are shown in Fig. 14.
It can be seen that for the series-parallel converter, a simple
requirement for soft-charging is that all the flying capacitors
have the same value. Under soft-charging condition, the output
voltage ripple is shown to be equal to N − 1 times the change
in any of the capacitor voltages, where N is the conversion
ratio. These observations agree with the experimental work in
[30]. In addition, the Fibonacci converter is also found capable
of soft-charging operation with equal capacitors. On the other
hand, for the ladder configuration, one can see that a negative
capacitance is needed on C2 for soft-charging operation, which
is not achievable. This means that the change in capacitor
voltage of C2 is in the opposite direction of what is required
to satisfy KVL. Thus, the single-output ladder topology is
not compatible with soft-charging without modification, and a
limited improvement is expected. As for the doubler converter,
both C1 and C2 have to be infinite for complete soft-charging,
indicating a partial soft-charging capability similar to that of
the Dickson converter.
To verify the analysis results, the circuits shown in Fig.
13 are simulated with the same parameters as those of the
Dickson converter. Equal flying capacitors are used in all
cases. Again, a constant current source is used as the load
instead of an inductor to simplify the simulation and remove
the effect of resonance, since in practice, operation below the
critical frequency is to be avoided as shown in Section III.
The corresponding power loss curves are plotted in Fig. 15.
It should be noted that the power loss values are not intended
for cross-comparison between different SC topologies. Rather,
it is the reduction of the power loss by changing from
hard-charging operation to soft-charging operation that is of
key interest here. For both the series-parallel converter and
the Fibonacci converter, soft-charging operation results in a
significantly lower power loss in SSL region than in the
hard-charging case, and the loss is almost independent of
the frequency. The ladder configuration only receives very
limited benefit from soft-charging and a strong frequency
dependency is still seen on the power loss plotted in Fig. 15b.
The doubler converter shows moderate improvement with softcharging. These simulation results agree with the prediction of
the analytical technique presented earlier.
Since the Fibonacci converter is shown to be able to achieve
full soft-charging operation, it is useful to examine the current
waveform of the Fibonacci converter, as shown in Fig. 16. It
can be seen that the waveform in soft-charging operation is a
square wave, confirming that the current transient associated
with capacitor charge redistribution has been eliminated. Table IV shows the RMS and average of the absolute values of
the current through capacitor C3 of the Fibonacci converter. It
can be seen that now the RMS current is almost equal to the
average current in the soft-charging case, ensuring the lowest
power loss.
TABLE IV: The RMS and average of the absolute current of
capacitor C2 of the Fibonacci converter.
Configuration
RMS current (A)
Average current (A)
hard-charging
soft-charging
1.45
0.816
0.800
0.800
V. R ESONANT O PERATION WITH A S INGLE I NDUCTOR
Resonant SC converters [15]–[25] have been proposed as an
alternative that offers higher power density and lower switching loss compared to conventional SC converters. Resonant
SC converters achieve ZCS operation by adding one or more
inductors to a known SC topology [15]–[20], or in some cases
making use of distributed inductance to shape the charge and
discharge current [21]–[25]. While the inductor placement
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φ2
Iload
φ2
C2
φ2
φ1
Vin
+
−
C3
φ1
φ1
C2
φ2
φ1
C1
φ2
φ2
Co
Vin
Iload
+
−
φ1
φ2
+
Vin −
φ2
C3
φ1
C2
φ1
φ2
φ1
C1
φ1
φ1
φ2
φ1
φ2
C1
(b) 3-to-1 ladder.
φ2
φ2
φ1
C3
(a) 4-to-1 series-parallel.
φ1
Co
φ2
φ1
C3
+
Vin −
Iload
Co
φ2
φ2
C1
φ1
φ2
(c) 5-to-1 Fibonacci.
φ1
φ2
C2
Co
Iload
(d) 4-to-1 doubler.
Fig. 13: Common switched-capacitor converter topologies.
 ∆v 
in
" #
C1
c1
 ∆v

∆v =  ∆vc2  , C = C2
∆vc3
∆vout
C3
(a) General.
0
0
0
0
" #
" #
1
1
−1
1
 11 
−1





1
2
1
2
∆v =   , ∆v = −1 , C = 1
∆v =  1  , ∆v = −1 , C = −2
1
−3
−1
−1
1
1
−2
−1
−1
1
(b) Series-parallel.
0
0
" #
2
1
−1
−2

1
2
∆v =   , ∆v =  1  , C = 1
(c) Ladder.
0
0
" #
1
1
0
−1

1
2
∆v =   , ∆v =  0  , C = ∞
(d) Fibonacci.
(e) Doubler.
1
−3
−1
−2
1
0
−1
0
−1
∞
Fig. 14: Voltage change vectors and relative capacitor values for soft-charging operation.
varies, typically it is preferable to have only one additional
inductor to reduce the complexity and parameter matching
difficulty, and thus achieving ZCS operation with a single
inductor is of interest in this paper. As was demonstrated
in section III, ZCS resonant operation can be accomplished
for the 2-to-1 example converter, at a switching frequency of
fcrit , by adding one inductor at the output node. However,
the basic 2-to-1 topology is simple to analyze and has already
been exploited by many existing work [15], [17]. To date, it
has not been clear whether resonant operation is possible with
only one inductor, for a general SC converter with multiple
charge transfer paths.
It is postulated here that full ZCS on all switches can be
achieved with a single inductor if the topology is compatible
with full soft-charging operation. Since the single inductor is
placed at the output node and is connected to the capacitor
branches at all times, the same terminal voltage appears in all
the capacitor branches. Provided that there is no current transient during phase transitions among the capacitor branches,
which is guaranteed by soft-charging operation, sinusoidal
inductor current ensures sinusoidal current in the capacitors
and thus in the switches. To illustrate this concept, the currents
through all the switches of a resonant Fibonacci converter
(as shown in Fig. 17) are plotted in Fig. 18. It can be seen
that, since the Fibonacci converter is compatible with full softcharging operation, indeed all the switches turn on and off at
the zero crossings of the current waveforms and thus sinusoidal
inductor current ensures ZCS for all switches. A similar case
can be shown for the series-parallel SC converter. Therefore,
two new ZCS resonant two-phase SC converter based on the
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hard-charging
soft-charging
hard-charging
soft-charging
100
Power loss (W)
Power loss (W)
100
10−1
10−1
105
106
Frequency (Hz)
105
106
Frequency (Hz)
(a) Series-parallel.
(b) Ladder.
100
hard-charging
soft-charging
Power loss (W)
Power loss (W)
100
10−1
105
hard-charging
soft-charging
10−1
106
Frequency (Hz)
105
106
Frequency (Hz)
(c) Doubler.
(d) Fibonacci.
Fig. 15: Power loss of hard-charging and soft-charging SC converters from LTSpice simulation.
6
SW10
+
Vin −
4
Current (A)
2
C3
C2
SW8
SW9
SW1
SW4
SW7
L
C1
SW5
SW6
SW2
SW3
Co
Iload
Fig. 17: Resonant Fibonacci converter with a single inductor
at the output.
0
−2
−4
−6
hard−charging
soft−charging
0
1
2
3
4
Time (s)
5
6
7
8
or in high frequency designs, where switching loss is more
significant, operating at resonance with ZCS would yield the
highest efficiency.
−6
x 10
Fig. 16: Current waveform of capacitor C3 of the Fibonacci
converter.
series-parallel and the Fibonacci structures are possible, based
on the technique presented in this work.
Whether one should choose soft-charging operation or ZCS
operation often depends on the load conditions. At heavy
load, where conduction loss dominates, it would be beneficial
to operate at higher frequencies in soft-charging mode to
minimize the current ripple. On the other hand, at light load
VI. E XPERIMENTAL R ESULTS
A hardware prototype is implemented for the soft-charging
Dickson SC converter, but extended to a voltage conversion
ratio of 8 to 1. The schematic is shown in Fig. 19. A total of 12
GaN switches are used, together with seven flying capacitors
of various voltages and one inductor. The design specification
can be found in Table V while a full component listing is
provided in Table VI. A photograph of the hardware prototype
is shown in Fig. 20. All the components are placed on the
top side of the PCB for clear illustration. A prototype of
the conventional Dickson SC converter is also built for the
purpose of comparison, with the same set of switches. The
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3
Isw1
2
Isw2
Current (A)
1
Isw3
0
Isw4
−1
Isw6
Isw5
Isw7
−2
Isw8
Isw9
−3
Isw10
−4
0
2
4
6
8
Time (µs)
10
12
14
Gate signal for
SW1 SW3
SW5 SW7
SW9
0
2
4
6
8
Time (µs)
10
12
14
Gate signal for
SW2 SW4
SW6 SW8
SW10
0
2
4
6
8
Time (µs)
10
12
14
Fig. 18: Current waveform of all the switches in the Fibonacci
converter as shown in Fig. 17.
C7
C5
C3
C1
S4
Vin
+
−
S12
S11
S10
S9
S8
S7
S6
S1
Co
Rload
S5
+
Vsc
S3
S2
C2
C4
Fig. 20: Annotated photograph of the experimental converter
prototype, with a U.S. penny added for perspective.
output impedance. The efficiency represents an approximate
2x power loss reduction at 53 W. For both cases, the measured
efficiencies do not include the power loss due to control circuit
and gate drivers. The combined loss of these components
are approximately 0.5 W, which is mainly attributed to the
poor efficiency of the level-shifting circuit used to power the
gate drivers. Overall, the experimental results demonstrate that
the soft-charging SC converter simultaneously achieves higher
efficiency and higher power density than the conventional SC
converter.
To see the similarity between resonant and soft-charging
operations, the current through the inductor is shown in Fig.
21 at three different switching frequencies. As can be seen,
for fsw = fcrit (Fig. 21b), the current is sinusoidal and
reaches zero at each phase transition, and thus ZCS operation
is achieved. For fsw > fcrit (Fig. 21a), the current has a
C6
Fig. 19: Schematic of the proposed soft-charging Dickson SC
converter.
only difference is that in the conventional Dickson converter,
there is no inductor and the flying capacitors are all of value
2.2 µF. The volume of the passive components of the two
converters are shown in Table VII. The total volume of the
passive components of the SC converter with the inductor is
454 mm3 while that of the pure SC converter is 682 mm3 . It
can be seen that even with the additional inductor, the volume
of the proposed converter is still smaller than that of the pure
SC converter, thanks to the improved utilization of capacitors
due to soft-charging.
The measured efficiencies of the proposed converter as well
as the conventional SC converter at various load currents
are plotted in Fig. 22. It can be seen that not only is the
efficiency of the soft-charging converter always higher than
that of the conventional hard-charging converter, but it also
drops at a slower pace as the current increases, due to the lower
TABLE V: Tested specifications.
Vin
Conversion ratio
Pout
fsw
200 V DC
8:1
53 W
250 kHz
TABLE VI: Component listing of the proposed converter.
Component
S12 , S5 - S1
S11 - S6
Part number
EPC2014
EPC2007
C7 , C5
C6 , C4
C3
C2
C1
Co
C1812X224K2RACTU
C2220C225MAR2CTU
C0805C224K1RACTU
C3216X7S2A225K160AB
C1608X7R1H224K080AB
C3216X5R1V226M160AC
Inductor
XAL5030-332
Level-shifters
Micro-controller
Parameters
40 V, 16 mΩ, 10 A
100 V, 30 mΩ, 6 A
250 V, 0.22 µF
250 V, 2.2 µF
100 V, 0.22 µF
100 V, 2.2 µF
50 V, 0.22 µF
35 V, 22 µF
3.3 µH
ADUM5210
STM32f051
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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(a) fsw = 250 kHz > fcrit
(b) fsw = 90 kHz = fcrit
(c) fsw = 50 kHz < fcrit
Fig. 21: SC stage voltage (Vsc in Fig. 19) (upper) and inductor current (lower).
TABLE VII: Passive components volume comparison.
Conventional
Soft-charging
Capacitor volume (mm )
Inductor volume (mm3 )
681.8
-
378.9
75.0
Total volume (mm3 )
681.8
453.9
3
much smaller ripple and the converter operates near FSL. For
fsw < fcrit (Fig. 21c), the current goes negative in each phase.
These experimentally obtained waveforms closely resemble
the simulated waveforms in Fig. 7, with some voltage spikes as
a result of switching dead-time in the practical implementation.
Therefore, the hardware not only shows that soft-charging
operation is able to achieve a high efficiency with smaller
passive component footprint, but also confirms that resonant
operation can be achieved at the specified frequency using the
same technique.
R EFERENCES
VII. C ONCLUSIONS
In this work, we have shown that soft-charging operation
can be achieved with the addition of a single inductor. Using the proposed technique, ZCS resonant operation for SC
converters can also be achieved at an appropriate switching
Efficiency (%)
95
90
Vin= 150V, hard−charging
Vin= 180V, hard−charging
Vin= 150V, soft−charging
Vin= 180V, soft−charging
85
0
10
20
30
40
Output power (W)
frequency. In addition, we proposed a formal and general
method to determine the conditions for soft-charging operation
of an arbitrary two-phase switched-capacitor converter and
the method is illustrated with a Dickson SC converter. It
has been shown that the Dickson converter can approach
complete soft-charging by appropriately selecting the flying
capacitor values. The technique was verified with a discrete
8-to-1 Dickson converter. The hardware prototype in softcharging operation has shown to exhibit higher efficiency with
smaller passive component sizes compared to a conventional
Dickson converter. The analysis is also applied to four other
SC topologies and the results agree with simulation results and
published experimental work. It is found that both the seriesparallel and Fibonacci SC converters are able to achieve softcharging or resonant operation using the proposed technique.
The proposed method expands the family of both resonant and
soft-charging SC converters and makes SC converters suitable
for an increasing number of applications.
50
60
Fig. 22: Measured efficiency for soft-charging and conventional SC converter prototypes.
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Yutian Lei (S’11) received the B.A. and M.Eng
degrees in Electrical and Information Science from
University of Cambridge, UK, in 2012. He is currently pursuing a Ph.D. degree at University of
Illinois, Urbana-Champaign. His research focus is
on high performance dc-dc switched-capacitor converters.
Robert Pilawa-Podgurski (S’06, M’11) was born
in Hedemora, Sweden. He received dual B.S. degrees in physics, electrical engineering and computer
science in 2005, the M.Eng. degree in electrical
engineering and computer science in 2007, and the
Ph.D. degree in electrical engineering in 2012, all
from the Massachusetts Institute of Technology.
He is currently an Assistant Professor in the
Electrical and Computer Engineering Department at
the University of Illinois, Urbana-Champaign, and is affiliated with the Power
and Energy Systems group. He performs research in the area of power
electronics. His research interests include renewable energy applications,
energy harvesting, CMOS power management, and advanced control of power
converters. Dr. Pilawa-Podgurski received the Chorafas Award for outstanding
MIT EECS Master’s thesis, the Google Faculty Research Award, and the
Richard M. Bass Outstanding Young Power Electronics Engineer Award of
the IEEE Power Electronics Society. He is co-author of three IEEE prize
papers.
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
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