Miscellaneous PCS Issues
Mark Gustlin – Cisco
IEEE 802.3ba TF
July 2008 Denver
Agenda
• PCS State Machines
• MII and PCS Ordered Sets
2
PCS State Machines Background
• Today with 10GBASE-R, there are two state machines operating on the receive stream and
looking at the sync bits
Lock state machine
Looks for 64 non-errored sync blocks in a row to declare in sync
Looks for 16 errored sync blocks out of 64 to declare out of sync
BER state machine
Looks for 16 errored sync blocks out in 125usec window to declare high BER
High BER ~ 10-4
3
Now for 100/40Ge
• We need SMs operating on each Virtual Lane instead of a single stream
• First we find 66b alignment, then we hunt for alignment markers
• Should we keep the same sync SM, just run 4 or 20 instances of them?
I would assume yes…no need to also run it on the aggregate stream either
• Do we need the BER SM as is, just run 4 or 20 instances of them?
Should be some value in identifying high BER VLs, though we can not always correlate
that to a particular physical lane, but if just some are high BER, you could run test
patterns to isolate a problem
• Or we could run the BER SM on the aggregate stream?
This makes sense if we don’t care about identifying individual VLs that are misbehaving
4
100/40Ge Proposed SM Plan
1. The 66b lock SM runs on each Virtual Lane
2. Then an Alignment Marker SM runs on each Virtual Lane
3. The Virtual Lanes are De-skewed
4. Then the BER SM is run on the aggregate data stream
5
100/40Ge Proposed SM Plan
Alignment and Sync Time
MTTLA
MTTA
1.E+14
1.E+11
1.E+08
1.E+05
1.E+02
1.E-01
1.E-04
1.E-07
64/66 MTTS
64/66 BER MTTLS
64/66 MTTLS
Lifetime Universe
One Year
1 .E - 1 2
1 .E - 1 1
1 .E - 1 0
1 .E - 0 9
1 .E - 0 8
1 .E - 0 7
1 .E - 0 6
1 .E - 0 5
1 .E - 0 4
1 .E - 0 3
1 .E - 0 2
5 .E - 0 2
1 .E - 0 1
5 .E - 0 1
L o g (s e c o n d s )
The BER SM will
dominate the time
to take down the
link in low BER
1.E+17
situations
Log (BER)
6
Ordered Sets
• In the 10GBASE-R PCS, two types of ordered sets are supported
Sequence ordered sets: Local and remote faults
Signal ordered sets: Reserved for future use (used by Fiber Channel)
• In XGMII, only sequence ordered sets are supported
Sequence ordered sets: Local and remote faults
7
Options for Ordered Sets
• In XGMII the ordered sets are defined as follows:
8
Ordered Sets
• Proposed ordered set format for the XLGMII/CGMII
• With 8B alignment, ordered sets span 8B
9
Ordered Sets
• With the 10GBASE-R PCS and 4B alignment, there are several block
types that can carry ordered sets:
The ‘O’ codes
denotes signal
ordered set (0xF)
vs. sequence
ordered sets (0x0).
Though signal
ordered sets are
reserved.
10
Ordered Sets
• For 100GBASE-R and 40GBASE-R, the proposal is:
Input Data
S
y
n
c
A single block type for
sequence ordered
sets (no ‘O’ code).
Block Payload
65
Bit Position: 0 1 2
Data Block Format :
D 0 D1 D2 D3/D4 D5 D6 D7 01
Control Blo ck Formats:
C 0 C1 C2 C3 /C4 C5 C6 C7
D0
Block Typ e
Field
10
0x1e
D1
C0
D2
C1
D3
C2
D4
C3
D5
C4
D6
C5
C6
D7
C7
S 0 D1 D2 D3/D4 D5 D6 D7 10
0x78
D1
D2
D3
D4
D5
D6
D7
O 0 D1 D2 D3/D4 D5 D6 D7 10
0x4b
D1
D2
D3
D4
D5
D6
D7
T0 C1 C2 C3 /C4 C5 C6 C7
10
0x87
D0 T 1 C2 C3 /C4 C5 C6 C7
10
0x99
D0
D0 D1 T2 C3/C 4 C5 C6 C7
10
0xaa
D0
D1
D0 D1 D2 T 3 /C 4 C5 C6 C7
10
0xb4
D0
D1
D2
D0 D1 D2 D3 /T4 C5 C6 C7
10
0xcc
D0
D1
D2
D3
D0 D 1 D2 D3/D4 T5 C6 C7
10
0xd2
D0
D1
D2
D3
D4
D0 D 1 D2 D3 /D4 D5 T 6 C7
10
0xe1
D0
D1
D2
D3
D4
D5
C7
D0 D1 D2 D3 /D4 D5 D6 T7
10
0xff
D0
D1
D2
D3
D4
D5
D6
C1
C2
C3
C4
C5
C6
C7
C2
C3
C4
C5
C6
C7
C3
C4
C5
C6
C7
C5
C6
C7
C5
C6
C7
C6
C7
C4
If we need to support
signal ordered sets
use a new block type
(0x55).
11