Punčochář, Mohylová: TELO, Chapter 10
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11. Chapter: Amplitude stabilization of the harmonic oscillator
Time of study: 3 hours
Goals: the student should be able to
•
define basic principles of oscillator amplitude stabilization
•
describe low distortion oscillator (spot sinus)
Text
Two basic oscillator structures you can see in the 6.Chapter. A positive-feedback
loop is formed by an amplifier A and a frequency-selective network β. The amplifier produces a 0° or 180° voltage phase shift, as does the feedback network. This results in a combined 0° voltage phase shift around the loop, which is the same thing as a 360° phase shift.
In order to oscillate, the loop gain (return ration) Aβ must be equal to unity.
•
Because circuit components and transistors change characteristics (drift) with age,
temperature, voltage, etc., the Aβ =1 condition could not be permanently satisfied.
The product will become either less or larger than unity. In the former case the oscillation simply stops, and in the latter case nonlinearity is required in order to limit
the amplitude.
•
An oscillator in which the loop gain is exactly unity is an abstraction completely unrealizable in practice.
• In every practical oscillator the loop gain is slightly larger than unity, and the amplitude of the oscillations is limited by the onset of nonlinearity. The distortion is low
if the amplitude of oscillation remains within the linear region of the amplifier. It
must not be allowed to go into a full-swing oscillation.
An amplitude-limiting mechanism is basically an automatic gain control (AGC) circuit that forces the amplifier gain to decrease when the amplitude of the oscillation increases.
Wien bridge oscillator
The positive feedback network (RC + RC) is frequency – selective, and at the most
favored frequency passes a maximum of 1/3 of the output swing back to the + input – Fig.1.
The negative feedback (560Ω + lamp; Rlamp grows with current - positive temperature coefficient (PTC) thermistor) adjusts the gain (noninverting amplifier, 1+560/Rlamp). The incan-
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descent lamp is used as a variable-resistance element (with a long time-constant of response; the lamp is rated at 14 mA and 10V).
The initial gain (not yet oscillation, the lamp is cold, Rlamp is small) is greater
than 3 – the oscillator begins to oscillate. As the output level rises, the lamp heats slightly,
reducing the gain to 3.
Fig.1: Wien bridge oscillator – amplitude stabilization (LAMP)
Figure 2 shows Wien-bridge oscillators with diode amplitude limiting mechanisms;
when the diodes are off, the gain is 1 + R2 ||R1; and when a diode is on, the gain is reduced
to 1 + (R2 ||R3 )/R1 . The start up condition requires a gain slightly greater than 3 or
The inequality above can be satisfied by making it equal to a value between 2.1 to 2.2.
When a diode is on, the gain should be slightly less than 3, or
The inequality above can be satisfied by making it equal to a value between 1.8 to 1.9.
When a diode is conducting, the amplitude of the output voltage is limited. Since
v+ = v− = vo /3, a nodal equation gives
or
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where VD » 0.5V for an actual diode.
Fig.2: Wien bridge oscillator – amplitude stabilization (diodes)
Fig.3: Wien bridge oscillator – another amplitude stabilization (diodes)
Another Wien-bridge oscillator with a diode amplitude-limiting circuit is shown in Figure 3. In this oscillator the amplitude-limiting circuit consists of the diodes D1 and D2, and
the resistors R3, R4, R5, and R6. To understand the operation of the amplitude-limiting circuit, observe that as vo increases, the voltage at node vy will exceed the voltage v1, forcing
D2 to conduct. When D2 conducts, the value of vy is vy = v1 + 0.7, and vo is clamped at the
value vo(max) , given by (superposition theorem)
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Since v1 is approximately vo /3, it follows from equation above that
Similarly, as vo decreases, the voltage vx will drop below v1 , forcing D1 to conduct.
When D1 conducts, the voltage vx is vx = v1 − 0.7, and vo is clamped at the value vo(min) ,
given by
The simultaneous solution of equations gives the value of the resistors that limit the output
voltage to vo(min) < vo < vo(max) . In order to obtain a symmetrical sinusoidal voltage, the selection R3 = R6 and R4 = R5 is usually made.
Example 1
-Design the Wien-bridge oscillator shown in Fig. 3 to oscillate at 5 kHz.
- Design an amplitude-limiting circuit. The amplitude of the sinusoidal output voltage is to
be limited to |vo| = 5V.
Solution
A practical value of 0.01 μ F for the capacitors can be selected. Then, using
the value of R is
A practical value of 3 kΩ can be used in series with a trimming potentiometer to set the
frequency of oscillation at 5 kHz.
To start the oscillation, a value of Avo = 3.2 is used. From
a gain of 3.2 is obtained with R2 = 22 kΩ and R1 = 10 kΩ. The supply voltages of the op
amp can be selected as 12V and −12V.Tthe output voltage will reach saturation producing a
clipping in the output waveform and, therefore, a significant amount of distortion. This occurs because the starting condition requires Avo > 3, and the gain of the amplifier changes
when its output reaches saturation. Some sort of amplitude-limiting mechanism is needed to
reduce the harmonic distortion.
With vo(max) = 5V and vo(min) = -5V, it follows from
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Punčochář, Mohylová: TELO, Chapter 10
that R3 = R6 = 10.9 kΩ and R4 = R5 = 2 kΩ.
In the circuit in Fig.4, an amplitude discriminator consisting of the diodes and RC
adjusts the AC gain by varying the resistance of the JFET, which behaves like a voltagevariable resistance for small voltages. The LM103 is a two-terminal monolithic reference
diode electrically equivalent to a breakdown diode. The long time constant is used (2s) to
avoid distortion, since fast feedback will distort the wave by attempting to control the amplitude within the time of one cycle.
A
1N914
1 μF
2N5457
LM103
6,8 k
2,2 μF
Fig.4: Wien bridge oscillator – JFET amplitude stabilization
The small amplitude generates a small voltage (negative) – JFET is “open” (small resistor
in parallel with 6,8 kΩ) – small JFET resistance determines the maximum gain of more
than 3. As the amplitude grows, the voltage (negative, on RC) grows too and JFET closes –
the minimum amplifier gain is about 1+ 10/6,8 = 2,47.
We can add a buffer (voltage gain of 1) to isolate the non-linear effects of rectifier
(diodes) from the oscillator output – Fig. 5 – and thus reduce the distortion of the oscillator.
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output
A
BUFFER
1
to 1N914
Fig.5: Wien bridge oscillator – JFET amplitude stabilization; buffer reduces
distortion of the oscillator
Phase shift oscillator
Phase-shift oscillators usually use RC networks in the feedback path. The op amp is used
in an inverting configuration with a gain of -R2 /R1. Thus, the signal experiences a phase
shift of -180° through the amplifier, and the phase shift from each RC section is 60° at the
frequency of oscillation, for a total phase shift in the feedback path of 180°.
In this oscillator the RC sections are connected without isolation and, therefore, there is
loading. In the last stage the resistors R and R1 appear in parallel. The loading of R1 can be
neglected if R1 ||R » R, or in some cases by removing R in the third stage and letting R1 = R.
To summarize, the phase-shift oscillator in Fig. 6 will oscillate at the frequency ωo given
by
if the gain is |Avo| = R2/R1 > 29. The loading of the op amp is minimized by making R1 >
10R.
Fig.6: Phase shift oscillator – amplitude stabilization (diodes)
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The harmonic distortion can be significantly reduced with an amplitude-limiting circuit.
The amplitude-limiting circuit is designed using (see Fig. 3)
and
with v1 set equal to zero (i.e., vy = 0.7V and vx = -0.7V).
Example 2
-Design the phase shift oscillator shown in Fig. 3 to oscillate at 1 kHz.
- Design an amplitude-limiting circuit. The amplitude of the sinusoidal output voltage is to
be limited to |vo| = 5V.
Solution
A practical value of 0.01 μ F for the capacitors can be selected. Then, using
The resistors R1 and R2 must provide the gain |Avo| > 29 in order to prevent loading R1 ||R ≈
R. Letting R1 = 15 kΩ, then R2 = 29R1 = 435 kΩ. A 495-kΩ resistor was used to implement
R2. This will allow for some extra gain to satisfy the start of oscillation condition (i.e., |Avo|
> 29).
From (supply voltage ± 12 V)
with v1 = 0 and vo(max) = 5V, we obtain
which can be satisfied with R5 = 2 kΩ and R6 = 5.9 kΩ.
From
for symmetry, we obtain R3 = R6 = 5.9 kΩ and R4 = R5 = 2 kΩ.
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Band pass filter – comparator oscillator (spot sinus)
The basic idea of low THD BPF-based oscillators is to incorporate a bandpass filter
(BPF) along with a limiter and a comparator, in a positive feedback loop – Fig.7. The oscillation frequency is set by the center frequency of the filter while the amplitude is set by the
limiter (this filter has independent control of frequency, amplitude and distortion of the
output).
Fig.7: Bandpass filter – comparator oscillator
Input of BPF is roughly a square wave. According to its Fourier series, a 50% duty-cycle
square wave consists of odd order harmonic sine waves with the fundamental at the same
frequency as the square wave.
Fourier Series for a Square Wave
where k = peak amplitude of the square wave.
Thus THD is dominated by lower order harmonics.
The THD is directly proportional to the quality factor of the loop filter – Fig.8. Fig.9
shows the THD of the oscillator versus the quality factor (Q) of a second-order filter.
Achieving linearity better than 62 dB requires very high-Q filter (Q > 70). Implementing
such high-Q filter requires large op-amp gain–bandwidth product as well as a large spread
of the capacitor values, and will end up with larger silicon area.
Fig.8: The Fourier series versus Q of BPF
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Fig.9: The third harmonic versus Q
Notice that although the filter has unity gain, the amplitude of the sine wave output signal is greater than that of the square wave. This is because the fundamental has an amplitude of 4/π times that of the square wave as shown by the Fourier series. The bandpass filter
will also filter out any DC component of the square wave input.
The very simple (only limiter is used) circuit is shown in Fig. 10, for example. The limiter is a pair of diodes (and R1) to have a squarewave at v2. The active filter (other circuit
elements) selects the fundamental frequency and provides the sinus output at v1 (any filter
circuit with positive gain can be used to implement the bandpass filter).
Fig.10: Bandpass filter – the limiter used only
Punčochář, Mohylová: TELO, Chapter 10
Basic texts
Other text
Questions
' Answers you find in this text
1. Why isn’t an input signal (to the oscillator) needed to obtain an output voltage signal?
2. Compare the operation of the described oscillator circuits.
3. Why does a harmonic oscillator need an amplitude control circuit?
4. Explain the function of the buffer on Fig.4
5. How can we get the sinusoidal voltage from the square wave voltage?
6. Why we need high-Q band pass filter on Fig.7?
Problems
1. Redesign the circuit of Fig. 3 for operation at 1 kHz. The amplitude of the sinusoidal
output voltage is to be limited to |vo| = 2V.
2. Redesign the circuit of Fig. 3 for operation at 5 kHz. The amplitude of the sinusoidal
output voltage is to be limited to |vo| = 2V.
3. Determine the needed Q of BPF (Fig.7) if we need HD3 ≈ - 40 DB.
Problems key
See example 1 and example 2 and Fig.9.
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