CS211 Computer Architecture Digital Logic l Topics l Transistors (Design & Types) l Logic Gates l Combinational Circuits l K-Maps Figures & Tables borrowed from:! • http://www.allaboutcircuits.com/vol_4/index.html! Class Checkpoint l What have discussed up until l C Programming language now & why: More low-level then Java. l Better idea about what’s really going on. l l Covered l data representation Computers manipulate data. How is this data stored and manipulated? l Covered Machine-Level representation of programs (assembly lanaguage - x86) l Computers don’t work on C code (or Java). Need instructions closer to hardware. l What’s next? Processor Design… how does machine instructions actually make the processor work? But first… l Before we go into processor design, we’re going to cover some topics in Digital Logic. l Book covers this only sparingly, we’re going to go into a bit more detail. l Specifically: l Transistors l Logic gates l Combinational & Sequential Circuits l Flip-Flops l Memory Transistor: Building Block of Computers l Microprocessors contain millions of transistors l Intel Pentium 4 (2000): 48 million l IBM PowerPC 750FX (2002): 38 million l IBM/Apple PowerPC G5 (2003): 58 million l Logically, each transistor acts as a switch l Combined to implement logic functions l AND, OR, NOT l Combined l Adder, to build higher-level structures multiplexer, decoder, register, … l Combined to build processor Simple Switch Circuit l Switch open: No current through circuit l Light is off l Vout is +2.9V l l Switch closed: Short circuit across switch l Current flows l Light is on l Vout is 0V l Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage. n-type MOS Transistor l MOS l = Metal Oxide Semiconductor two types: n-type and p-type l n-type l when Gate has positive voltage, short circuit between #1 and #2 (switch closed) l when Gate has zero voltage, open circuit between #1 and #2 (switch open) Terminal #2 must be connected to GND (0V). Gate = 1 Gate = 0 p-type MOS Transistor l p-type is complementary l when Gate has positive voltage, open circuit between #1 and #2 (switch open) l when Gate has zero voltage, short circuit between #1 and #2 (switch closed) to n-type Gate = 1 Gate = 0 Terminal #1 must be connected to +2.9V. Inverter (NOT Gate) Truth table In Out In Out 0 V 2.9 V 0 1 2.9 V 0 V 1 0 NOR Gate Note: Serial structure on top, parallel on bottom. A B C 0 0 1 0 1 0 1 0 0 1 1 0 OR Gate A B C 0 0 0 0 1 1 1 0 1 1 1 1 Add inverter to NOR. NAND Gate (NOT(AND)) Note: Parallel structure on top, serial on bottom. A B C 0 0 1 0 1 1 1 0 1 1 1 0 AND Gate A B C 0 0 0 0 1 0 1 0 0 1 1 1 Add inverter to NAND. Basic Logic Gates Symbols XOR + B AO XOR: truth table A^B A B XOR B A 0 0 0 0 1 1 1 0 1 1 1 0 - - A^B= A & B + A&B + DeMorgan's Law l NOT (A and B) = NOT (A) OR NOT (B) l NOT (A OR B) = NOT(A) AND NOT (B) A BB NOT(A NOT AND B) (A) NOT (B) NOT(A) OR NOT(B) 0 0 1 1 1 1 0 1 1 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 DeMorgan's Law l Converting AND to OR (with some help from NOT) l Consider the following gate: To convert AND to OR (or vice versa), invert inputs and output. A B 0 0 A B 1 1 A ⋅B 1 A ⋅B 0 0 1 1 0 0 1 1 0 0 1 0 1 1 1 0 0 0 1 Same as A OR B More than 2 Inputs? l AND/OR l l l can take any number of inputs. AND = 1 if all inputs are 1. OR = 1 if any input is 1. Similar for NAND/NOR. l Can implement with multiple two-input gates, or with single CMOS circuit. Building Functions from Logic Gates l Combinational Logic Circuit l output depends only on the current inputs l stateless l Sequential Logic Circuit l output depends on the sequence of inputs (past and present) l stores information (state) from past inputs l We'll first look at some useful combinational circuits, then show how to use sequential circuits to store Half adder A half adder is used to add just two bits. l The result consists of two bits: a sum (the right bit) and a carry out (the left bit) S l Here is the circuit and its block symbol l X 0 0 1 1 Y +0 +1 +0 +1 CS = 00 = 01 = 01 = 10 C Full Adder l Add two bits and carry-in, produce one-bit sum and carry-out. A B Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Four-bit Adder (carry-ripple adder) Disadvantage: Delay through N-1 Stages Carry Save adder l Compute l 101 l 101 l -----l 000 l Then l l l Sum and Carry independently 101 101 ---------101- add S + C 000 101---------------1010 Carry Save adder l Delay reduced compared to Carry ripple adder l Add 3 Numbers and Produce two numbers S and C X: 10011 X: 10011 l Final result is S + shifted carry Y: + 1 1 0 0 1 Y: + 1 1 0 0 1 Z: C: + 01011 11011 X: Y: Z: 10011 + 11001 + 01011 S: 00001 C: Sum: 11011 110111 Z: S: + 01011 00001 Carry Save Adder Design X Y Z Xn-1 Yn-1 Zn-1 FA CSA n+1 n C=carry Xn-2 Yn-2 Z n-2 FA Cn Sn-1 Cn-1 Sn-2 X0 Y0 Z0 FA C1 S0 C =0 S=sum + N Bit Carry Save Adder Block 0 Decoder l n inputs, 2n outputs l exactly one output is 1 for each possible input pattern 2-bit decoder Decoder l n inputs, 2n outputs l exactly one output is 1 for each 0 possible input pattern 1 2-bit decoder 2 3 Selecting Memory A0 . . A7 256 x 8 RAM A8 A9 2 to 4 decoder 256 x 8 RAM 256 x 8 RAM 256 x 8 RAM Multiplexer (MUX) l n-bit selector and 2n inputs, one output l output equals one of the inputs, depending on selector 4-to-1 MUX Circuit Design l 1. 2. 3. 4. Designing circuits is a process… Have a good idea. What kind of circuit might be useful? Derive a truth table for this circuit. Derive a Boolean expression for the truth table. Build a circuit given the Boolean expression l Building the circuit involves mapping the Boolean expression to actual gates. This part is easy. l Deriving the Boolean expression is easy. Deriving a good one is tricky. Converting Truth Table to Boolean Expression l Given a circuit, isolate that rows in which the output of the circuit should be true. Converting Truth Table to Boolean Expression l Given a circuit, isolate that rows in which the output of the circuit should be true. l A product term that contains exactly one instance of every variable is called a minterm. Converting Truth Table to Boolean Expression l Given the expressions for each row, build a larger Boolean expression for the entire table. l This is a sum-of-products (SOP) form. Converting Truth Table to Boolean Expression l Finally build the circuit. l Problem: SOP forms are often not minimal. l Solution: Make it minimal. We’ll go over two ways. First Approach: Algebraic l Simply use the rules of Boolean logic The Result Karnaugh Maps or K-Maps l K-maps are a graphical technique to view minterms and how they relate. l The “map” is a diagram made up of squares, with each square representing a single minterm. l Minterms resulting in a “1” are marked as “1”, all others are marked “0” 2 Variable K-Map 2 Variable K-Map 2 Variable K-Map 0 1 0 1 Finding Commonality Finding the “best” solution l Grouping become simplified products. l Both are “correct”. “A+B” is preferred. Simplify Example Simplify Example 3 Variable K-Maps C B l Note in higher maps, several variables occupy a given axis l The sequence of 1s and 0s follow a Gray Code Sequence. 3 Variable K-Maps 3 Variable K-Maps C B 3 Variable K-Maps 3 Variable K-Maps 3 Variable K-Maps Back to our earlier example….. l The K-map and the algebraic produce the same result. D Up… up… and let’s keep going B A C Few more examples D B A C Few more examplesD B A C