Analog Devices Welcomes Hittite Microwave Corporation NO CONTENT ON THE ATTACHED DOCUMENT HAS CHANGED www.analog.com www.hittite.com THIS PAGE INTENTIONALLY LEFT BLANK HMC1031MS8E v01.1112 Clock Generators - SMT CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Typical Applications Features • Low Jitter Clock Generation Low Current Consumption: <2 mA Typical • Low Bandwidth Jitter Attenuation High Phase Frequency Detector Rate: 140 MHz • Low Frequency PLL Hardware Pin Programmable Clock Multiplication Ratios: x1/ x5/ x10 • Frequency Translation • OCXO Frequency Multiplier • Phase Lock clean high frequency references to 10MHz equipment Functional Diagram Lock Detect Indicator Power Down Mode (0.7 μA typical) 8 Lead MS8E Package: 4.8 mm x 3.0 mm General Description Together with an external loop filter and a VCXO, the HMC1031MS8E forms a complete clock generator solution targeted at low frequency jitter-cleaner and reference clock generation applications. The HMC1031MS8E features a low power integer-N divider supporting divide ratios of 1/5/10, that is controlled via external hardware pins and requires no serial port. The Integrated Phase Detector and Charge Pump are capable of operating up to 140 MHz, and a maximum VCXO input of 500 MHz ensure frequency compliance with a wide variety of system clocks and VCXOs. Additional features include Integrated Lock Detect Indicator available on a dedicated hardware pin, and a built-in Power Down Mode. The HMC1031MS8E is housed in a 8 lead MS8E SMT package. 1 For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Electrical Specifications Parameter Conditions Power Supply Voltage Operating Temperature Reference Frequency Min Typ Max Units 2.7 3.3 3.5 V -40 27 Externally AC coupled [1] VCO Frequency Charge Pump Current Input Voltage Swing (Reference & VCO Inputs) [2] REF, VCO Input DC Bias Exernally AC Coupled to the Chip. 0.1 0.5*VCC approximately MHz µA 3.5 40 60 % [3] 3600||4 Applicable to REF an VCO Input Pins. Divide-by 10 Vpp V 0.2 to VCC - 0.4 V Typically VCO/VCXO Feedback Divider Phase Noise [4] Floor Figure of Merit Flicker Figure of Merit 500 1.65 Charge Pump Output Range Divide Ratios °C MHz 50 Input Duty Cycle Input Impedance at 50 MHz 85 140 Ω||pF 1/5/10 -212 -254 -208 -252 -204 -248 dBc/Hz dBc/Hz Flicker Noise at foffset PNflick = Flicker FOM +20log(f vcxo) -10log(foffset) dBc/Hz Phase Noise Floor at f vcxo with fpd PNfloor = Floor FOM + 10log(fpd) +20log(f vcxo/fpd) dBc/Hz Supply Current [5] Power Down Current [6] [D0,D1 = 00] Lock Detect Output Current 100 MHz REF=VCXO, 3.3 V VCC 3.0 V VCC, 25 °C 3.3 V VCC, 85 °C 3.6 V VCC, 85°C CMOS Output Level 1.95 Clock Generators - SMT TA = +25 °C, VCC = 3.3 V, Unless Otherwise Specified. mA 0.05 0.8 1 uA uA uA 3 mA [1] The lower limit of operation is limited by off-chip AC coupling. The size of the AC coupling should be chosen to have insignificant impedance relative to the 3.6kOhm input impedance of the part, and any termination impedances on the evaluation board (50Ohm by default). [2]REF and VCO inputs should be AC coupled to HMC1031MS8E. Peak Input level should not exceed VCC+0.4 V with respect to GND. [3] PLL may lock in the voltage range of 0.2 to VCC - 0.4 V. However, the charge pump gain may be reduced. See Figure 7 CP Compliance [4] See Figure 13, 14 for addional Flicker FOM and Floor FOM data. [5] See Figure 8 for additional supply current data. Base Frequency 100MHz, Base VCC: 3.3V, 0.8 to 1mA/V, Base PFD current: 1.8 mA, 8 μA/MHz Base DIV current: 1.15mA, 15 μA/MHz. For example, the device current for a 10 MHz ref and 50 MHz VCO at 3.0 V VCC can be calculated as PFD Current delta = (10-100)*8e-6 = -0.72, DIV current delta = (50-100)*15e-6=-0.75 mA, Device current = (1.8-0.72)+(1.15-0.75)=1.48 mA at 3.3V VCC At 3 V VCC device current would be approx: 1.48 - 0.85e-3*(3.3-3.0) = 1.225 mA [6] In Power down mode, the REF/VCO inputs and charge pump outputs are tri-stated. The power down leakage current is measured without any signal applied to HMC1031MS8E. For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 2 HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Typical Performance Characteristics Figure 1. 10 MHz to 100 MHz with Noisy [1 Reference Phase Noise ] Figure 2. 10MHz to 50MHz with Noisy Reference Phase Noise [1] -20 -40 100 MHz VCXO Locked with Tiny PLL -40 10 MHz Noisy Ref PHASE NOISE (dBc/Hz) PHASE NOISE (dBc/Hz) -60 -80 12KHz - 20MHz Integrated Jitter HMC1031/VCXO: 55 fsec 10MHz Input: 4 psec -100 -120 -140 -160 50 MHz VCXO Locked with Tiny PLL 10 MHz Noisy Ref Open Loop VCXO Phase Noise -60 -80 12KHz to 20MHz Integrated Jitter HMC1031/VCXO: 190 fsec 10MHz iInput: 4 psec -100 -120 -140 -160 -180 -180 10 100 1000 10000 OFFSET (Hz) 100000 1000000 10 100 1000 10000 OFFSET (Hz) 100000 1000000 Figure 4. Typical Close Loop Phase Noise, HMC1031MS8E as Jitter p Attenuator, Loop Bandwidth 100 Hz Figure 3. 10MHz to 100MHz with Very Noisy Reference Phase Noise [1] -20 [1] -20 Open Loop VCXO Phase Noise 10 MHz Very Noisy Ref 100 MHz VCXO Locked with Tiny PLL -60 -80 -100 -120 -140 10 100 -80 -100 -120 12KHz to 20MHz Integrated Jitter HMC1031/VCXO: 212 fsec -160 -180 1 -60 -140 12KHz to 20MHz Integrated Jitter HMC1031/VCXO: 57.8 fsec 10MHz iInput: 16.2 psec -160 Sim Model Sim VCXO Response Sim PLL Contribution Sim Reference Response Total Measured Phase Noise Free Running Bliley 50MHz 10 MHz Noisy Reference -40 PHASE NOISE (dBc/Hz) -40 PHASE NOISE (dBc/Hz) Clock Generators - SMT TA = +25 °C, VCC = 3.3 V, Unless Otherwise Specified. 1000 10000 OFFSET (Hz) 100000 -180 1000000 1 10 10 2 10 3 10 4 10 5 10 6 10 7 10 8 OFFSET (Hz) Figure 5. Phase Error during Lock Time Figure 6. Frequency Error during Lock Time for DIV 5, 10 MHz IN,50 MHz OUT, Loop Bandwidth 100 Hz [1] for DIV 5, 10 MHz IN,50 MHz OUT, Loop Bandwidth 100 Hz [1] 1000 200 FREQUENCY ERROR (Hz) PHASE ERROR (DEGREE) 500 100 0 -100 0 -500 -1000 -1500 -200 -2000 0 10 20 30 40 TIME (msec) [1] [2] [3] [4] 3 50 60 70 80 0 10 20 30 40 50 60 70 80 TIME (msec) Loop Filter Value: C1 4.7 μF, R2 1.2 KΩ, C2 62 μF for Loop Filter bandwidth 8 Hz, VCXO: Crystek CVHD-950 100 MHz Loop Filter Value: C1 220 nF, R2 3.3 KΩ, C2 2.2 μF for Loop Filter bandwidth 50 Hz, VCXO: Bliley V105ACACB 50 MHz Loop Filter Value Refer to Loop Filter Configuration Table No 1. VCXO: Crystek CVHD-950 100MHz Loop Filter Value Refer to Loop Filter Configuration Table No 2. Simulated data is generated from Hittite PLL Design Software. For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Figure 7. Typical Charge Pump Output Source and Sink Current vs. Output Voltage Figure 8. HMC1031MS8E Current vs. Different Config DIV 1, REF/VCXO = 122.88MHz -40 C 27 C 85 C 2.5 40 CURRENT (mA) SOURCE/SINK CURRENT (uA) 50 I-Source 2.7 V VCC 30 I-Source 3.0 V VCC 20 I-Source 3.3 V VCC I-sink 10 2 1.5 I-Source 3.5 V VCC 0 1 -10 0 0.5 1 1.5 2 2.5 3 3.5 DIV 10, REF =10 MHz, VCXO = 100 MHz 2.6 4 2.8 DIV 5, REF =10 MHz, VCXO = 150 MHz 3 3.2 3.4 3.6 SUPPLY VOLTAGE (V) CHARGE PUMP OUTPUT VOLTAGE (V) Figure 9. HMC1031MS8E REF Input Sensitivity vs. Frequency [1] Figure 10. HMC1031MS8E REF Input Sensitivity vs. Frequency [4] 10 INPUT VOLTAGE SWING (Vpp) INPUT POWER (dBm) 10 0 Recommend region of operation -10 -20 1 Recommend region of operation Clock Generators - SMT 3 60 0.1 0.01 -30 50 100 150 50 200 100 150 200 INPUT FREQUENCY (MHz) INPUT FREQUENCY (MHz) Figure 11. HMC1031MS8E VCO Input Sensitivity vs. Frequency [5] Figure 12. HMC1031MS8E VCO Input Sensitivity vs. Frequency [5] 10 INPUT VOLTAGE SWING (Vpp) INPUT POWER (dBm) 10 0 Recommend region of operation -10 -20 Recommend region of operation 1 0.1 0.01 -30 80 160 240 320 400 INPUT FREQUENCY (MHz) 480 560 80 160 240 320 400 480 560 INPUT FREQUENCY (MHz) [5] Maximum frequency is guaranteed in the recommended region of operation across temperature and process variation. For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 4 HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Figure 13. HMC1031MS8E Flicker FOM Figure 14. HMC1031MS8E Floor FOM 5 -200 -40 C 27 C 85 C -248 -40 C 27 C 85 C -250 FLOOR FOM (dBc/Hz) FLICKER FOM (dBc/Hz) Clock Generators - SMT -246 -252 -254 -256 -205 -210 -258 -260 2.7 2.8 2.9 3 3.1 3.2 SUPPLY VOLTAGE (V) 3.3 3.4 3.5 -215 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 SUPPLY VOLTAGE (V) For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz VCC to GND - 0.3 V to 3.6 V D0, D1 pins to GND -0.3 V to 3.6 V Maximum REF input voltage VCC + 0.4 V Maximum VCO input voltage VCC + 0.4 V Maximum Junction Temperature +125 °C Storage Temperature -65 to +150 °C Operating Temperature -40 to +85 °C Thermal Resistance 0.2 °C/mW Reflow Soldering Peak Temperature Time at Peak Temperature +260 °C 40 seconds ESD Sensitivity (HBM) Class 2 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The absolute maximum ratings apply individually only and not in combination. ELECTROSTATIC SENSITIVE DEVICE OBSERVE HANDLING PRECAUTIONS Outline Drawing Clock Generators - SMT Absolute Maximum Ratings NOTES: 1. PACKAGE BODY MATERIAL: LOW STRESS INJECTION MOLDED PLASTIC SILICA AND SILICON IMPREGNATED. 2. LEAD MATERIAL: COPPER ALLOY 3.LEAD PLATING: 100% MATTE TIN 4. DIMENSIONS ARE IN INCHES [MILLIMETERS]. 5. DIMENSION DOES NOT INCLUDE MOLDFLASH OF 0.15mm PER SIDE. 6. DIMENSION DOES NOT INCLUDE MOLDFLASH OF 0.25mm PER SIDE. 7. ALL GROUND LEADS MUST BE SOLDERED TO PCB RF GROUND. Package Information Part Number Package Body Material Lead Finish HMC1031MS8E RoHS-compliant Low Stress Injection Molded Plastic 100% matte Sn MSL Rating MSL1 [2] Package Marking [1] 1031 XXXX [1] 4-Digit lot number XXXX [2] Max peak reflow temperature of 260 °C For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 6 HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Clock Generators - SMT Pin Descriptions 7 Pin Number Function Description 1 VCC Supply voltage Typical +3.3 V 2 REFIN Reference input, externally AC coupled reference frequency input 3 LKDOP Lock Detect output, CMOS drive 4, 5 D0, D1 CMOS inputs used to specify integer-N division ratio 6 VCOIN VCO input, AC coupled VCO/VCXO input 7 CP Charge Pump output 8 GND Interface Schematic For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Clock Generators - SMT Evaluation PCB A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation circuit board shown is available from Hittite upon request. Evaluation Order Information Item Evaluation PCB Only Contents HMC1031MS8E Evaluation PCB Part Number EVAL01-HMC1031MS8E For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 8 HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Evaluation PCB Schematic 5 4 C22 C20 0.1uF R28 0.1uF D R29 GND VR2 BAND GAP EN VR3 REF VR4 C21 5 6 7 8 R22 11 10 TP6 A C3 J3 HMC860LP3E 02/06/2012 FOUT R6 DEPOP C4 D 3V DEPOP DEPOP XTAL 0.2 C19 J5 1 DEPOP 2 XTAL C12 C15 0.1uF VCOVCC 4 R31 1.1K Y1 4 PLL GND REFIN LKDOP PFD/CP LKD 1/N CP VCOIN D0 D1 4 3 6 5 8 7 9 12 11 D0 D1 LD NC NC R11 C8 0.022uF 5 0 R7 C6 0.0033uF 3V C27 3 R12 51 R17 R16 0.0033uF R24 R23 16 FOUT GND 100K DIVIDERCONTROL D1 POWERDOWN 0 DIVIDEBY1 0 DIVIDEBY5 1 DIVIDEBY10 1 R5 Y2 3 2 4 VC 1 R19 C17 0 0.1uF 50.000MHZ DEPOP 6 VDD 1 VCRTL 4 OUT Y3 EN GND 3 NC 2 5 HITTITEMICROWAVECORPORATION R20 4 5 3 Frequency Multiplication Truth Table HMC1031MS8E Pins [Set by SW1 in Evaluation PCB Schematic] D0 TITLE NC PROJECT 50.000MHZ DRAWING#: 2 D1 PLL Feedback Division Ratio (N) 0 0 Power Down Mode 1 0 1 0 1 5 1 1 10 A 20 Alpha Rd Chelmsford, MA01824 0 DRAWNBY 6 EXT_VCO VCOVCC DEPOP VDD VCXO D0 0 1 0 1 J8 50 OhmCo-Planar Trace 16 16 DEPOP SSW-106-01-T-D HEADERTOUSBBOARD B 0.27uF R4 100K 0 C9 Attenuator R3 VTUNE DEPOP R9 DEPOP 22K C7 J4 R10 R8 7 6 DEPOP DEPOP LOOPFILTER 8 TDA02H0SB1 10 TP2 10.000MHZ DEPOP 4 2 0 1 1 EN U1 VCC 1 ? LED J9 C VCOVCC DEPOP TCXO C1 DEPOP OUT HMC1031MS8E D1 R1 DEPOP 0.1uF 122.88 MHz DEPOP 2 SW1 DEPOP 1 2 GND 3 TP1 4 VC 1 VDD 2 LD VDD TP4 C11 J7 C14 3 1 3V DATE 0.1uF XTAL 3V 0.1uF NAME TP3 C10 DEPOP 2 DEPOP 2 0.47uF NC NC NC NC 11/17/2011 V. VADUVA 0.1uF GND C2 2 D. ACEVAL CHANGEPERCP112108 0.1uF C18 C5 51 0 PRODUCTIONRELEASE ---- DEPOP 0.1uF R2 ----- CP112108 C13 R18 C26 3 B DESCRIPTION C16 9 Y4 EXT_REF 1 DEPOP R21 C CP111906 0.2 VR1 VR2 VR3 12 NC 1uF TP5 B C J6 R25 HV2 RD2 HV1 4 0.01uF HV4 3 C25 10K RD4 4.7uF RD3 GND 2 R30 C24 0.1uF ZONE 3V U2 VR1 VDD HV3 C23 RD1 16 15 14 13 1 1 REVISIONS ECN# R26 DEPOP TP7 TP8 2 REV DEPOP DEPOP +5.5V 3 R27 DEPOP NOTICEOF PROPRIETARYPROPERTY: THISDOCUMENT ANDTHEINFORMATIONCONTAINEDINIT ARETHEPROPRIETARYPROPERTYOF HITTITEMICROWAVECORPORATION. IT MAYNOT BECOPIEDORUSED INANYMANNERNORMAYANYOF THEINFORMATIONINORUPONIT BEUSEDFORANYPURPOSEWITHOUT THEEXPRESSEDWRITTENCONSENT OF ANAUTHORIZEDAGENT OF HITTITEMICROWAVECORPORATION. Clock Generators - SMT 6 SCH, CUSTOMEREVALUATION HMC1031MS8E DATE 1 SHEET 130-00139-00 V.VADUVA CODEIDNO. 02/19/2011 1CN88 1 OF SIZE C 1 REV C 14-03-2012_13:27 Loop Filter Configuration Table No. Fref [MHz] Fvco [MHz] Div BW [Hz] C8 R7 C9 1 10 100 10 10 220 nF 7.5 kΩ 4.7 uF 2 10 50 5 100 100 nF 5.6 kΩ 1 uF 3 10 50 5 2k 300 pF 100 kΩ 3.9 nF To view the Eval PCB Schematic please visit www.hittite.com and choose HMC1031MS8E from the “Search by Part Number” pull down menu. 9 For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com HMC1031MS8E v01.1112 CLOCK GENERATOR WITH INTEGER-N PLL 0.1 - 500 MHz Figure 15. HMC1031MS8E Application Diagram Jitter Attenuation In some cases, reference clocks to the system may come from external noisy sources with high jitter. The HMC1031MS8E may be used to attenuate this incoming jitter and distribute a clean clock in the system. In such a scheme, a narrow loop filter is selected for the HMC1031MS8E. The device frequency locks to the external VCXO but the reference jitter is attenuated as defined by the set loop filter bandwidth. The final output frequency and phase noise characteristics outside the loop bandwidth is defined by the phase noise characteristics of the VCXO used. A low jitter clock reference yields better clocking performance, better LO performance of RF PLLVCOs, and improves the SNR performance of data converters (ADC/DAC). Frequency Translation Quite often, the reference clock in a Test & Measurement or a Communications system is a high accuracy OCXO (Oven Controlled Crystal Oscillator) with excellent long-term stability. The HMC1031MS8E may find applications when the OCXO frequency needs to be multiplied up to a higher rate to drive the primary clock inputs in a system. The device offers a very low power, small package and high performance method to multiply its incoming frequency in x1, x5 and x10 rates. Such multiplication is needed because the higher reference clocks improve Phase Noise, ADC/DAC SNR, clock generator jitter and PHY BERs. In this scheme, the HMC1031MS8E may be connected to an external low cost VCXO (e.g. at 50MHz or 100MHz), and lock this external VCXO to the excellent long-term stability of the OCXO. Clock Generators - SMT HMC1031MS8E Application Information Loop Bandwidths with HMC1031MS8E In typical jitter attenuation applications, an incoming reference clock is frequency locked with a narrow PLL Loop Bandwidth such that its incoming noise is filtered out by the PLL and VCXO combination. The out of band phase noise of the PLL follows the VCXO that it’s locked to. A narrow PLL loop bandwidth ensures that the output jitter is determined by the VCXO (or any other type of high quality factor VCO) and not affected by the spectral noise of the incoming clock beyond the set loop bandwidth. Considering that the HMC1031MS8E will be used in narrow loop filter bandwidth configurations, the device is designed to have a low charge pump current of 50uA. This architecture offers advantages in low power consumption and loop filter design. Typically, narrow loop filter bandwidths require large filter capacitors. Thanks to the low charge pump current design of the HMC1031MS8E, smaller loop filter capacitor sizes may be used to implement narrow loop filters. It should be kept in mind that the HMC1031MS8E is designed to operate in only a few kHz loop bandwidths in its widest-loop bandwidth configuration. Using VCO/VCXO’s with Negative Tuning Slope In its normal configuration, HMC1031MS8E will work with any VCO/VCXO that has a positive tuning slope. For any VCO/VCXO with negative tuning slope i.e where frequency decreases with increasing tuning voltage, the loop filter AC ground should be connected to VCC instead of GND. For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 10