TS615
Dual Wide-Band Operational Amplifier
with High Output Current
■
■
■
■
■
■
■
■
■
■
Low noise: 2.5 nV/√Hz
High output current: 420 mA
Very low harmonic and intermodulation
distortion
High slew rate: 410 V/µs
-3 dB bandwidth: 40 MHz @ gain = 12 dB
on 25 Ω single-ended load
21.2 Vp-p differential output swing on 50 Ω
load, 12 V power supply
Current feedback structure
5 V to 12 V power supply
Specified for 20 Ω and 50 Ω differential load
Power down function with short-circuited
output to keep matching with the line in
sleep mode
P
TSSOP14 Exposed-Pad
(Plastic Micropackage)
c
u
d
Pin Connections (top view)
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Description
-VCC1 1
The TS615 is a dual operational amplifier
featuring a high output current of 410 mA. This
driver can be configured differentially for driving
signals in telecommunication systems using
multiple carriers. The TS615 is ideally suited for
xDSL (High Speed Asymmetrical Digital
Subscriber Line) applications. This circuit is
capable of driving a 10 Ω or 25 Ω load on a range
of power supplies: ±2.5 V, 5 V, ±6 V or +12 V. The
TS615 is capable of reaching a -3 dB bandwidth
of 40 MHz on a 25 Ω load with a 12 dB gain. This
device is designed for high slew rates and
demonstrates low harmonic distortion and
intermodulation. The TS615 offers a power-down
function to order to decrease power consumption.
During sleep mode, the device short circuits its
output in order to keep the impedance matched to
the line. The TS615 is housed in TSSOP14
exposed-pad plastic package for a very low
thermal resistance.
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Output1 2
+VCC1
3
14 -VCC2
13 Output2
+ -
- +
12 +VCC2
11 Non Inverting Input2
Non Inverting Input1 4
10 Inverting Input2
Inverting Input1 5
PowerDown 6
9 NC
NC 7
8 NC
Top View
dice
Pad
Cross Section View Showing Exposed-Pad.
This pad must be connected to a (-Vcc) copper area on the PCB.
Applications
■
■
Line driver for xDSL
Multiple video line driver
Order Codes
Part Number
Temperature Range
Package
Packaging
Marking
TS615IPWT
-40, +85°C
TSSOP (Thin Shrink
Outline Package)
Tape & Reel
TS615
December 2004
Revision 2
1/36
TS615
Typical Application
1 Typical Application
Figure 1 shows a schematic of a typical xDSL application using the TS615.
Figure 1. Differential line driver for xDSL applications
12
11
+
+Vcc
1/2TS615
10
_
14
12.5Ω
13
-Vcc
Vi
Vo
R2
1:2
R1
25Ω
GND
100Ω
R4
R3
Vi
5
3
_
+Vcc
1/2TS615
4
+
6
1
Vo
2
12.5Ω
c
u
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-Vcc
Pw-Dwn
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2/36
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Absolute Maximum Ratings
TS615
2 Absolute Maximum Ratings
Table 1. Key parameters and their absolute maximum ratings
Symbol
VCC
Vid
Parameter
Supply voltage
1
Differential Input Voltage
2
3
Vin
Value
Unit
±7
V
±2
V
±6
V
Toper
Input Voltage Range
Operating Free Air Temperature Range
-40 to + 85
°C
Tstd
Storage Temperature
-65 to +150
°C
Tj
Maximum Junction Temperature
150
°C
Rthjc
Thermal Resistance Junction to Case
4
°C/W
Rthja
Thermal Resistance Junction to Ambient Area
40
°C/W
Pmax.
Maximum Power Dissipation (@25°C)
3.1
W
ESD
CDM: Charged Device Model
1.5
except HBM: Human Body Model
pins 4, 5, MM: Machine Model
10, 11
ESD
CDM: Charged Device Model
2
200
c
u
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1
ro
only pins HBM: Human Body Model
4, 5, 10, MM: Machine Model
11
Output Short Circuit
P
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let
kV
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kV
V
kV
1
kV
100
V
4
1) All voltage values, except differential voltage are with respect to network terminal.
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-
2) Differential voltage are non-inverting input terminal with respect to the inverting input terminal.
3) The magnitude of input and output voltage must never exceed VCC +0.3V.
4) An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating.
Destructive dissipation can result from short circuit on amplifiers.
)
s
(
ct
Table 2. Operating conditions
Symbol
VCC
Vicm
Parameter
u
d
o
Power Supply Voltage
Common Mode Input Voltage
r
P
e
Value
Unit
±2.5 to ±6
-VCC+1.5V to +VCC-1.5V
V
V
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3/36
TS615
Electrical Characteristics
3 Electrical Characteristics
Table 3. VCC = ±6V, Rfb=910Ω,Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Tamb
1.25
3.5
Tmin. < Tamb < Tmax.
2.1
Unit
DC performance
Input Offset Voltage
Vio
∆Vio
Iib+
Differential Input Offset Voltage
Tamb = 25°C
Positive Input Bias Current
Tamb
2.5
6
Tmin. < Tamb < Tmax.
Negative Input Bias Current
Iib-
Tamb
3
Input(+) Impedance
82
ZIN-
Input(-) Impedance
54
CIN+
Input(+) Capacitance
1
SVR
ICC
Common Mode Rejection Ratio
∆Vic = ±4.5V
20 log (∆Vic/∆Vio)
Tmin. < Tamb < Tmax.
Supply Voltage Rejection Ratio
∆Vcc=±2.5V to ±6V
20 log (∆Vcc/∆Vio)
Tmin. < Tamb < Tmax.
Total Supply Current per Operator
No load
58
P
e
let
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-
5
Tmin. < Tamb. < Tmax.
-3dB Bandwidth
)
s
(
ct
Full Power Bandwidth
BW
dB
78
14
17
21
MΩ
8.9
25
mA
40
MHz
Small Signal Vout<20mVp
AV = 12dB, RL = 25Ω
7
MHz
Vout = 6Vp-p, AV = 12dB, RL
= 25Ω
10.6
ns
Vout = 6Vp-p, AV = 12dB, RL
= 25Ω
12.2
ns
Settling Time
Vout = 6Vp-p, AV = 12dB, RL
= 25Ω
50
ns
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Fall Time
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Ts
79
dB
26
Rise Time
Tf
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Large Signal Vout=3Vp
AV = 12dB, RL = 25Ω
Gain Flatness @ 0.1dB
Tr
Small Signal Vout<20mVp
AV = 12dB, RL = 25Ω
Ω
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72
Vout = 7Vp-p, RL = 25Ω
Open Loop Transimpedance
µA
kΩ
63
61
Dynamic performance and output characteristics
ROL
15
3.2
ZIN+
mV
µA
7.8
Tmin. < Tamb < Tmax.
CMR
30
mV
bs
Slew Rate
Vout = 6Vp-p, AV = 12dB, RL
= 25Ω
330
410
V/µs
VOH
High Level Output Voltage
RL=25Ω Connected to GND
4.8
5.1
V
VOL
Low Level Output Voltage
RL=25Ω Connected to GND
Output Sink Current
Vout = -4Vp
SR
O
-350
Tmin. < Tamb < Tmax.
Iout
Output Source Current
Vout = +4Vp
Tmin. < Tamb < Tmax.
4/36
-5.5
V
-530
-440
330
-5.2
420
365
mA
Electrical Characteristics
TS615
Table 3. VCC = ±6V, Rfb=910Ω,Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Noise and distortion
2.5
nV/√Hz
iNp
Equivalent Input Noise Current (+)
F = 100kHz
15
pA/√Hz
iNn
Equivalent Input Noise Current (-)
F = 100kHz
21
pA/ √Hz
HD2
2nd Harmonic distortion
(differential configuration)
Vout = 14Vp-p, AV = 12dB
F= 110kHz, RL = 50Ω diff.
-87
dBc
HD3
3rd Harmonic distortion
(differential configuration)
Vout = 14Vp-p, AV = 12dB
F= 110kHz, RL = 50Ω diff.
-83
dBc
2nd Order Intermodulation Product
(differential configuration)
F1= 100kHz, F2 = 110kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
-76
F1= 370kHz, F2 = 400kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
-75
F1 = 100kHz, F2 = 110kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
-88
eN
Equivalent Input Noise Voltage
IM2
3rd Order Intermodulation Product
(differential configuration)
IM3
F = 100kHz
F1 = 370kHz, F2 = 400kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
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dBc
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dBc
-87
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5/36
TS615
Electrical Characteristics
Table 4. VCC = ±2.5V, Rfb=910Ω,Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Tamb
0.5
2.5
Tmin. < Tamb < Tmax.
1.2
Unit
DC performance
Input Offset Voltage
Vio
∆Vio
Iib+
Differential Input Offset Voltage
Tamb = 25°C
Positive Input Bias Current
Tamb
5
Tmin. < Tamb < Tmax.
8
Negative Input Bias Current
Iib-
2.5
Tamb
0.8
Tmin. < Tamb < Tmax.
1.24
30
mV
mV
µA
11
µA
ZIN+
Input(+) Impedance
71
kΩ
ZIN-
Input(-) Impedance
62
Ω
CIN+
Input(+) Capacitance
1.5
pF
CMR
SVR
ICC
Common Mode Rejection Ratio
∆Vic = ±1V
20 log (∆Vic/∆Vio)
Tmin. < Tamb. < Tmax.
Supply Voltage Rejection Ratio
∆Vcc=±2V to ±2.5V
20 log (∆Vcc/∆Vio)
Tmin. < Tamb. < Tmax.
Total Supply Current per Operator
No load
55
63
BW
Tmin. < Tamb. < Tmax.
11.9
SR
VOH
VOL
MΩ
2.1
20
Small Signal Vout<20mVp
AV = 12dB, RL = 10Ω
5.7
MHz
Vout = 2.8Vp-p, AV = 12dB
RL = 10Ω
11
ns
Vout = 2.8Vp-p, AV = 12dB
RL = 10Ω
11.5
ns
Settling Time
Vout = 2.2Vp-p, AV = 12dB
RL = 10Ω
39
ns
Slew Rate
Vout = 2.2Vp-p, AV = 12dB
RL = 10Ω
100
130
V/µs
High Level Output Voltage
RL=10Ω Connected to GND
1.5
Low Level Output Voltage
RL=10Ω Connected to GND
Output Sink Current
Vout = -1.25Vp
(s)
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20
Output Source Current
Vout = +1.25Vp
Tmin. < Tamb < Tmax.
30
MHz
1.75
-2.05
-350
Tmin. < Tamb < Tmax.
Iout
6/36
5.4
Large Signal Vout = 1.4Vp
AV = 12dB, RL = 10Ω
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-
2
mA
Full Power Bandwidth
Fall Time
Ts
e
t
le
15
Small Signal Vout<20mVp
AV = 12dB, RL = 10Ω
Rise Time
Tf
o
r
P
dB
-3dB Bandwidth
Gain Flatness @ 0.1dB
Tr
c
u
d
77
76
Vout = 2Vp-p, RL = 10Ω
Open Loop Transimpedance
)
s
t(
dB
58
Dynamic performance and output characteristics
ROL
60
V
-470
-450
200
V
-1.8
270
245
mA
Electrical Characteristics
TS615
Table 4. VCC = ±2.5V, Rfb=910Ω,Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Noise and distortion
F = 100kHz
nV/ √Hz
eN
Equivalent Input Noise Voltage
iNp
Equivalent Input Noise Current (+)
F = 100kHz
15
pA/√Hz
iNn
Equivalent Input Noise Current (-)
F = 100kHz
21
pA/ √Hz
HD2
2nd Harmonic distortion
(differential configuration)
Vout = 6Vp-p, AV = 12dB
F= 110kHz, RL = 20Ω diff.
-97
dBc
HD3
3rd Harmonic distortion
(differential configuration)
Vout = 6Vp-p, AV = 12dB
F= 110kHz, RL = 20Ω diff.
-98
dBc
2nd Order Intermodulation Product
(differential configuration)
F1= 100kHz, F2 = 110kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-86
F1= 370kHz, F2 = 400kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-88
F1 = 100kHz, F2 = 110kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-90
IM2
3rd Order Intermodulation Product
(differential configuration)
IM3
2.5
dBc
c
u
d
F1 = 370kHz, F2 = 400kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
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dBc
-85
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Power-down mode features
)
s
t(
The power-down command is a MOS input featuring a high input impedance.
Table 5. VCC = ±2.5V, 5V, ±6V or 12V, Tamb = 25°C
(s)
Symbol
Parameter
t
c
u
Min.
Typ.
Max.
Unit
V
Pin (6) Threshold Voltage for Power Down Mode
Vpdw
Iccpdw
bs
O
-VCC
-VCC+0.8
-VCC+2
+VCC
Power Down Mode Total Current Consumption@ VCC=5V
69
80
µA
Power Down Mode Total Current Consumption@ VCC=12V
148
180
µA
Power Down Mode Output Impedance @ VCC=5V
19
23
Ω
Power Down Mode Output Impedance @ VCC=12V
15.3
19
Ω
t
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l
o
Rpdw
Cpdw
d
o
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P
e
Low Level
High Level
Power Down Mode Output Capacitance
63
Power down control
Circuit status
Vpdw=Low Level
Active
Vpdw=High Level
Standby
pF
7/36
TS615
Electrical Characteristics
Figure 2. Load configuration
Figure 5. Load configuration
Load: RL=25Ω, VCC=±6V
50Ω
cable
49.9Ω
TS615
25Ω
_
c
u
d
AV=-1
2
40
2
(Vcc=±6V)
gain
0
20
(Vcc=±2.5V)
phase
-2
0
-4
-40
(Vcc=±6V)
-60
-10
-12
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t
le
)
s
(
ct
b
O
-
(Vcc=±6V)
-180
-200
(Vcc=±2.5V)
so
-8
-160
-220
(Vcc=±6V)
-240
-12
-100
-16
-6
-140
-10
-80
(Vcc=±2.5V, Rfb=1.1kΩ, Rload=10Ω)
(Vcc=±6V, Rfb=750Ω, Rload=25Ω)
(gain (dB))
Phase (°)
-20
(Vcc=±2.5V)
-8
)
s
t(
(Vcc=±2.5V)
phase
-4
-6
o
r
P
gain
0
(gain (dB)
50Ω
Figure 6. Closed loop gain vs. frequency
AV=+1
-14
49.9Ω
11Ω
0.5W
-2.5V
Figure 3. Closed loop gain vs. frequency
-2
10Ω
_
50Ω
33Ω
1W
-6V
50Ω
cable
-260
(Vcc=±2.5V, Rfb=1kΩ, Rin=1kΩ, Rload=10Ω)
(Vcc=±6V, Rfb=680Ω, Rin=680Ω, Rload=25Ω)
-14
-280
-16
-120
1k
10k
100k
1M
10M
Frequency (Hz)
100
u
d
o
r
P
e
6
4
bs
O
(gain (dB))
2
40
1M
10M
100M
8
-140
gain
6
20
(Vcc=±2.5V)
phase
100k
AV=-2
(Vcc=±6V)
gain
10k
Figure 7. Closed loop gain vs. frequency
-160
(Vcc=±2.5V)
phase
4
(Vcc=±6V)
0
-180
2
-20
(Vcc=±2.5V)
0
-40
-2
(Vcc=±6V)
-4
-60
-6
-80
-8
-100
-10
Phase (°)
t
e
l
o
8
1k
Frequency (Hz)
Figure 4. Closed loop gain vs. frequency
AV=+2
-300
100M
(gain (dB))
100
-200
(Vcc=±2.5V)
0
-220
-2
(Vcc=±6V)
-240
-4
-6
-260
(Vcc=±2.5V, Rfb=1kΩ, Rin=510Ω, Rload=10Ω)
(Vcc=±6V, Rfb=680Ω, Rin=750//620Ω, Rload=25Ω)
-8
-280
-10
-120
100
1k
10k
100k
1M
Frequency (Hz)
8/36
10M
100M
-300
100
1k
10k
100k
1M
Frequency (Hz)
10M
100M
Phase (°)
TS615
+2.5V
+
Phase (°)
+6V
+
Load: RL=10Ω, VCC=±2.5V
Electrical Characteristics
TS615
Figure 8. Closed loop gain vs. frequency
Figure 11. Closed loop gain vs. frequency
AV=+4
AV=-4
14
-140
14
40
gain
gain
12
12
20
phase
10
(Vcc=±6V)
phase
(Vcc=±6V)
0
-180
-40
4
(Vcc=±6V)
-60
2
0
(gain (dB))
Phase (°)
-20
(Vcc=±2.5V)
6
-220
4
(Vcc=±6V)
-240
2
0
-80
(Vcc=±2.5V, Rfb=910Ω, Rg=300Ω, Rload=10Ω)
(Vcc=±6V, Rfb=620Ω, Rg=560//330Ω, Rload=25Ω)
-2
-200
(Vcc=±2.5V)
6
-260
(Vcc=±2.5V, Rfb=1kΩ, Rin=320//360Ω, Rload=10Ω)
(Vcc=±6V, Rfb=620Ω, Rin=360//270Ω, Rload=25Ω)
-2
-100
-280
-4
-4
-300
-120
1k
10k
100k
1M
10M
100
100M
1k
10k
Figure 9. Closed loop gain vs. frequency
20
40
18
18
20
(Vcc=±2.5V)
phase
16
(Vcc=±6V)
-40
(Vcc=±6V)
8
-60
6
-80
(s)
(Vcc=±2.5V, Rfb=680Ω, Rg=240//160Ω, Rload=10Ω)
(Vcc=±6V, Rfb=510Ω, Rg=270//100Ω, Rload=25Ω)
-100
2
1k
10k
100k
ct
1M
10M
Frequency (Hz)
u
d
o
45
)
s
t(
-140
-160
(Vcc=±2.5V)
-180
(Vcc=±6V)
-200
(Vcc=±2.5V)
so
10
-220
(Vcc=±6V)
8
-240
6
-260
(Vcc=±2.5V, Rfb=680Ω, Rin=160//180Ω, Rload=10Ω)
(Vcc=±6V, Rfb=510Ω, Rin=150//110Ω, Rload=25Ω)
4
-280
2
-300
-120
100
100M
r
P
e
t
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l
o
12
b
O
-
Figure 10. Bandwidth vs. temperature: AV=+4,
Rfb=910Ω
50
(gain (dB))
-20
(Vcc=±2.5V)
Phase (°)
(gain (dB))
e
t
le
14
10
100M
phase
0
14
100
o
r
P
gain
gain
12
10M
c
u
d
AV=-8
20
4
1M
Figure 12. Closed loop gain vs. frequency
AV=+8
16
100k
Frequency (Hz)
Frequency (Hz)
Phase (°)
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Figure 13. Positive slew rate: AV=+4, Rfb=620Ω,
VCC=±6V, RL=25Ω
4
Vcc=±6V
Load=25Ω
bs
2
VOUT (V)
40
Bw (MHz)
O
Phase (°)
8
8
(gain (dB))
-160
(Vcc=±2.5V)
(Vcc=±2.5V)
10
35
0
30
-2
Vcc=±2.5V
Load=10Ω
25
20
-40
-20
0
20
40
Temperature (°C)
60
80
-4
0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
9/36
TS615
Electrical Characteristics
Figure 14. Positive slew rate: AV=+4, Rfb=910Ω,
Figure 17. Positive slew rate: AV= - 4, Rfb=620Ω,
VCC=±6V, RL=25Ω
2
4
1
2
VOUT (V)
VOUT (V)
VCC=±2.5V, RL=10Ω
0
0
-2
-1
-2
0.0
10.0n
20.0n
30.0n
40.0n
-4
0.0
50.0n
10.0n
Figure 15. Negative slew rate: AV=+4, Rfb =620Ω,
2
2
1
VOUT (V)
VOUT (V)
4
0
10.0n
20.0n
)
s
(
ct
30.0n
Time (s)
)
s
t(
e
t
le
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P
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-
40.0n
0
-2
0.0
50.0n
u
d
o
Figure 16. Negative slew rate: AV=+4, Rfb =910Ω,
r
P
e
30.0n
40.0n
50.0n
VCC=±6V, RL=25Ω
4
bs
VOUT (V)
2
0
-1
-2
0.0
20.0n
Figure 19. Negative slew rate: AV= - 4, Rfb =620Ω,
t
e
l
o
2
10.0n
Time (s)
VCC=±2.5V, RL=10Ω
VOUT (V)
50.0n
-1
-4
0.0
0
-2
10.0n
20.0n
30.0n
Time (s)
10/36
40.0n
c
u
d
VCC=±2.5V, RL=10Ω
-2
O
30.0n
Figure 18. Positive slew rate: AV= - 4, Rfb=910Ω,
VCC=±6V, RL=25Ω
1
20.0n
Time (s)
Time (s)
40.0n
50.0n
-4
0.0
10.0n
20.0n
30.0n
Time (s)
40.0n
50.0n
Electrical Characteristics
TS615
Figure 20. Negative slew rate: AV= - 4,
Rfb=910Ω, VCC=±2.5V, RL=10Ω
Figure 23. Input voltage noise level: AV=+92,
Rfb=910Ω, Input+ connected to Gnd via 10Ω
2
5.0
Input Voltage Noise (nV/√Hz)
VOUT (V)
+
0
-2
0.0
10.0n
20.0n
30.0n
40.0n
4.5
_
4.0
10Ω
1k
10k
c
u
d
e
t
le
Vcc=±6V
20
Positive SR
ROL (MΩ)
Slew Rate (V/µs)
100
0
−50
o
s
b
O
-
)
s
(
ct
−150
0
20
40
Temperature (°C)
60
u
d
o
r
P
e
0
-40
40
60
80
14
12
10
8
300
Icc(+)
6
200
4
Positive&Negative SR
Rfb=620Ω
ICC (mA)
Slew Rate (V/µs)
20
16
400
Positive&Negative SR
Rfb=910Ω
−100
2
0
-2
-4
−200
-6
−300
Icc(-)
-8
−400
-10
−500
-12
−600
−40
0
Figure 25. Icc vs. power supply
Open loop, no load
500
0
-20
Temperature (°C)
t
e
l
o
O
Vcc=±2.5V
5
80
Figure 22. Slew rate vs. temperature: AV=+4,
Rfb=910Ω, VCC=±6V, RL=25Ω
100
15
10
Negative SR
−100
bs
)
s
t(
o
r
P
25
50
1M
Figure 24. Transimpedance vs. temperature,
open loop
150
600
100k
(Frequency (Hz)
200
−20
Ω
910Ω
910
2.5
30
−200
−40
- 6V
3.0
Time (s)
Figure 21. Slew rate vs. temperature: AV=+4,
Rfb=910Ω, VCC=±2.5V, RL=10Ω
Output
3.5
2.0
100
50.0n
+ 6V
-14
−20
0
20
40
Temperature (°C)
60
80
-16
5
6
7
8
9
10
11
12
VCC (V)
11/36
TS615
Electrical Characteristics
Figure 26. Iib vs. power supply
Open loop, no load
Figure 29. Iib(+) vs. temperature
Open loop, no load
7
8
Iib
I ++
6
7
B
Vcc=±6V
6
5
5
IIB(+) (µA)
Iib
IB (µA)
4
3
IibI --
2
4
3
2
B
Vcc=±2.5V
1
1
0
0
5
6
7
8
9
10
11
12
-1
-40
-20
0
Vcc (V)
5
5
3
VOH & VOL (V)
IIB(-) (µA)
Vcc=±6V
3
2
Vcc=±2.5V
1
0
20
40
uc
Temperature (°C)
12
10
bs
1
so
0
-1
)
s
t(
VOL
-2
-3
-4
-5
-6
5
80
6
7
8
9
10
11
12
Vcc (V)
Figure 31. Voh vs. temperature
Open loop
6
5
Icc(+) for Vcc=±2.5V
Icc(+) for Vcc=±6V
4
2
VOH (V)
ICC (mA)
O
4
e
t
le
2
b
O
-
t
e
l
o
14
6
(t s)
60
d
o
r
P
e
Figure 28. Icc vs. temperature
Open loop, no load
80
o
r
P
VOH
4
4
-20
60
c
u
d
6
0
-40
40
Figure 30. Voh & Vol vs. power supply
Open loop, RL=25Ω
Figure 27. Iib(-) vs. temperature
Open loop, no load
8
20
Temperature (°C)
0
-2
Vcc=±6vV
Load=25Ω
3
-4
-6
-8
2
Icc(-) for Vcc=±6V
Icc(-) for Vcc=±2.5V
-10
1
-12
Vcc=±2.5V
Load=10Ω
-14
-40
-20
0
20
40
Temperature (°C)
12/36
60
80
0
-40
-20
0
20
40
Temperature (°C)
60
80
Electrical Characteristics
TS615
Figure 32. Vol vs. temperature
Open loop
Figure 35. CMR vs. temperature
Open loop, no load
0
70
Vcc=±2.5V
Load=10Ω
-1
68
66
CMR (dB)
-2
VOL (V)
Vcc=±6V
64
-3
Vcc=±6V
Load=25Ω
-4
62
60
58
56
Vcc=±2.5V
54
-5
52
-6
-40
-20
0
20
40
60
50
-40
80
-20
0
Temperature (°C)
Figure 33. Differential Vio vs. temperature
Open loop, no load
40
Figure 36. SVR vs. temperature
Open loop, no load
c
u
d
450
e
t
le
82
Vcc=±2.5V
SVR (dB)
350
300
o
s
b
O
80
60
80
)
s
t(
o
r
P
84
400
∆VIO (µV)
20
Temperature (°C)
Vcc=±6V
78
Vcc=±6V
250
200
-40
-20
0
20
ct
40
Temperature (°C)
(s)
u
d
o
60
80
Figure 34. Vio vs. temperature
Open loop, no load
1.5
0
20
40
60
80
Temperature (°C)
250
Vcc=±6V
200
150
100
Isource
50
1.0
Iout (mA)
VIO (mV)
-20
300
bs
O
-40
Vcc=±2.5V
Figure 37. Iout vs. temperature
Open loop, VCC=±6V, RL=10Ω
r
P
e
t
e
l
o
2.0
76
0.5
0
-50
-100
-150
-200
-250
0.0
-350
Vcc=±2.5V
-0.5
-40
Isink
-300
-20
0
20
-400
40
Temperature (°C)
60
80
-450
-40
-20
0
20
40
60
80
Temperature (°C)
13/36
TS615
Electrical Characteristics
Figure 38. Iout vs. temperature
Open loop, VCC=±2.5V, RL=25Ω
Figure 41. Isource vs. output amplitude
VCC=±2.5V, open loop, no load
700
300
250
600
200
150
Iout (mA)
50
Isource (mA)
100
Isource
0
-50
-100
-150
-200
-250
500
400
300
200
Isink
-300
100
-350
-400
-450
-40
-20
0
20
40
60
0
0.0
80
0.5
1.0
Temperature (°C)
Figure 39. Maximum output amplitude vs.
load: AV=+4, Rfb=620Ω, VCC=±6V
2.0
2.5
c
u
d
0
10
-100
Vcc=±6V
e
t
le
-200
Isink (mA)
8
6
4
)
s
t(
Figure 42. Isink vs. output amplitude
VCC=±6V, open loop, no load
12
VOUT-MAX (VP-P)
1.5
Vout (V)
-300
o
r
P
o
s
b
O
-400
-500
Vcc=±2.5V
2
)
s
(
ct
0
0
50
100
150
RLOAD (Ω)
-600
-700
200
u
d
o
-100
r
P
e
t
e
l
o
Isource (mA)
Isink (mA)
-2
-1
0
600
-400
500
400
300
-500
200
-600
100
0
-2.0
-1.5
-1.0
Vout (V)
14/36
-3
700
-300
-700
-2.5
-4
Figure 43. Isource vs. output amplitude
VCC=±6V, open loop, no load
s
b
O
-200
-5
Vout (V)
Figure 40. Isink vs. output amplitude
VCC=±2.5V, open loop, no load
0
-6
-0.5
0.0
0
1
2
3
Vout (V)
4
5
6
Electrical Characteristics
TS615
Figure 44. Icc (power down) vs. temperature
no load, open loop
200
150
ICC pdw (µA)
100
50
Vcc=±6V
0
Vcc=±2.5V
-50
-100
-150
-200
-40
-20
0
20
40
60
80
Temperature (°C)
c
u
d
e
t
le
)
s
(
ct
)
s
t(
o
r
P
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
s
b
O
15/36
TS615
Safe Operating Area
4 Safe Operating Area
Figure 45 shows the safe operating zone for the TS615. The curve shows the input level vs. the input
frequency—a characteristic curve which must be considered in order to ensure a good application
design. In the dash-lined zone, the consumption increases, and this increased consumption could do
damage to the chip if the temperature increases
Figure 45. Safe operating area
100
90700
80
600
60500
VINPUT (mVRMS)
Delay (ns)
70
Vcc=+/-6V
Ta=25°C
G=12dB
RL=100Ω
Av=4
Vcc=±6V, Rfb=620Ω, Load=25Ω
Vcc=±2.5V, Rfb=910Ω, Load=10Ω
IF Bw = 10Hz
Smoothing=19.247MHz
on 10ns/div scale
50
400
40
SAFE
OPERATING
AREA
30300
20
c
u
d
200
10
300k
1M
Frequency (Hz)
100
0
1M
)
s
(
ct
u
d
o
t
e
l
o
s
b
O
16/36
e
t
le
10M
Frequency (Hz)
r
P
e
50M
10M
o
s
b
O
-
o
r
P
100M
)
s
t(
Intermodulation Distortion Product
TS615
5 Intermodulation Distortion Product
The non-ideal output of the amplifier can be described by the following series, due to a non-linearity in the
input-output amplitude transfer:
2
V out = C o + C 1 V in + C 2 V in … + C n V in
n
where the single-tone input is Vin=Asinωt, and C0 is the DC component, C1(Vin) is the fundamental, Cn is
the amplitude of the harmonics of the output signal Vout.
A one-frequency (one-tone) input signal contributes to a harmonic distortion. A two-tone input signal
contributes to a harmonic distortion and an intermodulation product.
This intermodulation product, or rather, the study of the intermodulation distortion of a two-tone input
signal is the first step in characterizing the amplifiers capability for driving multi-tone signals.
The two-tone input is equal to:
V
in
= A sin ω t + B sin ω t
1
2
giving:
V
2
c
u
d
)
s
t(
C
C ( A sin ω t + B sin ω t ) + C ( A sin ω t + B sin ω t ) … + C ( A sin ω t + B sin ω t )
out = 0 + 1
1
2
1
2
1
2
2
n
n
In this expression, we can extract distortion terms and intermodulations terms from a single sine wave:
second-order intermodulation terms IM2 by the frequencies (ω1-ω2) and (ω1+ω2) with an amplitude of
C2A2 and third-order intermodulation terms IM3 by the frequencies (2ω1-ω2), (2ω1+ω2), (−ω1+2ω2) and
(ω1+2ω2) with an amplitude of (3/4)C3A3.
e
t
le
o
r
P
We can measure the intermodulation product of the driver by using the driver as a mixer via a summing
amplifier configuration. In doing this, the non-linearity problem of an external mixing device is avoided.
Figure 46. Non-inverting summing amplifier
)
s
(
ct
1k Ω
1kΩ
49.9Ω
u
d
o
Vin1
1:√2
r
P
e
North Hills
0315PB
s
b
O
11
+
+Vcc
1/2TS615
10
49.9Ω
13
_
400Ω
50Ω
t
e
l
o
49.9Ω
o
s
b
O
Rfb1
33Ω
Rg1
Vin2
Vout diff.
1:√2
400Ω
50Ω
√2:1
100Ω
50Ω
33Ω
Rg2
North Hills
0315PB
Rfb2
North Hills
0315PB
49.9Ω
1kΩ
_
49.9Ω
1/2TS615
+
-Vcc
1k Ω
49.9Ω
17/36
TS615
Intermodulation Distortion Product
The following graphs show the IM2 and the IM3 of the amplifier in different configurations. The two-tone
input signal is created by a Marconi 2026 multisource generator. Each tone has the same amplitude. The
measurement was carried out using an HP3585A spectrum analyzer.
Figure 48. Intermodulation vs. output
amplitude: 370 kHz & 400 kHz,
AV = +1.5, Rfb = 1 kΩ, R L = 28 Ω diff.,
VCC = ±2.5 V
-30
-30
-40
-40
-50
-50
IM2
30kHz
IM2
770kHz
-60
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
Figure 47. Intermodulation vs. output
amplitude: 370 kHz & 400 kHz,
AV = +1.5, R fb = 1 kΩ, RL = 14 Ω diff.,
VCC = ±2.5 V
IM3
340kHz, 430kHz
-70
-80
-90
-60
-70
-80
-90
IM3
1140kHz, 1170kHz
0
1
2
3
4
5
6
7
0
8
1
Figure 49. Intermodulation vs. gain: 370kHz &
e
t
le
-60
IM2
30kHz
-50
)
s
(
ct
IM2
770kHz
-70
-80
-90
o
r
P
e
-100
-110
1.0
o
s
b
O
-40
1.5
t
e
l
o
2.0
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
-50
18/36
c
u
d
du
2.5
4
5
6
7
8
o
r
P
AV=+1.5, Rfb=1kΩ, Vout=6.5Vpp, VCC=±2.5V
-30
IM3
340kHz, 430kHz, 1140kHz, 1170kHz
3
Figure 50. Intermodulation vs. Load: 370kHz & 400kHz,
400kHz, RL=20Ω diff., Vout=6Vpp, V CC=±2.5V
-40
2
Differential Output Voltage (Vp-p)
Differential Output Voltage (Vp-p)
-30
)
s
t(
IM3
1140kHz, 1170kHz
-100
-100
s
b
O
IM2
770kHz
IM2
30kHz
IM3
340kHz, 430kHz
IM3
340kHz, 430kHz, 1140kHz, 1170kHz
-60
IM2
30kHz
IM2
770kHz
-70
-80
-90
-100
-110
3.0
Closed Loop Gain (Linear)
3.5
4.0
0
20
40
60
80
100
120
140
Differential Load (Ω)
160
180
200
Intermodulation Distortion Product
TS615
Figure 51. Intermodulation vs. Output Amplitude:
100kHz & 110kHz, AV=+4, Rfb=620Ω, RL=50Ω diff.,
VCC=±6V
VCC=±6V
-30
-30
-40
-40
-60
IM3
90kHz, 120kHz, 310kHz, 320kHz
-50
IM3
90kHz, 120kHz
IM2
210kHz
IM3
310kHz
-70
IM2 and IM3 (dBc)
-50
IM2 and IM3 (dBc)
Figure 52. Intermodulation vs. Output Amplitude:
100kHz & 110kHz, AV=+4, Rfb=620Ω, RL=200Ω diff.,
IM3
320kHz
-80
IM2
210kHz
-60
-70
-80
-90
-90
-100
-100
-110
-110
2
4
6
8
10
12
14
16
18
20
2
22
4
6
Figure 53. Intermodulation vs. Frequency Range:
14
16
18
20
22
)
s
t(
c
u
d
370kHz & 400kHz, AV=+4, Rfb=620Ω, RL=50Ω diff.,
VCC=±6V
VCC=±6V
-30
-40
-50
IM2
770kHz
-60
IM3
1140kHz, 1170kHz
-70
IM3
340kHz, 430kHz
-90
-100
uc
-110
2
4
6
8
10
12
14
(t s)
16
18
Differential Output Voltage (Vp-p)
d
o
r
P
e
e
t
le
-50
IM2 and IM3 (dBc)
IM2
30kHz
0
12
AV=+4, Rfb=620Ω, RL=50Ω diff., Vout=16Vpp,
-40
-80
10
Figure 54. Intermodulation vs. Output Amplitude:
-30
IM2 and IM3 (dBc)
8
Differential Output Voltage (Vp-p)
Differential Output Voltage (Vp-p)
20
-60
o
s
b
O
-70
o
r
P
IM2
30kHz
IM3
1140kHz, 1170kHz
IM2
770kHz
IM3
340kHz, 430kHz
-80
-90
-100
22
-110
0
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
t
e
l
o
s
b
O
19/36
TS615
Printed Circuit Board Layout Considerations
6 Printed Circuit Board Layout Considerations
In the ADSL frequency rangey, printed circuit board parasites can affect the closed-loop performance.
The use of a proper ground plane on both sides of the PCB is necessary to provide low inductance and a
low resistance common return. The most important factors affecting gain flatness and bandwidth are
stray capacitance at the output and inverting input. To minimize capacitance, the space between signal
lines and ground plane should be maximized. Feedback component connections must be as short as
possible in order to decrease the associated inductance which affects high-frequency gain errors. It is
very important to choose the smallest possible external components—for example, surface mounted
devices (SMD)—in order to minimize the size of all DC and AC connections.
6.1 Thermal information
The TS615 is housed in an exposed-pad plastic package. As described in Figure 55, this package has a
lead frame upon which the dice is mounted. This lead frame is exposed as a thermal pad on the
underside of the package. The thermal contact is direct with the dice. This thermal path provides an
excellent thermal performance.
)
s
t(
The thermal pad is electrically isolated from all pins in the package. It must be soldered to a copper area
of the PCB underneath the package. Through these thermal paths within this copper area, heat can be
conducted away from the package. The copper area must be connected to -VCC available on pin 4.
Figure 55. Exposed-pad package
Figure 56. Evaluation board
e
t
le
DICE
1
)
s
(
ct
u
d
o
Bottom View
Side View
r
P
e
DICE
Cross Section View
t
e
l
o
s
b
O
20/36
o
r
P
o
s
b
O
-
c
u
d
Printed Circuit Board Layout Considerations
TS615
Figure 57. Schematic diagram
J106
R107
J108
R109
10
R111
Inverting Amplifier
R115
_
J111
10
R109
J108
_
1/2TS615
R104
R117
11
R119
13
R121
R104
1/2TS615
+
+
R119
13
11
J111
R121
R108
R117
J107
R115
R110
R113
Differential Amplifier
+
J110
13
R121
R117
+Vcc
u
d
o
+Vcc
100nF
3
4
r
P
e
J102
GND
5
J103
-Vcc
R114
J110
R118
2
Differential Amplifier
4
R107
J106
+
1/2TS615
5
R118
2
_
R114
J110
6
+
1/2 TS615
2
_
1
R112
R115
10
1/2TS615
100nF
2
_
11
12
1/2TS615
3
11
+
14
-Vcc
J111
R119
13
13
J109
R110
R105
C108
+
R113
10
_
R121
C107
R117
+Vcc
-Vcc
-Vcc
-Vcc
+Vcc
1
J104
100nF
Exposed-Pad
100uF
C104
C103
100nF
C106
t
e
l
o
bs
R122
1/2TS615
_
R111
100uF
C101
C102
100nF
C105
-Vcc
R105
R113
)
s
(
ct
Power down
J112
Power Supply
o
s
b
O
-
+
5
R102
+
J111
o
r
P
4
R120
R119
R110
J101
+Vcc
R107
R102
_
1/2TS615
11
e
t
le
J106
R115
10
R106
R120
R101
R112
J105
R116
R120
Non-Inverting Summing Amplifier
R111
R114
R111
R118
2
R116
R102
1/2TS615
_
5
J109
c
u
d
4
R107
J106
)
s
t(
R116
R105
R113
J109
O
J110
R112
R103
R118
2
R114
R111
R114
1/2TS615
_
5
R120
R116
R102
2
_
5
J110
R118
+
R102
+
1/2 TS615
4
R107
J106
4
R120
R106
R116
R101
Non-Inverting Amplifier
J105
100nF
-Vcc
21/36
TS615
Printed Circuit Board Layout Considerations
Figure 58. Component locations - top side
Figure 59. Component locations - bottom side
Figure 60. Top side board layout
Figure 61. Bottom side board layout
c
u
d
e
t
le
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
s
b
O
22/36
o
s
b
O
-
o
r
P
)
s
t(
Noise Measurements
TS615
7 Noise Measurements
The noise model is shown in Figure 62, where:
l eN: input voltage noise of the amplifier
l iNn: negative input current noise of the amplifier
l iNp: positive input current noise of the amplifier
Figure 62. Noise model
+
iN+
R3
output
TS615
HP3577
Input noise:
8nV/√Hz
_
N3
iN-
eN
c
u
d
R2
N2
R1
e
t
le
N1
The closed loop gain is:
)
s
t(
o
r
P
o
s
b
O
-
R
fb
A V = g = 1 + ---------Rg
)
s
(
ct
The six noise sources are:
u
d
o
r
P
e
t
e
l
o
s
b
O
R2
V1 = eN ×  1 + --------

R1
V2 = iNn × R2
R2
V3 = iNp × R3 ×  1 + --------

R1
R2
V4 = – -------- × 4kTR1
R1
V5 =
4kTR2
R2
V6 =  1 + -------- 4kTR3

R1
We assume that the thermal noise of a resistance R is:
4 kTR DF
where ∆F is the specified bandwidth.
23/36
TS615
Noise Measurements
On a 1Hz bandwidth the thermal noise is reduced to
4kTR
where k is Boltzmann's constant, equals to 1374 x 10-23J/°K. T is the temperature (°K).
The output noise eNo is calculated using the Superposition Theorem. However eNo is not the sum of all
noise sources, but rather the square root of the sum of the square of each noise source, as shown in
Equation 1.
eNo =
eNo
2
2
2
2
2
2
2
V1 + V2 + V3 + V4 + V 5 + V6
Equation 1
2
2
2
2
2
2
2
= eN × g + iNn × R2 + iNp × R 3 × g
Equation 2
R2 2
R2 2
… +  -------- × 4kTR1 + 4kTR2 +  1 + -------- × 4kTR3
 R1

R1
c
u
d
)
s
t(
The input noise of the instrumentation must be extracted from the measured noise value. The real output
noise value of the driver is:
2
2
( Measured ) – ( instrumentation )
eNo =
e
t
le
o
r
P
Equation 3
The input noise is called the Equivalent Input Noise as it is not directly measured but is evaluated from the
measurement of the output divided by the closed loop gain (eNo/g).
o
s
b
O
-
After simplification of the fourth and the fifth term of Equation 2 we obtain:
eNo
2
2
2
2
2
2
2
2
R2 2
= eN × g + iNn × R2 + iNp × R3 × g … + g × 4kTR2 +  1 + -------- × 4kTR 3

R1
(s)
7.1 Measurement of eN
Equation 4
d
o
r
P
e
t
c
u
If we assume a short-circuit on the non-inverting input (R3=0), Equation 4 becomes:
t
e
l
o
eNo =
2
2
2
2
eN × g + iNn × R 2 + g × 4kTR2
Equation 5
In order to easily extract the value of eN, the resistance R2 will be chosen as low as possible. On the
other hand, the gain must be large enough:
s
b
O
l R1=10Ω, R2=910Ω, R3=0, Gain=92
l Equivalent Input Noise: 2.57nV/√Hz
l Input Voltage Noise: eN=2.5nV/√Hz
24/36
Noise Measurements
TS615
7.2 Measurement of iNn
To measure the negative input current noise iNn, we set R3=0 and use Equation 5. This time the gain
must be lower in order to decrease the thermal noise contribution:
l R1=100Ω, R2=910Ω, R3=0, gain=10.1
l Equivalent input noise: 3.40nV/√Hz
l Negative input current noise: iNn =21pA/√Hz
7.3 Measurement of iNp
To extract iNp from Equation 3, a resistance R3 is connected to the non-inverting input. The value of R3
must be chosen in order to keep its thermal noise contribution as low as possible against the iNp
contribution.
l R1=100Ω, R2=910Ω, R3=100Ω, Gain=10.1
l Equivalent input noise: 3.93nV/√Hz
l Positive input current noise: iNp=15pA/√Hz
l Conditions: Frequency=100kHz, VCC =±2.5V
c
u
d
)
s
t(
l Instrumentation: HP3585A Spectrum Analyzer (the input noise of the HP3585A is 8nV/√Hz)
e
t
le
)
s
(
ct
o
r
P
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
s
b
O
25/36
TS615
Power Supply Bypassing
8 Power Supply Bypassing
Correct power supply bypassing is very important for optimizing performance in high-frequency ranges.
Bypass capacitors should be placed as close as possible to the IC pins to improve high-frequency
bypassing. A capacitor greater than 1µF is necessary to minimize the distortion. For a better quality
bypassing, a capacitor of 10nF is added using the same implementation conditions. Bypass capacitors
must be incorporated for both the negative and the positive supply.
Figure 63. Circuit for power supply bypassing
+VCC
10µF
+
10nF
+
TS615
-
10nF
c
u
d
10µF
+
-VCC
e
t
le
8.1 Single power supply
)
s
t(
o
r
P
o
s
b
O
-
The TS615 can operate with power supplies ranging from 12V to 5V. The power supply can either be
single (12V or 5V referenced to ground), or dual (such as ±6V and ±2.5V).
In the event that a single supply system is used, new biasing is necessary to assume a positive output
dynamic range between 0V and +VCC supply rails. Considering the values of VOH and V OL, the amplifier
will provide an output dynamic from +0.5V to 10.6V on 25Ω load for a 12V supply and from 0.45V to 3.8V
on 10Ω load for a 5V supply.
)
s
(
ct
u
d
o
The amplifier must be biased with a mid-supply (nominally +VCC/2), in order to maintain the DC
component of the signal at this value. Several options are possible to provide this bias supply, such as a
virtual ground using an operational amplifier or a two-resistance divider (which is the cheapest solution).
A high resistance value is required to limit the current consumption. On the other hand, the current must
be high enough to bias the non-inverting input of the amplifier. If we consider this bias current (30µA
max.) as the 1% of the current through the resistance divider to keep a stable mid-supply, two resistances
of 2.2kΩ can be used in the case of a 12V power supply and two resistances of 820Ω can be used in the
case of a 5V power supply.
r
P
e
t
e
l
o
s
b
O
The input provides a high-pass filter with a break frequency below 10Hz which is necessary to remove the
original 0 volt DC component of the input signal, and to fix it at +VCC/2.
26/36
Power Supply Bypassing
TS615
Figure 64 shows a schematic of a 5V single power supply configuration
Figure 64. Circuit for +5V single supply
+5V
10µF
+
IN
Rin
1kΩ
+5V
100µF
OUT
½ TS615
_
Rs
Rload
R1
820Ω
R2
820Ω
Rfb
910Ω
RG
+ 1µF 10nF
+
CG
c
u
d
8.2 Channel separation and crosstalk
)
s
t(
o
r
P
Figure 65 shows an example of crosstalk from one amplifier to a second amplifier. This phenomenon,
accentuated at high frequencies, is unavoidable and intrinsic to the circuit itself.
e
t
le
Nevertheless, the PCB layout also has an effect on the crosstalk level. Capacitive coupling between
signal wires, distance between critical signal nodes and power supply bypassing are the most significant
factors.
o
s
b
O
-
Figure 65. Crosstalk vs. frequency: AV=+4, Rfb =620Ω, VCC=±6V, Vout=2Vp
)
s
(
ct
-50
-60
s
b
O
t
e
l
o
CrossTalk (dB)
o
r
P
e
du
-70
-80
-90
-100
-110
-120
-130
10k
100k
1M
10M
Frequency (Hz)
27/36
TS615
Power Down Mode Behavior
9 Power Down Mode Behavior
Please note that the short-circuited output in power-down mode is referenced to (-VCC). No problems
appear when used in differential mode. Nevertheless, when used in single-ended mode on a load
referenced to GND, the (-VCC) level contributes to a current consumption through the load.
Figure 66. Equivalent schematic
Vcc +
..
POWER
DOWN
pin6
3
4
+
5
_
A1
.. .
2 Ouput 1
Rpdw
1
-Vcc
Vcc Vcc 14
11
+
10
_
c
u
d
-Vcc
.. .
Rpdw
A2
..
12
Vcc +
)
s
(
ct
e
t
le
13 Ouput 2
b
O
-
so
)
s
t(
o
r
P
POWER
DOWN
pin6
As shown in Figure 66, the interest of having an output short-circuit in power-down mode is to keep the
best impedance matching between the system and the twisted pair telephone line when the modem is in
sleep mode. By doing this, the modem can be woken up with a signal from the line without any damage
u
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o
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P
e
t
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o
s
b
O
28/36
Power Down Mode Behavior
TS615
to this signal. This concept is particularly intended for the ADSL-over-voice modems, where the modem in
sleep mode, and must be woken up by the phone call.
Figure 67. Matching in sleep mode
Consumption=80µA
Matching
12.5Ω
Transformer
1:2
TS615
Line (100Ω)
25Ω
5Ω max.
12.5Ω
POWER DOWN
The system can be waked-up
from the line
Figure 68. Standby mode. Time On>Off
c
u
d
Figure 69. Standby mode. Time Off>On
0
Enabled Output
1
-1
0
e
t
le
−1
(Volts)
(Volts)
Disabled Output
Vout
-2
-3
−2
o
s
b
O
−3
-4
)
s
t(
Disabled Output
o
r
P
Vout
Enabled Output
−4
-5
Vpdw
−5
-6
0
10
20
(s)
30
Time (µs)
40
Vpdw
−6
50
0
1
2
3
4
5
Time (µs)
t
c
u
Figure 70. Standby mode. input/output isolation vs. frequency: AV=+4, Rfb =620Ω,
d
o
r
P
e
VCC=±6V, Vout=3Vp
O
bs
-20
-30
Isolation (dB)
t
e
l
o
0
-10
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
10k
100k
1M
10M
Frequency (Hz)
29/36
TS615
Choosing the Feedback Circuit
10 Choosing the Feedback Circuit
As described on Figure 72 on page 31, the TS615 requires a 620 Ω feedback resistor to optimize the
bandwidth with a gain of 12 dB for a 12 V power supply. Nevertheless, due to production test constraints,
the TS615 is tested with the same feedback resistor for 12 V and 5 V power supplies (910Ω).
Table 6. Closed-loop gain - feedback components
VCC (V)
±6
±2.5
Gain
Rfb (Ω)
+1
750
+2
680
+4
620
+8
510
-1
680
-2
680
-4
620
-8
510
+1
1.1k
+2
1k
+4
910
+8
680
e
t
le
-1
-2
o
s
b
O
-4
-8
10.1 The bias of an inverting amplifier
)
s
(
ct
c
u
d
)
s
t(
o
r
P
1k
1k
910
680
A resistance is necessary to achieve a good input biasing, such as resistance R, shown in Figure 71.
The magnitude of this resistance is calculated by assuming the negative and positive input bias current.
The aim is to compensate for the offset bias current, which could affect the input offset voltage and the
output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero volt output, the resistance R will be:
u
d
o
r
P
e
t
e
l
o
bs
O
R = Rin // Rfb
Figure 71. Compensation of the input bias current
Rfb
Ib-
Rin
_
Vcc+
Output
TS615
+
R
30/36
Load
Vcc-
Ib+
Choosing the Feedback Circuit
TS615
10.2 Active filtering
Figure 72. Low-pass active filtering. Sallen-Key
C1
R2
R1
+
IN
OUT
C2
TS615
_
25Ω
RG
Rfb
910Ω
)
s
t(
From the resistors Rfb and RG we can directly calculate the gain of the filter in a classical, non-inverting
amplification configuration:
c
u
d
R
fb
A V = g = 1 + ---------Rg
e
t
le
We assume the following expression as the response of the system:
o
r
P
Vout
g
jω
T ω = ------------------- = --------------------------------------------j
Vin
2
jω
j ω (j ω )
1 + 2 ζ ------- + -------------ωc
2
ω
c
)
s
(
ct
o
s
b
O
-
The cutoff frequency is not gain-dependent and so becomes:
u
d
o
1
ω c = -------------------------------------R1R2C 1C2
The damping factor is calculated by the following expression:
r
P
e
t
e
l
o
1
ζ = --- ω c ( C1 R 1 + C1 R 2 + C2 R 1 – C1 R 1 g )
2
The higher the gain the more sensitive the damping factor is. When the gain is higher than 1, it is
preferable to use some very stable resistor and capacitor values. In the case of R1=R2:
s
b
O
R
fb
2C – C ---------2
1R
g
ζ = -----------------------------------2 C C
1 2
31/36
TS615
Increasing the Line Level Using Active Impedance Matching
11 Increasing the Line Level Using Active Impedance Matching
With passive matching, the output signal amplitude of the driver must be twice the amplitude on the load.
To go beyond this limitation an active matching impedance can be used. With this technique, it is possible
to maintain good impedance matching with an amplitude on the load higher than half of the output driver
amplitude. This concept is shown in Figure 73 for a differential line.
Figure 73. TS615 as a differential line driver with active impedance matching
1µ
100n
Vcc+
+
_
Vcc+
10n
Rs1
GND
1k
R2
Vi
Vo°
1:n
Vo
1/2
R3
R1
RL
Vcc/2
1/2
1k
GND
c
u
d
R5
100n
10µ
Vi
R1
Hybrid
&
Transformer
R4
Vcc+
+
_
Rs2
GND
100n
Component calculation
Vo
Vo°
e
t
le
)
s
t(
o
r
P
o
s
b
O
-
Let us consider the equivalent circuit for a single-ended configuration, as shown in Figure 74.
)
s
(
ct
Figure 74. Single-ended equivalent circuit
u
d
o
r
P
e
t
e
l
o
s
b
O
32/36
Vi
+
Rs1
_
Vo°
Vo
R2
-1
R3
1/2R1
1/2RL
100Ω
Increasing the Line Level Using Active Impedance Matching
TS615
First let’s consider the unloaded system. We can assume that the currents through R1, R2 and R3 are
respectively:
2Vi ( Vi – Vo ° )
( Vi + Vo )
---------, --------------------------- and -----------------------R2
R3
R1
As Vo° equals Vo without load, the gain in this case becomes:
2R2 R2
1 + ----------- + -------Vo ( noload )
R1 R3
G = --------------------------------- = -----------------------------------R2
Vi
1 – -------R3
The gain, for the loaded system is given by Equation 6:
2R2 R2
1 + ----------- + -------Vo ( withload )
R1 R3
1
GL = -------------------------------------- = --- -----------------------------------R2
Vi
2
1 – -------R3
Equation 6
)
s
t(
The system shown in Figure 74 is an ideal generator with a synthesized impedance acting as the internal
impedance of the system. From this, the output voltage becomes:
c
u
d
Vo = ( ViG ) – ( R o ⋅ Iou t )
where Ro is the synthesized impedance and Iout the output current.
e
t
le
On the other hand Vo can be expressed as:
o
r
P
o
s
b
O
-
2R2 R2
Vi  1 + ----------- + --------

R1 R3 Rs1Iout
Vo = ------------------------------------------------ – ----------------------R2
R2
1 – -------1 – -------R3
R3
)
s
(
ct
Equation 7
Equation 8
By identification of both Equation 7 and Equation 8, the synthesized impedance is, with Rs1=Rs2=Rs:
u
d
o
r
P
e
t
e
l
o
Rs
Ro = ----------------R2
1 – -------R3
Equation 9
Figure 75: Equivalent schematic. Ro is the synthesized impedance
s
b
O
Ro
Vi.Gi
Iout
1/2RL
33/36
TS615
Increasing the Line Level Using Active Impedance Matching
Let us write Vo°=kVo, where k is the matching factor varying between 1 and 2. If we assume that the
current through R3 is negligible, we can calculate the output resistance, Ro:
kV oRL
Ro = -----------------------------RL + 2R s1
After choosing the k factor, Rs will equal to 1/2RL(k-1).
For a good impedance matching we assume that:
1
Ro = --- RL
2
Equation 10
R2
-------- = 1 – 2Rs
----------R3
RL
Equation 11
From Equation 9 and Equation 10, we derive:
By fixing an arbitrary value of R2, Equation 11 becomes:
R2
R3 = --------------------2Rs
1 – ----------RL
Finally, the values of R2 and R3 allow us to extract R1 from Equation 6, so that:
2R2
R1 = ----------------------------------------------------------R2
2

2 1 – -------- GL – 1 – R
-------
R3
R3
e
t
le
with GL the required gain.
o
s
b
O
-
o
r
P
Table 7. Components calculation for impedance matching implementation
GL (gain for the loaded
system)
R1
o
r
P
e
R2 (=R4)
R3 (=R5)
t
e
l
o
Rs
bs
O
Load viewed by each
driver
34/36
)
s
(
ct
GL is fixed for the application requirements
GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3)
du
2R2/[2(1-R2/R3)GL-1-R2/R3]
Arbitrarily fixed
R2/(1-Rs/0.5RL)
0.5RL(k-1)
kRL/2
c
u
d
)
s
t(
Equation 12
Package Mechanical Data
TS615
12 Package Mechanical Data
TSSOP14 EXPOSED PAD MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.047
0.15
A2
0.8
1
1.05
0.031
0.004
0.006
0.039
0.041
b
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
5.1
0.193
D
4.9
D1
1.7
5
0.197
0.201
0.067
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.5
0.169
0.173
0.177
E2
1.5
e
0.059
0.65
K
0°
L
0.45
0.60
8°
0°
0.75
0.018
o
r
P
0.024
e
t
le
)
s
(
ct
c
u
d
0.0256
)
s
t(
8°
0.030
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
bs
7256412B
O
35/36
Revision History
TS615
13 Revision History
Date
Revision
01 Nov 2002
1
Description of Changes
First Release
General grammatical and formatting changes to entire document.
Specific changes:
•
03 Dec 2004
•
•
2
•
•
Moved note in Table 3 to Chapter 10: Choosing the Feedback Circuit
on page 30.
Added Chapter 4: Safe Operating Area on page 16.
Simplified mathematical representations of the intermodulation
product in Chapter 5: Intermodulation Distortion Product on page 17.
In Chapter 6: Printed Circuit Board Layout Considerations on
page 20, change from “The copper area can be connected to (-Vcc)
available on pin 4.” to “The copper area must be connected to -Vcc
available on pin 4.”.
In Section 10.1: The bias of an inverting amplifier on page 30, change
of section title, and correction of referred figure to Figure 71.
c
u
d
e
t
le
)
s
(
ct
)
s
t(
o
r
P
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
s
b
O
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners
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36/36