Cut-off Frequency Enhanced Hybrid Electromagnetic Bandgap (EBG)
Structures with Wideband Noise Suppression Characteristics
Ki Hyuk Kim, Pavle Milosevic, and José E. Schutt-Ainé
Department of Electrical and Computer Engineering, University of Illinois,
Urbana, IL 61801 USA
E-mail: {khkim, pavle, jschutt}@emlab.uiuc.edu
Abstract: A cut-off frequency characteristic enhanced hybrid EBG structure is proposed. In the
proposed EBG structure, inductive bridges between neighboring metal patches are designed
using lumped chip inductors instead of conventional microstrip lines. From 75 MHz to 4830
MHz a stopband bandwidth of 4.755 GHz is achieved at a -30 dB noise suppression level.
Introduction
Due to continuous increase of CMOS device cut-off frequencies (fTs) single
chip integrations of high speed mixed-signal systems are widely researched. One
of the design and testing issues of such high speed mixed-signal designs is the
simultaneous switching noise (SSN) coupling through solid power/ground plane
pairs. The increased operating speed of digital blocks results in large SSN, which
degrades not only the noise margins of digital circuits, but also the performance of
analog circuits. At PCB/package level, the generated SSN can propagate through
parallel plate waveguides which are formed by the solid power/ground plane pairs.
In order to suppress the noise coupling at the PCB/package level, Wu et al.
used a uniplanar EBG structure in the design of the power/ground plane pairs [1].
The uniplanar EBG structure consists of a 2-dimensional array of metal patches
and microstrip line bridges between the neighboring patches. Wu’s EBG structure
showed a wideband noise suppression characteristic with a 3 GHz stopband
bandwidth, however, due to low inductance of the bridges the stopband cut-off
frequency of the EBG structure was around 1 GHz. In order to reduce the cut-off
frequency, several high inductance microstrip line bridges are proposed [2], [3].
However, the lowest cut-off frequency of the previously reported EBG structures
is around 300 MHz, which is still higher than the clock frequencies of current
mixed-signal systems.
In this work, an EBG structure with VHF-band cut-off frequency is proposed
by replacing the microstrip line bridges with lumped chip inductors. A onedimensional analysis model is developed to provide the mathematical foundation
for the use of lumped chip inductors in the EBG structure design.
One-Dimensional Analysis of Planar EBG Structure
Fig. 1 shows a one-dimensional equivalent circuit of the planar EBG
structure, where a and g are the center-to-center distance and the gap size between
1-4244-0878-4/07/$20.00 ©2007 IEEE
2913
(i-1)th Cell
(i+1)th Cell
ith Cell
Cgap
b
LP/2
LP/2
CP/2
CP/2
LL
Cparasitics
b
LP/2
CP/2
g
d
a
ith Patch
Bridge
εr
(i+1)th Patch
Fig. 1. One-dimensional Equivalent Circuits of the EBG structure
two neighboring patches, respectively, b is the width of the rectangular patches,
and d is the height of the dielectric substrate. LP and CP are the inductance and the
capacitance of each square metal patch, respectively, LL is the inductance of the
bridge, and CT is the series parasitic capacitance between two patches including
the gap capacitance (Cgap) and the parasitic capacitance of the bridge (Cparasitics).
LP, CP, and Cgap can be calculated using published quasi-static models [4].
Cparasitics varies depending on the physical implementation of the bridges, and
typical values of Cparasitics for lumped chip inductors are less than 0.24 pF [5]. Cgap
is larger than Cparasitics under the condition that b⋅(1+εr) is larger than
Cparasitics⋅(118.6e+12) mm for the EBG structures with g=0.1⋅a. For the 0.24 pF
series parasitic capacitance, the calculated value of Cparasitics⋅(118.6e+12) is 28.5
mm, which is only 22.6 % of the calculated values of b⋅(1+εr) using parameters of
the previous EBG structures [1–3]. The capacitances ratio Cgap/CP is very small
for typical PCB/package structures, since the values of b are much larger than
those of d. The typical value of d is in the range of 0.4 – 1.6 mm, and the width of
the patches is around 30 mm [1–3].
By applying the image parameter method [4] and the above two capacitance
ratios, the lower (flower) and upper (fupper) cut-off frequencies of Fig. 1 can be
derived as
[
f lower = π C P (LP + LL )
[
]
−1
f upper = 2π CT C P LP (4CT + C P )
(1)
]
−1
.
(2)
flower and fupper are not related to CT and LL, respectively. That is, although
lumped chip inductors have low self resonant frequencies (SRFs) due to their
series parasitic capacitances, the cut-off frequency of the EBG structure can be
lowered by using the high inductance chip inductors as the bridges. And the
replacements cause no degradation of the other high frequency characteristics.
2914
Design and Experimental Verification of Proposed Hybrid EBG Structure
Fig. 2 (a) shows the fabricated hybrid EBG structure. In order to directly
compare the noise suppression performances, physical dimensions and port
locations of the proposed EBG structure are the same with those of reference [2],
and captioned in the figure. The thickness and the dielectric constant of the
substrate are 0.4 mm and 4.4, respectively, and Coilcraft, Inc., 0603LS-561X 560
nH chip inductors are used as the bridges instead of the microstrip lines.
(a)
(b)
y [mm]
x [mm]
(c)
Var
Eqn
12×12 array of T-models
L
L1
L=lp_2
R=
(74, 74)
Inductor
bridge
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X1
X2
X5
X8
X9
X12
X13
X16
X17
X20
X21
X24
Port 2
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X3
X4
X6
X7
X10
X11
X14
X15
X18
X19
X22
X23
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X28
X25
X29
X32
X33
X36
X37
X40
X41
X44
X45
X48
(46, 45) (74, 45)
Port 1 Port 3
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X27
X26
X30
X31
X34
X35
X38
X39
X42
X43
X46
X47
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X76
X73
X77
X80
X81
X84
X85
X88
X89
X92
X93
X96
VAR
VAR1
cp=.55339e-12
lp_2=.25133e-9
rp_2=8.6207e-4
L
L2
L=lp_2
R=
Port
P1
Num=1
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X75
X74
X78
X79
X82
X83
X86
X87
X90
X91
X94
X95
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X51
X50
X54
X55
X58
X1323
X62
X63
X66
X67
X70
X71
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X123
X122
X126
X127
X130
X131
X134
X135
X138
X139
X142
X143
Port
P3
Num=3
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X100
X97
X101
X104
X105
X108
X109
X112
X113
X116
X117
X120
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X99
X98
X102
X103
X106
X107
X110
X111
X114
X115
X118
X119
C
C87
C=cgap
C
C88
C=cgap
R
R3
R=rp_2
Port
P2
Num=2
C
C89
C=cgap
T-model
(e) 1st order LC model
(d) 12-section distributed capacitance models
C
C86
C=cgap
L
L3
L=lp_2
R=
Y1P_Eqn
Y1P1
Y[1,1]=freq*cp*tan(0.02)
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X124
X121
X125
X128
X129
X132
X133
X136
X137
X140
X141
X144
b=28.7mm
C
C85
C=cgap
L
L4
L=lp_2
R=
C
C1
C=cp
R
R2
R=rp_2
Tmodel_1cellTmodel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTmodel_1cellTm odel_1cellTm odel_1cellTmodel_1cellTmodel_1cellTmodel_1cell
X52
X49
X53
X56
X57
X60
X61
X64
X65
X68
X69
X72
g=1.3mm a=30mm
R
R1
R=rp_2
Port
P4
Num=4
R
R4
R=rp_2
C
inductor_symb_560nH
C
C
C90
X1312
C91
C92
C=cgap
C=cgap
C=cgap
C
C93
C=cgap
C
C94
C=cgap
C
C95
C=cgap
C
C96
C=cgap
Port
P1
Num=1
C
C1
C=0.16 pF
Port
P2
Num=2
L
L1
L=560 nH
Fig. 2. Schematic of Proposed EBG PDN and corresponding ADS simulation models
Fig. 2 (b) to (e) show the ADS simulation models for the patches, the gaps,
and the lumped chip inductors, respectively. The 2-dimensional array of
distributed RLCG element method [6] is used to model the patches. 12-section
distributed C models and 1st-order parallel LC models are used to model the gap
capacitances and the lumped chip inductors, respectively. Parasitic series
capacitances of the chip inductors are calculated from the self resonant
frequencies (SFRs) of the lumped chip inductors in datasheets [5].
Fig. 3 shows simulated and measured insertion loss responses of the
proposed and the reference EBG structures [2]. An Agilent E8358A PNA Series
Network Analyzer is used to measure the S-parameters, and for brevity of figure
only |S21| responses are plotted. The open circles represent the measured |S21|
response of a structure without the EBG structure, while open and solid rectangles
represent simulated and measured |S21| responses of the proposed EBG structure,
respectively. The reference EBG structure [2] is simulated using Ansoft HFSS,
and the solid circles represent simulated |S21| responses. The calculated,
simulated and measured cut-off frequencies of the proposed structure are 47.5,
49.2 and 47.2 MHz, respectively. The measured stopband bandwidth of the
proposed EBG structure at the -30 dB noise suppression level is 4755 MHz (75 –
4830 MHz), while the simulated stopband bandwidth of the reference EBG
structure is only 4325 MHz (555 – 4875 MHz).
2915
Conclusions
In this work, a hybrid EBG structure with a cut-off frequency of 47.2 MHz
and a noise suppression bandwidth of 4.755 GHz is proposed by using lumped
chip inductors instead of microstrip lines. The stopband bandwidth is enhanced by
more than 430 MHz and the enhancement can be further increased by using
higher values of chip inductors. The 1-dimensional analysis model and the ADS
circuit level simulation models are also developed for the proposed EBG structure.
The simulated and measured |S21| responses of the proposed EBG structure are in
substantial agreement with each other.
Measurement:
Solid Plane
HFSS Simulation: ref. [2] EBG
ADS Simulation: Proposed EBG
Measurement: Proposed EBG
Insertion Loss [dB]
0
-20
Stopband bandwidth
(-30 dB suppression)
-40
Enhanced
Suppression BW
-60
-80
0
1
2
3
4
5
Frequency [GHz]
Fig. 3. |S21| Insertion Loss Characteristics of the Proposed EBG Structure
References:
[1] T.-L. Wu, et al., “A novel Power Planes with Low Radiation and Broadband Suppression of
Ground Bounce Noise using Photonic Bandgap Structures,” IEEE Microw. Wireless Comp.
Lett, vol. 14, no. 7, July 2004.
[2] T.-L.Wu, et al., “A novel power plane with super-wideband elimination of ground bounce
noise on high speed circuits,” IEEE Microw. Wireless Comp. Lett., vol. 15, no. 3, pp. 174–176,
Mar. 2005.
[3] X.-H. Wang, et al., “A Novel Uniplanar Compact Photonic Bandgap Power Plane with UltraBroadband Suppression of Ground Bounce Noise,” IEEE Microw. Wireless Comp. Lett., vol.
16, no. 5, May 2006.
[4] Jinwoo Choi, “Noise Suppression and Isolation in Mixed-Signal Systems using Alternating
Impedance Electromagnetic Bandgap (AI-EBG) Structure,” Ph. D. dissertation, School of
Electrical and Computer Engineering, Georgia Institute of Technology, Dec. 2005.
[5] Coil Craft, Inc., Datasheets, [Online] Available: http://www.coilcraft.com, 2007.
[6] Larry D. Smith et al., “Power Plane SPICE Models and Simulated Performance for Materials
and Geometries,” IEEE Trans. Adv., Packag., vol. 24, pp. 277-287, Aug. 2001.
2916