The square root of the sum of the squares
Revisit a great idea, 40 years later.
By Mario Pazzini, Microsigma Srl, Italy
If you have to generate an analog voltage proportional to the module of a vector
whose components are also available in analog form, you can adopt a classic solution
involving the use of analog multipliers, according to the block diagram in Figure 1.
In other words, you would normally square input X, square input Y, add the two
squares, and then extract the square root of the sum of the squares. But examine the
drawbacks of this approach in terms of signal dynamic range. Suppose your X signal is
always positive and can take a minimum value XMIN and a maximum value XMAX. For example, consider XMAX/XMIN⫽100—that is, a modest 40-dB dynamic range; obviously the X2
squarer output should allow an 80-dB dynamic range (X2MAX/X2MIN⫽10,000). In general, no
analog multiplier will give you this kind of dynamic-range performance. The same situation
applies for the Y input. Therefore, squarers will severely limit the input to the square rooter
in dynamic range. The square rooter will encounter similar, and probably worse, problems.
It will probably be quite difficult for your classic analog module extractor to achieve a 40-dB
overall dynamic range.
The approach this article presents has the great advantage of avoiding entering into
the realm of the squares and therefore avoiding the need to come back from that troublesome realm with a square root extractor, which represents an even more difficult trip. For
this solution, I am fully indebted to TE Stern and RM Lerner, who presented an article titled
“A Circuit for the Square Root of the Sum of the Squares” in the IEEE Proceedings of April
1963 (Vol.51, n°4), more than 40 years ago (Reference 1)! (You can still purchase a copy
of this article from the IEEE.)
At the time of the paper’s publication, operational amplifiers were bulky, expensive,
and inaccurate—very far from the wonderful jewels that modern linear IC technology
offers. Stern and Lerner based their solution on just resistors, diodes, and transformers,
and its dynamic range extended from “a few tenths of a volt…up to signal voltages
comparable with the PIV rating of the diodes.” In those years, of course, the “ideal rectifier”
or the precision min/max circuit, based on the combination of precision op-amps and
diodes, was simply not yet available. Thus, it is very useful to revisit their idea by applying
modern technology and circuit techniques.
The original idea
Stern and Lerner based their idea on the fact that the equation:
Z2⫽ X2⫹Y2
(1)
represents a right circular cone in three-dimensional space with X, Y, and Z axes. The axis
of the cone coincides with the Z-axis, and its apex half-angle is 45°.
Now, inscribe a regular pyramid inside this cone, as shown in Figure 2. You can easily
see that, for any pair of X and Y values, the value of Z determined from the pyramid will
always be higher than the value of Z determined from the cone. The only exceptions are
the points where the pyramid touches the cone: Here, the value of Z is the same for the
two solids. Figure 3 shows the general situation.
Because both the pyramid and the cone lie near (or at) a 45° angle from the Z-axis,
the horizontal and vertical separations of these two surfaces are practically equal. Thus,
you obtain a good estimate of the vertical error in Z by considering the separation of the
cross sections of the two solids obtained by means of a plane parallel to the X,Y plane and
located at a chosen height Z (Figure 4).
The cross section of the cone is a circle: Z⫽( X2⫹Y2)1/2, and the cross section of the
pyramid is an inscribed polygon.
If the pyramid has n sides or panels in the first quadrant (X⬎0, Y⬎0), resulting in a total of 4n sides, then the maximum relative error is given by:
(⌬Z/Z)MAX⫽1 – cos (π/4n)⬇␲2/32n2.
(2)
Each of the panels of the pyramid can be represented by a plane (through the origin)
and hence by a linear equation:
Z1⫽h11 X⫹h21Y;
Z2⫽h12 X⫹h22Y;
Z3⫽h13 X⫹h23Y;
…and so on.
(3)
You can obtain each of the “panel voltages”—Z1, Z2, Z3, etc—by means of simple resistor networks, bridged between the X and Y voltages, with the help of an op-amp for
each panel. But how do you select the correct panel voltage to represent the portion of the
panel that lies inside the pyramid? The answer is beautifully simple: Because the pyramid
is concave upward, the particular value of Z1, Z2, Z3, etc in Equation 3 that actually lies in
the pyramid is simply the largest of Z1, Z2, Z3, etc.
Now devote your attention to the h1j and h2j coefficients, which determine the panel
voltages. First of all, you have to deal with only the panels in the first quadrant, provided
you generate the absolute values of X and Y. Otherwise, you end up having to deal with
not less than eight panels. Both approaches are feasible, depending on the value of n.
To find the panel equations, you can consider the plane Z⫽X and rotate it by the panel
angle (␪⫽␲/4n) to bring it to the position of the first panel; doing so will give you a panel
that is externally tangent to the cone. Thus the pyramid would not be inscribed into the
cone but circumscribed to it (this observation is absent from Stern and Lerner’s paper).
This approach involves a fixed gain error, decreasing with increasing n—an error that you
can easily compensate for with a simple gain adjustment, if necessary. So, forgetting the
gain error, you have in general:
h1j⫽cos (j␲/2n⫺␲/4n), and
(4)
h2j⫽sin (j␲/2n⫺␲4n).
For example, for n⫽2, you get:
Z1⫽0.92388 X⫹0.38268 Y, and
(5)
Z2⫽0.38268 X⫹0.92388 X.
You can apply the above-mentioned simple gain correction (multiply by
1/0.92388⫽1.0824 ) and obtain:
Z1⫽X⫹0.4142 Y, and
(6)
Z2⫽0.4142 X⫹Y.
Note: The exact solution in this simple case would be:
Z1⫽X⫹(√2⫺1)Y and Z2⫽(√2⫺1)X⫹Y,
which you can derive from simple geometrical considerations. However, for high values of
n, the rotation formulas (Equation 4) provide a much faster answer.
You can easily verify Equation 6:
• For X⫽K and Y⫽0, selecting the highest value between Z1 and Z2, you get
Z⫽K.
• For X⫽0 and Y⫽K, selecting the highest value between Z1 and Z2, you get
Z⫽K.
• For X⫽0.7071K and Y⫽0.7071K, you get Z⫽Z1=Z2=0.9998K.
Note that the above values are the three points of contact between the cone and the
pyramid in the first quadrant.
For the two points corresponding to the maximum error—that is, the intersection of the
circle in Figure 4 with the radii at 22.5° and at 67.5°—you obtain:
Z1⫽Z2⫽1.082 K,
That is, ⌬Z/Z⬇0.082. (You obtain 0.077 from Equation 2 for n⫽2.)
An alternative approach to find the panel equations is to write the equations of the
planes through the origin and through the corresponding two points of intersection between the cone and the panel for a given value of Z—for example, for Z⫽1.
Figure 5 shows this approach for n⫽3 (corresponding to ⌬Z/Z⬇0.034—that is, ⫾1.7%
accuracy).
The plane through the origin and the points A and B is given by:
Z⫽h11 X⫹h21 Y,
with Z⫽1 for X⫽1 and Y⫽0 (point A), and Z⫽1 for X⫽√3/2 and Y⫽½ (point B).
Therefore, you easily obtain for panel O A B :
Z1⫽( 2⫺√3) X⫹Y.
(7)
In a similar way, you obtain panels O B C and O C D:
Z2⫽(√ 3⫺1) X ⫹(√ 3⫺1) Y.
(8)
Z3⫽X⫹(2⫺√3) Y.
(9)
At this point, you should possess all the necessary tools to be able to work with higher
values of n.
Applying modern technology
Now consider a practical example of the module extractor for n⫽3. You can obtain the
synthesis of each of the panel voltages by means of an op-amp plus four resistors. In general:
Zj⫽h1j X⫹h2jY.
If you place a resistive divider between X and Y:
R1
X
Vo
R2
Y
you obtain:
Vo⫽R2/(R1⫹R2)X⫹R1/(R1⫹R2)Y
(10)
Note that the two coefficients for X and Y add to 1, but this situation is not true for
h1j⫹h2j. Thus, you need to insert a gain factor. A suitable factor is h1j⫹h2j; that is:
Zj⫽Zj’ (h1j⫹h2j)
(11)
Zj’⫽Vo⫽X h1j /( h1j⫹h2j)⫹⌼ h2j/(h1j⫹h2j)
(12),
with
where now the two coefficients for X and Y add to 1. Hence, the circuit diagram for the generic panel voltage generator is the one in Figure 6.
Referring to Figure 6, the resistor design equations are:
with, for example, K⫽10,000⍀.
R1⫽K h1j, and
R2⫽K h2j
(R3⫹R4)/R4⫽h1j⫹h2j⫽R1/K⫹R2/K.
If R4⫽10,000⍀ and K⫽10,000⍀, you obtain R3⫹R4⫽R1⫹R2 and, hence,
R3⫽R1⫹R2⫺10,000⍀.
You can obtain the selection of the largest Zj by means of a simple “maximum circuit”
employing op-amps and diodes (Figure 8).
You can apply a similar circuit architecture to obtain the absolute value of X or Y: If
you have voltage X and you generate voltage ⫺X by unity gain inversion, then you can obtain the absolute value of X by selecting the maximum between X and ⫺X.
Figure 7 shows a possible version of the precision rectifier, and Figure 8 shows a
precision maximum value selector for n⫽3. Figure 9 shows the complete block diagram of
the vector module generator for n⫽3.
As a real application example, Figure 10 shows a module generator (n⫽2) for a twoaxis accelerometer (Analog Devices ADXL 203). This single-supply application reveals a
few tricks you can adopt when dealing with single-supply circuitry. Note the omission of the
supply bypass capacitors for simplicity and that in this case the accelerometer is ac coupled, because only the ac components of acceleration were needed in a particular application.
Performance
Performance will, of course, depend on the speed and precision of the adopted opamps. For bandwidths up to a few kilohertz, you can obtain dynamic ranges up to 80 dB
for dual-supply (⫾15V) applications and input signals up to ⫾10V. For single-supply applications, such as the one shown in Figure 10, you can easily achieve a 60-db dynamic
range, again with bandwidths up to a few kilohertz, by adopting precision rail-to-rail opamps, such as the Analog Devices’ AD8605/6/8 (single/dual/quad).
As for headroom, the limit is given by the maximum allowed Z value. If, for example,
the maximum value of Z is 10V, then X and Y should never exceed ⫾7.14V (remember
that Z⫽(X2⫹Y2)1/2 !).
References
1. Stern, TE and RM Lerner, “A Circuit for the Square Root of the Sum of the
Squares,” Proceedings of the IEEE of April 1963, vol.51, no. 4, pg 593 to 596.
2. Jones, D and M Stitt, “Precision Absolute Value Circuits”, SBOA068 by Texas Instruments.
3. Wong, James, “High Speed Precision Rectifier”, AB109 by Analog Devices.
4. Pisani, Marco, “Circuit yields accurate absolute values,” EDN, July 5, 2001,
http://edn.com/article/CA90756.html?spacedesc=designideas.
5. Mancini, Ron, “Absolute value circuit delivers high bandwidth,” EDN, May 15, 2003,
http://edn.com/article/CA296498.html.
X
X2
squarer
+
X2 + Y2
square
rooter
Y
+
squarer
Y2
Figure 1—The classic solution involves the use of analog multipliers.
Z
Y
X
Figure 2—The value of Z determined from the pyramid will always be higher than or
equal to the value of Z determined from the cone.
Z
pyramid
∆Z
cone
∆Z
(X1 , Y1)
X, Y plane
Figure 3—Where the pyramid touches the cone, the value of Z is the same for the two
solids.
Y
θ = π / 4n
X
Figure 4—You obtain a good estimate of the vertical error in Z by considering the
separation of the cross sections of the two solids obtained by means of a plane parallel to
the X,Y plane and located at a chosen height Z.
Y
D ( 0, 1 )
C ( ½ , 31/2 )
B ( 31/2, ½ )
A ( 1, 0 )
O
X
Figure 5— An alternative approach to find the panel equations is to write the
equations of the planes through the origin and through the corresponding two points of
intersection between the cone and the panel for a given value of Z—in this case, n⫽3.
R3
X
R1
Y
R2
_
Zj
+
R4
Figure 6—A circuit diagram for the generic panel voltage generator.
_
X
+
10 kΩ, 0.1%
10 kΩ, 0.1%
X
_
+
4.7 kΩ
Figure 7—This absolute-value circuit is based on a precision maximum selector.
_
Z1
+
_
Z2
Z = highest
of Z1, Z2, Z3
+
_
Z3
+
4.7 kΩ
Figure 8—For this precision maximum input selector, n⫽3.
Panel 1
generator
X
X
Panel 2
generator
Y
Y
Panel 3
generator
Figure 9—For this module extractor, n⫽3.
maximum
input
selector
Z
R10
4K12 1%
2
-
3
+
R1
VCC
U3A
1
D1
AD8608
RGF1A
220K 1%
+
2 -
AD8608
10K 1%
5
3
AD8608
R4
10K 1%
R8
10K 1%
2.5V
6
5
+
1uF/16V
C6
0.1uF/50V
2
R5
-
R7
1M 1%
+
2.2uF/16V
C5
R6
-
X
C4
10uF/16V
U2A
1
2.5V
D2
R9
AD8608
RGF1A
10K 1%
R15
R16
10K 1%
10K 1%
2.5V
6
ADXL203E
9
10
R13
AD8608
10K 1%
R19
1M 1%
12
R20
10K 1%
AD8608
10K 1%
13
12
2.5V
2.5V
+
R18
RGF1A
R22
4K12 1%
R17
-
U2C
8
AD8608
R14
10K 1%
U2D
14
R11
10K 1%
U3D
14
D5
AD8608
RGF1A
9
R21
10
4K12 1%
2.5V
R24
10K 1%
R28
3K3 1%
VCC
+
C12
1uF/16V
9 -
+
10 +
2.2uF/16V
-
Y
13
D4
-
220K 1%
C11
U3C
8
U4C
8
13
12
+
8
RGF1A
VCC
-
Vs
AD8608
AD8608
R27
3K3 1%
+
COM
D3
7
-
3
Y out
U4B
7
U4D
14
D6
AD8608
RGF1A
AD8608
R23
3K3 1%
2.5V
VCC = 5V
R25
3
10K 1%
+ C16
10uF/16V
R26
10K 1%
2
+
-
U5A
1
2.5V
AD8606
C17
0.1uF/50V
Figure 10—In this single-supply example, n⫽2.
6
5
+
ST
5
R12
10K 1%
U3B
7
U1
Xout
6
-
1
n.c.
n.c.
n.c.
U4A
1
4K12 1%
2.5V
2
4
5
+
3 +
U2B
7
-
6
+
C3
-
R3
100R 1%
R2
10K 1%
U5B
7
AD8606
Z