Journal of Microwaves and Optoelectronics, Vol. 3, N.o 3, December 2003.
49
Influence of a Lossy Silicon Substrate on
Conductance and Capacitance of Coupled
Interconnects
H. Ymeri1, B. Nauwelaers1, Karen Maex1,2, D. De Roest2
1
Katholieke Universiteit Leuven, Department of Electrical Engineering (ESAT), Div. ESATTELEMIC, Kasteelpark Arenberg 10, B-3001 Leuven-Heverlee, Belgium
2
The Interuniversity Microelectronics Center (IMEC), Kapeldreef 75, B-3001 Leuven,
Belgium
Tel. +32(16)32.18.76 Fax. +32(16)32.19.86 E-mail:Hasan.Ymeri@esat.kuleuven.ac.be
Abstract
Accurate CAD-oriented analytic formulas for the frequencydependent capacitance and conductance of interconnect lines on lossy
silicon substrate are presented. Frequency-dependent shunt admittance per
unit length parameters are expressed in closed form in terms of the shunt
capacitances calculated for interconnect lines on silicon oxide substrate with
silicon as perfectly conducting ground [7] and so-called internal silicon
admittance. The proposed closed-form solutions are shown to be in good
agreement with the full-wave solutions and circuit modeling approach.
Key words: VLSI interconnects, Lossy silicon, Analytic, Frequencydependent shunt admittance parameters
1. Introduction
In modern analogue and digital IC’s, interconnections are the main source of the
overall delay. Moreover, the proximity of the interconnects can induce serious crosstalk
issues. To optimize electrical performance of the VLSI integrated circuits, the extraction of
the frequency-dependent capacitance and conductance of multilayer and multiconductor
interconnects in very high speed integrated circuits must be investigated. Although a lot of
papers have been discussed problems of the parameter extraction in the VLSI circuit
interconnects, favorable methods, from the application point of view, should be fast enough
to allow designers to optimize circuit performance within a short time period.
Nowdays many efforts are being devoted to develop numerical, approximate
analytical or in some simple topologies exact solutions to deal with the analysis of the threedimensional interconnect configurations. There are a couple of procedures which can solve
this problem numerically, for instance, finite difference or finite element approaches [1]. To
this purpose, techniques based on the use of Green’s functions were proposed in [2-6]. On the
other hand, all numerical or semi numerical techniques are computationally expensive, so that
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Journal of Microwaves and Optoelectronics, Vol. 3, N.o 3, December 2003.
50
run times risk to become prohibitive for VLSI layouts, even in the two-dimensional case. The
same is true for the exact analytical solution, which is very difficult to derive and results in an
extremely complicated modeling of even simple interconnect configurations.
In this work, a new approximate frequency-dependent analytical formulas for
capacitance and conductance per unit length for VLSI interconnects were presented and
verified. To illustrate the accuracy of the model, the frequency-dependent capacitance and
conductance of a symmetric coupled interconnect lines on a silicon substrate were computed
using proposed closed-form expressions, and compared with the solution by the quasi-static
spectral domain approach. It is to noted that to gain the speed of using analytic model, one
gives up some generality –that is, solutions to engineering problems always require some
compromise.
2. Analysis
To develop the frequency-dependent capacitance and conductance per unit length
formulas of a coupled interconnect lines on an SiO2-Si substrate, the frequency-dependent
behaviour of the shunt admittance per unit length of on-chip interconnects on lossy silicon
substrate (see Fig. 1) can be represented as [9]
Y=
jω [C ]Ysi
jω [C ] + Ysi
(1)
where [C] is the per unit length shunt capacitance matrix calculated for on-chip interconnect
lines on silicon oxide (SiO2) as dielectric medium and silicon as perfectly ground plane, and
Ysi is the so-called internal silicon admittance per unit length. The per unit length capacitance
matrix [C] can be determined using readily available closed-form expressions (e.g. [7]).
w1
s
w2
T1
T2
SiO2
silicon
εox
h
n+ or p+
Fig. 1. Typical on-chip interconnects used in silicon-based RF and mixed-signal integrated circuits.
For general configuration in Fig. 1, the self and mutual capacitances are
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c11 = c g 1 + c m
(2a)
c 22 = c g 2 + c m
(2b)
c12 = c 21 = c m .
(2c)
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Journal of Microwaves and Optoelectronics, Vol. 3, N.o 3, December 2003.
51
For the structure shown in Fig. 1, where the rectangular to circular conversion can be
applied [7, 8], the coefficients cg1, cg2, cm can be determined using quasi-static field analysis
and method of images.
The final closed-form expressions for the ground and mutual capacitances are given by
[7]
c g1 =
cg2 =
 2h − r
2
2 eq
2πε log 
 r
 2 eq
 2h − r
 2 2 eq
log
 r
 2eq
  2h − r
  1 1eq
 log  r
  1eq
d
d
d
d
 2 h 2 − r2eq
 r
 2 eq
log
d
d
where A = log(((2 h2
− r2 eq ) / r2 eq ) ( d
h1 = H eq + heq + 2 r2 eq + r1eq
and
2
g1
2
2
+ ( h 2 + h1 − r2 eq )
2
+ (h − h − r
)
1
2
1eq
2
2
+ ( h 2 + h1 − r
)
1eq
2
2
2
d
d


 + log





d
+ ( h1 − h 2 − r1eq )
2
2
+ ( h 2 + h1 − r1eq )
2
+ ( h1 − h 2 − r1eq )
+ ( h 2 + h1 − r1eq )
2


 + log







d
2
2
log
cm = c
+ ( h 2 − h1 − r2 eq )
2
 2 h1 − r1eq
2πε log 
 r1eq
  2 h1 − r1eq
 log 
  r
  1eq
2
2
+ ( h 2 + h1 − r
)
1eq
2
2
+ (h − h2 − r
)
1
1eq
2
2
+ ( h 2 + h1 − r1eq )
2
2
+ ( h1 − h 2 − r1eq )
2


A


( 3a )

A


( 3b )



d
d
d 2 + (h1 + h2 − r1eq ) 2
d 2 + (h1 − h2 − r1eq ) 2
 2 h2 − r2eq
log 
 r2eq
d
d
(3c)


2
+ h1 − r1eq ) 

2
+ ( h1 − h 2 − r1eq )
2
+ ( h2
2
2
2
2
+ ( h 2 − h1 − r2 eq ) ) /( d + ( h1 + h 2 − r2 eq ) )), h 2 = H eq + r2eq
d = s eq + r1eq + r2 eq
.
For the case of VLSI interconnects on an Si-SiO2 substrate (Fig. 1) with a dielectric
overlay (free space), it is convenient to assume that no dielectric interface exists and the total
propagation medium is the homogeneous dielectric with relative effective permittivity
ε = ε eff (ε ox , h) = (ε ox + 1) / 2 + [(ε ox −1)(1 + 12h / w) −1 / 2 ] / 2 [7].
Internal silicon admittance per unit length is given by [10]
Ysi =
γ si
Z si
(4)
where γsi is the propagation constant in the lossy silicon substrate defined as
γ si =
jωµ 0 (σ si + jωε 0 ε rsi ) .
(5)
The internal silicon impedance per unit length Zsi can be determined using the closed-form
expression [8, 11] as
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ISSN 1516-7399
Journal of Microwaves and Optoelectronics, Vol. 3, N.o 3, December 2003.
Z siii =
Z siij
jωµ 0  1 + γ si h 
 ,
ln
γ
2π
h
 si 
2

 s 
2
 (1 + γ si h ) +  γ si  
jωµ 0 
 2 
=
ln 
2 
4π
 (γ h )2 +  γ s  
 si  
si

 2 
52
(6)
(7)
where h is the silicon oxide thickness and s is the distance between the strip conductors.
With available closed-form expressions for capacitance matrix [C] and internal silicon
shunt admittance per unit length, the total shunt admittance components are given in closedform by [10]
G (ω ) = Re{Y (ω )},
C (ω ) =
Im{Y (ω )}
.
ω
(8)
3. Numerical results
To illustrate and validate the proposed modeling methodology, the frequencydependent capacitance and conductance per unit length of two coplanar coupled interconnect
lines on silicon have been computed using our approach, and compared with solution
obtained by electromagnetic simulation. Electrical and geometrical parameters of the on-chip
interconnects are: w = 2.0 µm, wg = 20 µm, s = 2.0 µm, sg = 100 µm, tox = 0.50 µm, tsi = 500
µm, εox = 3.9ε0, εsi = 11.8ε0, and σsi = 100 S/m.
For comparison, the same symmetric coupled coplanar interconnect problem is also
rigorously solved by using spectral domain approach [6] with Chebyshev polynomial basis
functions weighted by appropriate edge factors. The conductance and capacitance per unit
length of the coupled interconnects on silicon are calculated by using the proposed closedform expressions as a function of frequency (f = 0 - 20 GHz), and compared with those of the
spectral domain procedure (electromagnetic solver). We can see that the calculated results by
our methodology are in very good agreement with the electromagnetic solutions for whole
frequency range. Figures 2(a) and (b) further demonstrate that the frequency response of our
analytic model [G(ω) and C(ω)] agrees well with that computed by the spectral domain
procedure [6].
4. Conclusion
This paper derives accurate and low time consuming closed form expressions for
shunt admittance per unit length components of typical on-chip interconnects for CAD usage.
Originally derived for deep micron and submicron VLSI technologies, these expressions
apply in many practical cases with MCM and IC circuits, provided that no important skin
effect occurs in the line conductors and silicon substrate.
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Journal of Microwaves and Optoelectronics, Vol. 3, N.o 3, December 2003.
53
Fig. 2. Self and mutual shunt admittance per uniut length components as function of frequency: (a)
conductance per unit length and (b) capacitance per unit length.
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