2014 Edition © by D. G. Meyer Microcontroller-Based Digital System Design Module 4 Embedded System Design Issues 1 Learning Outcomes A student who successfully fulfills the course requirements will have demonstrated: 1. an ability to program a microcontroller to perform various tasks 2. an ability to interface a microcontroller to various devices 3. an ability to effectively utilize microcontroller peripherals 4. an ability to design and implement a microcontroller-based embedded system 2 Mini-Project Embedded system design based on Freescale 9S12C32 Microcontroller Kit Basic requirement is to design a stand-alone (“turn-key”) product that makes good use of the processor’s computational / interfacing resources Should make meaningful / effective use of at least four of the microcontroller’s on-chip peripherals (ATD, SCI, SPI, TIM, PWM) Done in teams of 2-4 students (self-selected) 3 Learning Objectives form a project team consisting of 2-4 students choose a project idea and write a proposal design the hardware and software necessary to realize the project idea package the finished system demonstrate the project’s functionality to the course staff write a formal report documenting the embedded system design process 4 5 6 ECE 362 Embedded Microcontroller Mini-Project Fall 2013 Lucky 13 / Aqualizer Filter Design Polycarbonate Case Design Transfer Functions of Filters 1 0.9 0.8 |H(jω)| 0.7 0.6 0.5 Treble Bass 0.4 Mid 0.3 0.2 0.1 0 0 10 10 1 10 20Hz 2 10 250Hz 3 2,000Hz 10 4 20,000Hz 10 Aqualizer is in action. 5 Band-Pass Low-Pass Frequency (Hz) Software Design High-Pass Filter Type Electronics Schematic TIM interrupt (every 1 ms) Low-Pass Vin RTI interrupt (every 2.048 ms) Processor Boot Up Vout 6.2k Increment tens 0.1u counter 0 No Is tenths Was UV pushbutton pressed? flag set? Band-Pass Vin Vout 20mH 2.2u 270 Does tens counter == 10? 0 Yes High-Pass Vin Is UV flag set? Update LED PWM 0 Set push button flag No conversion Set tenths flag 820 Yes Yes Perform ATD Vout 0.1u Digijock(ette)-Strength Digital System DesignTM No No Yes Toggle UV LED Update Pump PWM lights https://www.youtube.com/watch?v=ovuchyM2fDg&feature=youtu.be ECE 362 Embedded Microcontroller Mini-Project − Spring 2014 Everett Berry, Allen Chien, Jacob Stevens, Kyle Woodworth / Flappy Bits Block Diagram Overview Accelerometer Data The Flascii Bird is a real life simulation of the game flappy bird. The player is asked to wear two specially designed gloves that have accelerometers embedded. The game is entirely controlled by movements of the player and the data collected from the accelerometers is sent wirelessly to the HCS12 microcontroller. The Papilio One FPGA is responsible for outputting VGA graphical interface to the monitor. Xbee Transmitter Xbee Receiver Left to Right: Allen, Everett, Jacob, and Kyle Component List • • • • • PCB Design ADC HCS12 Microcontroll er Unit HCS12 Microcontroller Papilio One FPGA Xbee 1mW Trace Antenna Series 1 ADXL 335 Accelerometer Printed Circuit Boards PWM Buzzer Papilio One – 500K The Papilio One is an open-source development platform. It utilities the power of FPGA through implementation VGA driver with SPI communication. Features: •4Mbit SPI Flash Memory •Two-Channel USB Connection for JTAG and Serial Communications •48 I/O lines Digijock(ette)-Strength Digital System DesignTM Low Pass Filter http://youtu.be/LIovdlLAlTs Game Logic TIM SPI Papilio One FPGA VGA Monitor Output ECE 362 Embedded Microcontroller Mini-Project Spring 2014 Dabonda / Surveillance Video Camera Microprocessor used: 9S12C32 Peripherals used: RTI: The two buttons SPI: LCD screen ATD: Potentiometers TIM: Reset PWM: Motors The purpose of this project is to build a surveillance video camera, whereby the direction of the camera can be controlled by a user using two potentiometers. The camera covers a range from 60 degrees left to 60 degrees right and 60 degrees up to 60 degrees down. The push button then toggles the machine between run mode and hold position mode. The Liquid Crystal Display (LCD) panel will display the angle of the camera and the corresponding the Light-Emitting Diode (LED) rows will also light up as an additional indicator. If there is no user input after a whole minute, the machine will return to its initialization stage and the welcome screen will display on the LCD panel. Digijock(ette)-Strength Digital System DesignTM https://www.youtube.com/watch?v=cHe7elEZAPk ECE 362 Embedded Microcontroller Mini-Project Spring 2014 Raulmaha Digital Synthesizer Andrew Pawling, Aimad Md Uslim, John Sterrett, Chris Pierson Project Design Goals The creation of a digital synthesizer that integrates the following features: • Mono-phonic, single octave keyboard range synthesizer • Analog volume and distortion control • Variety of audio waveforms (sine, triangle, saw tooth, and square) • Accelerometer-based pitch bend ability Digijock(ette)-Strength Digital System DesignTM https://www.youtube.com/watch?v=148smSUeaGM Module 4 Desired Outcome: “An ability to design and implement a (‘turn-key’) microcontroller-based embedded system” – Part A: PCB Design and Fabrication – Part B: External Microcontroller Interfaces – Part C: Basic Regulated Power Supply Design – Part D: Embedded System Hardware and Software Development Tips 11 2013 Edition © by D. G. Meyer Microcontroller-Based Digital System Design Module 4-A PCB Fabrication and Layout 12 Outline Overview PCB fabrication process Typical PCB fabrication tolerances Basic layout guidelines EMI considerations (reference: AN1259) Layout tips 13 Overview Objective: To understand what printed circuit boards are, how they are created, and basic guidelines on PCB design 14 Anatomy of a PCB Quick overview: – Copper foil – Substrate – Lamination – Etch – Drill – Plate – Solder mask – Silkscreen 15 Anatomy of a PCB Copper foil – electro-plated onto a large drum then scraped off (typical) – one side very smooth, one rough 16 Anatomy of a PCB Substrate – FR4 (fiberglass reinforced multi-functional epoxy) – others: FR2 Lamination – copper foil applied to both sides of laminate and then bonded using heat and pressure 17 Anatomy of a PCB (3/8) Etching – Circuit first realized here – Etch-resist applied, pattern is exposed 18 Anatomy of a PCB Etching – Uncured resist is washed off and then the pattern is etched – common etchants: FeCl, Ammonia – solvent/abrasive wash to remove etchresist – PCB then washed to remove residues from solvents and abrasive process 19 Anatomy of a PCB Drill / Plate – This is how the connections are made between layers – Holes drilled through where connections are desired 20 Anatomy of a PCB Drill / Plate – PCB then immersed in a plating solution where a thin layer of copper forms inside the barrel of the hole – Once enough copper is deposited this way, then on to electro-plating, where ~1 mil of copper is plated on – If a gold-plate finish is required, typically applied at this time 21 Anatomy of a PCB Solder mask – Protects metal from corrosion, short circuits – Also prevents solder from sticking – applied as a liquid, then cured with UV – Many colors available, green most common 22 Anatomy of a PCB Silkscreen (legend) – labels everything: components, notes, warnings, logos – similar process to making T-shirts – applied as a liquid, then cured – several colors, white most common 23 PCB Terminology Pin – A plated through hole used to connect the terminal of a part Pad – A flat conductive surface for connecting the terminal of a part Via – A plated through hole used for signal routing Trace – A wire or 1 dimensional electrical connection Signal Plane – A 2 dimensional electrical connection (commonly used for ground) 24 Typical PCB fabrication tolerances Notation: 1 mil = 1 “milli-inch” = 0.001 in. Drills: +5/-3 mils diameter, 5 mil center smallest drill size 20 mil Layer-to-layer alignment: +/- 3 mils Etched feature size: +/- 1 mil Trace size (isolate): 6 mil ≥ 8 mil trace/isolate recommended Solder mask size: +/- 3 mil Silkscreen size: +/- 10 mil 25 Basic Layout Guidelines Minimum recommended trace/space 10-12 mil Power and ground traces should be sized for current being passed (width/current charts available online) Follow all manufacturer layout recommendations Decoupling capacitors should be placed as close to each IC as possible Provide space and mechanical support for connectors, heat sinks, and standoffs (used for mounting board) Incorporate headers or vias for verification and debugging 26 27 28 Basic Mini-Project PCB Guidelines Maximum board size is 60 square inches Minimum trace/space size should be 10-12 mil Power and ground traces should be as “big as possible” (at least 40-60 mil, 100 mil better) Decoupling capacitors should be placed as close to each IC as possible Use 32-pin DIP socket for 9S12C32 “stamp” module and DIP sockets for other ICs (GALs, optical isolators, buffers, etc.) Generally stick with “through hole” passives (resistors and capacitors), but surface mount OK Provide space and mechanical support for connectors, heat sinks, and standoffs (used to 29 mount board in packaging) COM port (can use standard 9-pin “D” connector) 30 General Layout Guidelines Separation of circuits on a PCB – pay close attention to the potential routing of circuits between subsystems 31 An Undersized Trace 32 General Layout Guidelines Ground layout is the most important PCB layout design consideration – most EMI problems can be resolved using practical and efficient grounding methods Noise can be coupled into other circuits by common impedance Dynamic DC offset can be created that produces a highfrequency AC component of noise that affects low-level analog circuitry 33 General Layout Guidelines Ground layout design tips – separate digital logic and low-level analog circuits – provide as many parallel pathways to ground as possible (becomes a “ground plane” in the limit, and decreases inductance of ground return) – if ground plane is uneconomical, use single-point (starpoint) grounding – lowers common impednace coupling among subsystems – to decrease trace inductance, use as short and wide a trace as possible – use 45-degree turns instead of 90-degree turns to decrease transmission reflections – decrease the size of all ground loops as much as possible (e.g., single-point power system) 34 General Layout Guidelines Single-point power system for 2-layer PCB 35 General Layout Guidelines IC decoupling capacitor placement – should be as physically close to IC as possible (for surface mount components, place capacitor halfway between VDD and GND) – use 0.1 µF (surface mount, ceramic) decoupling capacitors for system frequencies up to 15 MHz – above 15 MHz, use 0.01 µF decoupling capacitors 36 General Layout Guidelines Power terminal decoupling capacitor placement – sometimes called a “bulk” capacitor – should be placed as close to the power input terminal (connector) as possible – a small (0.1 µF capacitor) should also be used to decouple high frequency noise at the power input terminal – purpose of bulk capacitor is to help recharge the IC decoupling capacitors – value is not critical, but should be able to recharge 15-20 ICs (multiple bulk capacitors may be used if there are more than 15-20 ICs) 37 General Layout Guidelines Signal layout – most sensitive digital signals are clock, reset, and interrupt lines – if analog and digital signals have to be mixed, make sure the lines cross each other at 90degree angles (reduces cross-coupling) – ATD performance can be severely impacted by reference lines (route directly from power supply and low-pass filter using combination of 1 K resistor and 1.0 µF capacitor 38 General Layout Guidelines Typical crystal or ceramic resonator circuit layout 39 Layout Tips - 1 Keep parts that belong close together on layout close together on schematic Print layout in 1:1 scale and compare footprints with your actual parts before ordering PCBs Position parts carefully first, route second (“measure twice, cut once”) Avoid trace angles ≤ 90° in routing whenever possible (PCB layout tool enforces this) Separate digital/analog grounds, and tie together at a single point only 40 Layout Tips - 2 Don’t use 90° (or acute) angles when routing traces – chamfer/bevel them whenever possible (routing tool typically enforces this) Take mounting into consideration (route connectors on bottom side, and save space for standoffs/screws) Avoid acute angles in traces (they are “acid traps” and can cause problems with etching) Use larger power traces and orient your power supplies and supply lines near where they are used, and put them in a place where they will have minimum interference (e.g., away from GPS or RF modules) 41 Layout Tips - 3 Provide an ample number of test points (suggest header that breaks out all significant microcontroller signal pins) Be sure to include relevant board information in the silkscreen layer of your board (name, date, board revision, etc.) Be aware that connector pin-out may differ based on gender (watch out for inadvertent “mirroring” of pin-out) Start even earlier than you thought you would have to start 42 Clicker Quiz 43 1. The primary reason to “chamfer” corners (using 45° turns, instead of using 90° turns) on PCB layout traces is to: A. B. C. D. E. decrease the size of ground loops decrease noise radiation decrease trace capacitance decrease trace inductance none of the above 2. The primary goal of a single-point power and ground strategy on a PCB layout is to: A. B. C. D. E. decrease the size of ground loops decrease noise radiation decrease trace capacitance decrease trace inductance none of the above 3. The main reason for avoiding acute angles between traces on a PCB layout is to: A. B. C. D. E. decrease the size of ground loops decrease noise radiation decrease trace capacitance decrease trace inductance none of the above 4. The purpose of a “bulk” capacitor, connected in parallel with the input power and ground terminals of the PCB, is to: A. provide additional “ripple” filtering of the power supply voltage B. suppress noise generated by the board from being radiated C. reduce the power supply regulation requirement D. recharge the decoupling capacitors E. none of the above 2014 Edition © by D. G. Meyer Microcontroller-Based Digital System Design Module 4-B External Microcontroller Interfaces 48 Learning Objectives design an interface that allows a microcontroller port pin to control a D.C. load (e.g., motor) describe how optical isolation can be used to protect microcontroller port pins used as either inputs or outputs describe how a scanned keypad works describe the operation of a rotary pulse generator (RPG) and cite some potential applications describe how a stepper motor works and be able to distinguish between full- and half-step modes describe how port expansion can be accomplished using shift registers design an interface that allows a microcontroller to communication with an LCD 49 Outline Switching D.C. Loads Optically Isolated Inputs Keypads (Switch Matrices) Rotary Pulse Generators (RPG) Switch (SPST Contact) Debouncer Position Control (Steppers and Servos) LCD Interface / Serial I/O Expansion Digitally Controlled Potentiometer Temperature and Humidity Sensors Digital Compass Accelerometers Hall Effect Sensors Pressure/Force Sensors Ultrasonic Range Finders IR Remote Decoders RF Links (Transmitters/Receivers) 50 Switching D.C. Loads Basic BJT-based switching circuit (“saturated mode”) V L LOAD Port Pin “current-controlled switch” C B NPN BJT IC = hFE x IB E Choose BJT based on following parameters ICmax continuous VCE breakdown hFE (D.C. current gain), also called 51 Switching D.C. Loads Use either BJTs or power MOSFETs – BJTs: cheap, but may require a significant amount of base current to drive into saturation – MOSFETs: tend to be more expensive, but require virtually no gate current to operate Inductive loads require arc suppression diode VL Energy stored in an inductive load must be dissipated, otherwise the “inductive kickback” can damage the switching device 52 Switching D.C. Loads BJT limitations – have to use Darlington (more expensive) to get high IC capacity with large hFE – generally need base current on the order of (a few) milliamps to switch transistor – if “something bad” happens to transistor, can take port pin (and possibly microcontroller) with it – use optical isolator to provide protection C NPN Darlington B E 53 Switching D.C. Loads Optically isolated BJT VL LOAD NPN BJT 54 Switching D.C. Loads Optically isolated BJT Vcc VL LOAD NPN BJT active low port pin R1 55 Switching D.C. Loads Optically isolated BJT VL Vcc LOAD NPN BJT active low port pin R1 Assume Vcc = 5 V, VLED = 1.5 V, and VOL @ 10 mA = 0.8V R1 = 2.7/0.01 = 270 56 Switching D.C. Loads Optically isolated BJT VL Vcc VL LOAD R2 active low port pin NPN BJT R1 Assume Vcc = 5 V, VLED = 1.5 V, and VOL @ 10 mA = 0.8V R1 = 2.7 / 0.01 = 270 57 Switching D.C. Loads Optically isolated BJT Vcc VL VL LOAD R2 NPN BJT active low port pin R1 Assume switching 1 amp load, and that hFE of transistor is 100 need 10 mA of base current to saturate transistor (assume VL is 12 V, VBEsat of transistor is 0.7 V, and that VCEsat of photo transistor is 0.3 V) R2 = 11.0 / 0.01 = 1100 58 Switching D.C. Loads Basic MOSFET-based switching circuit VL LOAD Port Pin G D S “voltage-controlled switch” N-channel power MOSFET Choose MOSFET based on following parameters IDmax continuous VDS breakdown rDS (on) (drain-to-source “on” resistance) 59 Switching D.C. Loads MOSFET limitations – be careful to choose a MOSFET with a small rDS(on) when switching high current loads (heat, voltage drop) – tend to be more “fragile” than BJTs (MOSFETs can be damaged by ESD) – if “something bad” happens to transistor, can take port pin (and possibly microcontroller) with it – can use same optical isolation circuit used with BJT 60 Optically-Isolated Inputs Off-board (external, remotely located) switch/data inputs should be optically isolated – – – – helps reduce noise helps prevent ESD-induced damage prevents “strange” voltages from entering board eliminates ground loops 61 “Ben Franklin Experiment” 62 “Ben Franklin Experiment” 63 “Ben Franklin Experiment” 64 “Ben Franklin Experiment” 65 Optically-Isolated Inputs Off-board (external, remotely located) switch/data inputs should be optically isolated – – – – helps reduce noise helps prevent ESD-induced damage prevents “strange” voltages from entering board eliminates ground loops | + Isolated Power Supply (or Battery) Remote Switch 66 Optically-Isolated Inputs Off-board (external, remotely located) switch/data inputs should be optically isolated – – – – helps reduce noise helps prevent ESD-induced damage prevents “strange” voltages from entering board eliminates ground loops Vcc L = closed | + H = open Isolated Power Supply (or Battery) Remote Switch 67 Level Translation Needed for interfacing CMOS families operating at different supply voltages Level Translation Line Drivers and Receivers Needed for driving (long) cables based on various standards (e.g., RS 232, RS 422, RS 485, etc.) Line Drivers and Receivers Example: RS 232 Scanned Keypad 73 Scanned Keypad row return lines active low column scan lines 74 Scanned Keypad H row return lines H H H active low column scan lines H H L 75 Scanned Keypad H row return lines H H H active low column scan lines H L H 76 Scanned Keypad H row return lines H H H active low column scan lines L H H 77 Scanned Keypad H row return lines H H H active low column scan lines H H L 78 Scanned Keypad H row return lines H H H active low column scan lines H L H 79 Scanned Keypad H row return lines L H H active low column scan lines L H H 80 Keypad Encoder 81 Rotary Pulse Generator (RPG) 82 RPGs Determine direction of rotation by concatenating “previous” and “current” codes, and using as look-up table index 83 Switch (SPST Contact) Debouncer 84 Position Control Position control – required in many applications – complications • inertia/mechanical loading • startup torque different than run torque • gear backlash – stepping actuators are a good solution for many positioning problems • rotational • linear – why steppers are a good choice • • • • • high resolution without gearing fast positioning (up to 1000 steps/sec) position error (usually) does not accumulate wide range of high and low torque (large/small) available simple/efficient drive circuitry 85 Stepper Motor Interface 86 L L Y 01 11 H 00 H X 10 VMOTOR FULL STEP MODE 87 H L Y 01 11 L 00 H X 10 VMOTOR FULL STEP MODE 88 H H Y 01 11 L 00 L X 10 VMOTOR FULL STEP MODE 89 L H Y 01 11 H 00 L X 10 VMOTOR FULL STEP MODE 90 L L Y 01 11 H 00 H X 10 VMOTOR FULL STEP MODE 91 L H Y 01 11 H 00 H X 10 VMOTOR HALF STEP MODE 92 L L Y 01 11 H 00 H X 10 VMOTOR HALF STEP MODE 93 H L Y 01 11 H 00 H X 10 VMOTOR HALF STEP MODE 94 H L Y 01 11 L 00 H X 10 VMOTOR HALF STEP MODE 95 H H Y 01 11 L 00 H X 10 VMOTOR HALF STEP MODE 96 H H Y 01 11 L 00 L X 10 VMOTOR HALF STEP MODE 97 H H Y 01 11 H 00 L X 10 VMOTOR HALF STEP MODE 98 L H Y 01 11 H 00 L X 10 VMOTOR HALF STEP MODE 99 L H Y 01 11 H 00 H X 10 VMOTOR HALF STEP MODE 100 Hobbyist Servos Position control – Single-wire interface – Can not rotate more than ~270° – why servos are a good choice • low overhead for control – logic-level interface • simple interface (PWM or TIM) Pulse width (0.9-2.9µs) Refresh period (12-20ms) – why servos may not be a good choice • limited range of motion • lower torque Clicker Quiz 102 1. Given that the motor coil requires 1 A of current to operate, that the NPN switching transistor has a VBEsat of 0.6 V and an hFE = 200, and that the microcontroller port pin can source up to 10 mA of current at a VOH of 4.2 V, a suitable value for R would be: A. B. C. D. E. 100 270 720 1000 none of the above 12 V MOTOR 9S12C32 Port Pin NPN R 103 2. If the microcontroller port pin was only capable of sourcing up to 2 mA at a VOH of 4.2 V (e.g., based on changing the pin from “full” drive to “reduced” drive mode), the minimum hFE required to operate the 1 A motor coil would be: 12 V A. B. C. D. E. 100 500 1000 5000 none of the above MOTOR 9S12C32 Port Pin NPN R 104 3. The purpose of the diode in the circuit is to: A. B. protect the microcontroller port pin to dissipate energy in the motor coil when the transistor turns off C. to dissipate energy in the motor coil when the transistor turns on D. to limit the amount of current drawn from the 12 V motor supply E. none of the above 12 V MOTOR 9S12C32 Port Pin NPN R 105 4. Use of optically isolated inputs: A. helps prevent ESD-induced damage B. eliminates ground loops C. prevents port pins from being driven over/under rated input voltage swing D. all of the above E. none of the above 106 5. The following ABEL program does not realize an 8-bit shift register: MODULE shiftregA TITLE ‘8-bit Shift Register A’ DECLARATIONS clock pin; serial_in pin; q0..q7 pin istype ‘reg’; MODULE shiftregB TITLE ‘8-bit Shift Register B’ DECLARATIONS clock pin; serial_in pin; q0..q7 pin istype ‘reg’; EQUATIONS [q1..q7] := [q0..q6]; q0 := serial_in; [q0..q7].clk = clock; EQUATIONS [q0..q7].clk = clock; q7 := serial_in; [q0..q6] := [q1..q7]; END (A) END (B) MODULE shiftregC TITLE ‘8-bit Shift Register C’ DECLARATIONS clock pin; serial_in pin; q0..q7 pin istype ‘reg’; MODULE shiftregD TITLE ‘8-bit Shift Register D’ DECLARATIONS clock pin; serial_in pin; q0..q7 pin istype ‘reg’; EQUATIONS [q7..q1] := [q6..q0]; q0 := serial_in; [q7..q0].clk = clock; EQUATIONS q7.d = serial_in; [q0..q6].d = [q1..q7].q; [q0..q7].clk = clock; END (C) END (D) (E) none of the above 107 Digitally Controlled Potentiometer 108 Digitally Controlled Potentiometer The AD5220 contains a single channel, 128 position, digitallycontrolled variable resistor (VR) device. This device performs the same electronic adjustment function as a potentiometer or variable resistor optimized for portable instrument and test equipment "push button" applications. 109 Digitally Controlled Potentiometer The AD7376 performs the same electronic adjustment function as mechanical potentiometers, variable resistors, and trimmers with enhanced resolution, solid-state reliability, and programmability. With digital rather than manual control, the AD7376 provides layout flexibility and allows closed-loop dynamic controllability. 110 Digital Thermometer 111 Humidity and Temperature Sensor 112 Digital/Analog Compass Digital Compass Digital Compass 115 Accelerometer 116 Hall Effect Sensor 117 Pressure (Force) Sensor 118 Ultrasonic Range Finder 119 IR Remote 120 RF Link (Transmitter) 121 RF Link (Receiver) 122 2014 Edition © by D. G. Meyer Microcontroller-Based Digital System Design Module 4-C Basic Regulated Power Supply Design 123 Outline Basic half-wave power supply Half-wave ripple analysis Basic full-wave supply Full-wave ripple analysis Basic linear regulator circuits Heat sinks and thermal resistance Low dropout linear regulator circuits 124 2 Basic Half-Wave Supply 1 5 3 + C RL 8 1 4 A.C. “wall wart” Question: Why is this called a “half-wave” circuit? Answer: Only half of the cycles are delivered to the load 125 Basic Half-Wave Dual Polarity Supply + CT - 126 ripple Analysis no-load = VN loaded = VL 3/240 sec = 12.5 ms Question: What transformer secondary voltage is required to obtain VN = 5.0 VDC? 5.0/2 3.5 VAC Note: Amount of ripple is proportional to load and inversely proportional to size of filter capacitor Analysis: Can calculate value of C based on amount of ripple willing to tolerate at a particular load 127 ripple 0.01 V @ 0.5A load Analysis no-load = VN loaded = VL 3/240 sec = 12.5 ms Example: Have 500 mA load RL = VL/IL = 5/0.5 = 10 Assume we want no more than 10 mV of ripple solve for C given that VL @ t=12.5 ms is ≥ 4.99 V with RL = 10 VL = VN x e-t/RC t = -RL x C x ln(VL/VN) 0.0125 = -10 x C x ln(4.99/5.00) = -10 x C x (-2 x 10-3) = C x (2 x 10-2) C = 0.0125/(2 x 10-2) = 0.625 F = 625,000 F128 2 1 Basic Full-Wave Supply 1 5 3 2 4 - + 8 4 +C 3 1 RL A.C. “wall wart” Question: Why is this called a “full-wave” circuit? Answer: All cycles (+/-) are delivered to the load 129 ripple Analysis no-load = VN loaded = VL 1/240 sec = 4.2 ms Question: What transformer secondary voltage is required to obtain VN = 5.0 VDC? 5.0/2 3.5 VAC Note: Amount of ripple is proportional to load and inversely proportional to size of filter capacitor Analysis: Can calculate value of C based on amount of ripple willing to tolerate at a particular load 130 ripple 0.01 V @ 0.5A load Analysis no-load = VN loaded = VL 1/240 sec = 4.2 ms Example: Have 500 mA load RL = VL/IL = 5/0.5 = 10 Assume we want no more than 10 mV of ripple solve for C given that VL @ t=4.2 ms is ≥ 4.99 V with RL = 10 VL = VN x e-t/RC t = -RL x C x ln(VL/VN) 0.0042 = -10 x C x ln(4.99/5.00) = -10 x C x (-2 x 10-3) = C x (2 x 10-2) C = 0.0042/(2 x 10-2) = 0.21 F = 210,000 F131 ripple 0.1 V @ 0.5A load Analysis no-load = VN loaded = VL 1/240 sec = 4.2 ms Example: Still have 500 mA load RL = VL/IL = 5/0.5 = 10 Now assume we are willing to tolerate 100 mV of ripple solve for C given that VL @ t=4.2 ms is ≥ 4.9 V with RL = 10 VL = VN x e-t/RC t = -RL x C x ln(VL/VN) 0.0042 = -10 x C x ln(4.90/5.00) = -10 x C x (-2 x 10-2) = C x (2 x 10-1) C = 0.0042/(2 x 10-1) = 0.021 F = 21,000 F132 Thought Questions Question: What’s inside a basic (unregulated) D.C. “wall-wart”? 2 1 Answer: Not much… 1 5 3 2 + 4 + 8 C 3 1 4 - Unregulated D.C. “wall-wart” 133 Thought Questions Question: What value of C is typically used in a garden-variety D.C. wall-wart? Answer: 2000F (or less) Question: If you purchase an “N-volt” unregulated D.C. wall-wart, what is VN (the “no-load output”) likely to be? Answer: N·2 (“not good for anything sensitive”) 134 Thought Question Analysis Assume still have 500 mA load RL = VL/IL = 5/0.5 = 10 and that the D.C. wall-wart has C = 2000 F Also assume VN = 5.0 VDC Solve for VL @ t=4.2 ms given RL = 10 and C = 2000 F VL = VN x e- t/RC VL = 5 x e- 0.0042/0.02 = 5 x e 0.21 = 5 x 0.81 = 4.05 0.95 V of ripple Question: Is such a supply (unregulated D.C. wall-wart) suitable for operating a microcontroller? Answer: NO – way too much ripple 135 Basic Positive Voltage Linear Regulator 2 1 filter cap 1 5 3 2 + 4 +C1 8 78XX 1 IN OUT 2 + C2 VL 3 1 4 - VN - A.C. “wall wart” HF noise suppression cap 78XX-series linear regulator IC (XX= 05,12,15 typ) can withstand a lot of ripple on input and still produce a low noise, well-regulated output needs input voltage VN 2.5 V higher than regulated output (VL) to work properly VL + 2.5 VDC = Regulator DROPOUT VOLTAGE 136 Source: http://www.nationalsemiconductor.com 137 138 Basic Negative Voltage Linear Regulator 2 1 filter cap 1 5 3 4 4 + - 2 79XX VN 1 IN OUT 2 - 8 3 1 C1 + C2 VL + A.C. “wall wart” HF noise suppression cap 79XX-series linear regulator IC (XX= 05,12,15 typ) used when negative supply voltage needed both positive and negative supply regulators can “co-exist” (need CENTER-TAP A.C. transformer) same dropout voltage as positive regulators 139 ripple that can be tolerated Analysis dropout = 2.5 V min no-load = VN regulated = VL 1/240 sec = 4.2 ms Design constraints: Need to pick transformer secondary voltage and filter capacitor C1 such that VN – ripple voltage ≥ DROPOUT VOLTAGE = VL + 2.5 Note: The larger VN is, the greater the voltage drop will be across the regulator larger power (and heat!) dissipation…but the smaller VN is, the bigger C1 will need to be to minimize the ripple voltage 140 ripple = 1V Analysis dropout = 2.5 V min no-load = VN regulated = VL Example: For a regulated 5 VDC supply, pick VN 8.5 V, so amount of ripple that can be tolerated is 1 V transformer secondary required is 6 VAC No load: quiescent current is approximately 6 mA power dissipation is 8.5 x 0.006 = 51 mW Full load (1A): 3.5 V @ 1A drops across regulator (assuming no ripple) power dissipation = 3.5 X 1 = 3.5 W Efficiency: 5V @ 1A (5W) delivered to load, but 3.5W dissipated by regulator 5.0/8.5 59% efficient 141 ripple = 1V Analysis dropout = 2.5 V min VN = 8.5 VL = 5.0 1/240 sec = 4.2 ms Calculate C1: Have 8.5V @ 1A load (voltage dropped across regulator is part of load) RL = VL/IL = 8.5 Assume we want no more than 1 V of ripple solve for C1 given that VNmin @ t=4.2 ms is ≥ 7.5 V with RL = 8.5 VL = VN x e-t/RC t = -RL x C1 x ln(VNmin/VNmax) 0.0042 = -8.5 x C1 x ln(7.5/8.5) = -8.5 x C x (-0.125) C1 3960 F 142 Thought Question Question: What will happen if we increase the transformer secondary voltage significantly (e.g., to 12 VAC)? VN 17 VDC should be able to tolerate more ripple and “get by” with a much smaller C1, but power dissipation will increase and efficiency will decrease ripple = 9.5V dropout = 2.5 V min VN = 17 VDC VL = 5 VDC 143 Thought Question Analysis No load: quiescent current is (still) approximately 6 mA power dissipation is 17 x 0.006 = 102 mW Full load (1A): 12 V @ 1A drops across regulator (assuming no ripple) power dissipation = 12 X 1 = 12 W Efficiency: 5V @ 1A (5W) delivered to load, but 12W dissipated by regulator 5.0/17.0 29% efficient Calculate C1: Have 17V @ 1A load (voltage dropped across regulator is part of load) RL = VL/IL = 17 Assume we want no more than 9.5 V of ripple solve for C1 given that VNmin @ t=4.2 ms is ≥ 7.5 V with RL = 17 VL = VN x e-t/RC t = -RL x C1 x ln(VNmin/VNmax) 0.0042 = -17 x C1 x ln(7.5/17) = -17 x C1 x (-0.82) = 13.9 x C1 C1 300 F much smaller than previous case 144 Another Thought Question (or Two) Question: Can you think of any applications where we might be willing to tolerate this kind of inefficiency? Answer: Application with 12 VDC motor and 5 VDC microcontroller Question: How much heat is 5-10 W? What do we need to do with it? What will it cause if we don’t do with it what we need to do with it?? - relatively speaking, a LOT - dissipate it - premature device failure 145 More Thought Question Analysis Need to pick properly sized HEAT SINK to help device dissipate heat Idea of THERMAL RESISTANCE measured in ºC/W (temperature rise per watt dissipated) “lower thermal resistance is better” Thermal resistance is ~ inversely proportional to price. 146 Source: http://www.mouser.com 147 More Thought Question Analysis Need to pick properly sized HEAT SINK to help device dissipate heat Idea of THERMAL RESISTANCE measured in ºC/W (temperature rise per watt dissipated) “lower thermal resistance is better” Example: For first case analyzed (6 VAC secondary), let’s say we don’t want heat sink/junction temperature to rise more than 10º C above ambient temperature need a thermal resistance of approx 10º C/ 3.5 W 3 Thermalloy choice “B” comes close (3.4) – see chart 148 149 3.4 150 More Thought Question Analysis Need to pick properly sized HEAT SINK to help device dissipate heat Idea of THERMAL RESISTANCE measured in ºC/W (temperature rise per watt dissipated) “lower thermal resistance is better” Example: For first case analyzed (6 VAC secondary), let’s say we don’t want heat sink/junction temperature to rise more than 10º C above ambient temperature need a thermal resistance of approx 10º C/ 3.5 W 3 Thermalloy choice “B” comes close (3.4) – see chart What if we’re “cheap” (only want to spend $0.43 for the heat sink instead of $1.66)? – choice “R” has a thermal resistance of 24 will experience 24 x 3.5 = 84º C temperature rise – ouch!! P.S. Don’t forget to use HEAT SINK COMPOUND 151 152 24 153 Low Dropout (LDO) Linear Regulator 2 1 filter cap 1 5 3 MIC29150X/TO220 2 + 4 +C1 8 1 IN OUT 3 + C2 VL 3 1 4 - VN - A.C. “wall wart” HF noise suppression cap Example: Micrel MIC2915X-series dropout voltage is only 0.3-0.4 V (compared with 2.5 V for the standard 78XX-series regulators) tradeoff with LDO regulators is that since the dropout voltage is lower, the amount of input ripple that can be tolerated is lower than a “standard” regulator 154 155 156 78xx “Flashback” for comparison… 157 158 ripple = 0.6V Analysis dropout = 0.4 V VN = 6 V VL = 5 V transformer secondary is 4.25 VAC 1/240 sec = 4.2 ms Calculate C1: Have 6V @ 1A load (voltage dropped across regulator is part of load) RL = VL/IL = 6 Assume we want no more than 0.6 V of ripple solve for C1 given that VNmin @ t=4.2 ms is ≥ 5.4 V with RL = 6 VL = VN x e-t/RC t = -RL x C1 x ln(VNmin/VNmax) 0.0042 = -6 x C1 x ln(5.4/6.0) = -6 x C x (-0.105) = C x 0.632 C1 6650 F bigger than “standard” case! 159 Analysis No load: quiescent current is approximately 8 mA power dissipation is 6 x 0.008 = 48 mW Full load (1A): 6 V @ 1A drops across regulator (assuming no ripple) power dissipation = 6 X 1 = 6 W Efficiency: 5V @ 1A (5W) delivered to load, but 1 W dissipated by regulator 5.0/6.0 83% efficient Heat sink: Let’s say we don’t want heat sink/junction temperature to rise more than 10º C above ambient temperature need a thermal resistance of approx 10º C/ 1 W 10 use Thermalloy choice “A” ($1.04) 160 161 10 162 Clicker Quiz 163 1 2 1 3 9 VAC 2 - + 4 VN 8 C1 3 1 4 VF = 0.7 5 1. Given that the transformer secondary is rated at 9 V and that the forward voltage of each diode is 0.7 V, then VN (the no-load D.C. output voltage) will be approximately: A. 7.6 V B. 8.3 V C. 10.75 V D. 11.33 V E. 12.73 V F. none of the above 164 1 2 1 9 VAC 3 4 VF = 0.7 5 2 - + 4 78XX VN 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 2. Given that the transformer secondary is rated at 9 V and that the forward voltage of each diode is 0.7 V, calculate the efficiency operating at full load (1 amp) if a 7805 is used (ignoring power factor correction): A. B. C. D. E. F. 39% 44% 47% 56% 100% none of the above 165 1 2 1 3 9 VAC 2 - + 4 78XX VN 1 IN OUT 2 + 8 C1 C2 VL 3 1 4 VF = 0.7 5 - 3. Given that the 7805 has a dropout voltage of 2.5 V, calculate the amount of ripple that can be tolerated (rounded to the nearest 0.1 V) when sizing C1: A. 0.1 V B. 0.8 V C. 2.5 V D. 3.8 V E. 8.8 V F. none of the above 166 1 2 1 3 4 VF = 0.7 5 9 VAC 2 - + 4 78XX VN 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 4. Based on similar linear power supply examples, the size of C1 for the design above should be on the order of: A. B. C. D. E. F. 10 µF 100 µF 1000 µF 10,000 µF 100,000 µF none of the above 167 1 2 1 3 9 VAC 2 - + 4 78XX VN 1 IN OUT 2 + 8 C1 C2 VL 3 1 4 VF = 0.7 5 - 5. If the junction temperature of the 7805 is to rise no more than 20° C above ambient temperature, then the thermal resistance of its heat sink should be no more than: A. 0.3 B. 1.0 C. 3.2 D. 6.4 E. 12.8 F. none of the above 168 2 1 STANDARD 5V REGULATOR Dropout = 2.5 V 78XX 1 VN = 8 V Ripple = 0.5 V max 5 3 2 4 - + 4 VN 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 6. Assuming a ripple tolerance of 0.5 V, the maximum efficiency at full load (1 A) that can be achieved with a 5 V regulator circuit based on a standard linear regulator (that has a dropout voltage of 2.5 V) is approximately (again, ignoring power factor correction): A. B. C. D. E. 50% 60% 63% 70% none of the above 169 1 2 1 5 3 2 4 - + 4 VN = 6 V Ripple VN = 0.5 V max LOW-DROPOUT 5V REGULATOR Dropout = 0.5 V 78XX 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 7. Assuming a ripple tolerance of 0.5 V, the maximum efficiency at full load (1 A) that can be achieved with a 5 V regulator circuit based on a low-dropout linear regulator (that has a dropout voltage of 0.5 V) is approximately: A. B. C. D. E. 70% 77% 83% 91% none of the above 170 1 2 1 5 3 2 4 - + 4 VN = 6 V Ripple VN = 0.5 V max LOW-DROPOUT 5V REGULATOR Dropout = 0.5 V 78XX 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 8. The minimum value of C1 that should be used for this low-dropout 5V 1 A power supply design is approximately: A. B. C. D. E. 2000 µF HINT: Value of RL is based on VN @ 1 amp load 4000 µF t = -RL x C1 x ln(VNmin/VNmax), where 8000 µF 10,000 µF none of the above t = 0.0042 171 1 2 1 5 VF = 1.1 3 2 4 - + 4 VN = 6 V Ripple VN = 0.5 V max LOW-DROPOUT 5V REGULATOR Dropout = 0.5 V 78XX 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 9. Assuming each diode in the bridge rectifier has a forward voltage of 1.1 V (typical), the transformer (RMS) secondary voltage should be rated at approximately: A. B. C. D. E. 5.0 VAC 5.8 VAC 6.3 VAC 9.0 VAC none of the above 172 2 1 LOW-DROPOUT 5V REGULATOR Dropout = 0.5 V 78XX 1 5 3 VF = 1.1 2 4 - + 4 VN 1 IN OUT 2 + 8 C2 VL 3 1 C1 - 10. What if, when doing a parts search, you can only find suitable transformers that have secondary voltage ratings of 5.0 VAC, 6.0 VAC or 6.3 VAC? A. B. C. D. E. pick the 5.0 VAC transformer and increase C1 to 16,000 µF pick the 6.0 VAC transformer and reduce C1 to 5000 µF pick the 6.0 VAC transformer and reduce C1 to 4000 µF pick the 6.3 VAC transformer and reduce C1 to 2000 µF none of the above 173 2014 Edition © by D. G. Meyer Microcontroller-Based Digital System Design Module 4-D Hardware and Software Development Tips 174 Outline Memory Models Discussion Application Code Organization Dealing With Random Behavior Avoiding Really Stupid Tricks 175 Memory Models - 1 What are the primary differences between generalpurpose processor memory models and embedded processor memory models? “Flat” memory model (typically no memory hierarchy or virtual memory) Limited (fixed, “non-infinite”) SRAM data space and Flash program space “Non-homogeneous” memory types SRAM – “read/write” (volatile unless battery backup used) Flash – “read only” (non-volatile in-circuit, sectorerasable and reprogrammable) EEPROM – “read mostly” (non-volatile in-circuit, 176 byte-erasable and reprogrammable) Memory Models - 2 How do these differences in memory models influence way in which high-level language code is written? Don’t use too high a level of abstraction Avoid use of big library routines (e.g., printf) Avoid dynamic memory allocation Avoid complex data structures Avoid recursive constructs Watch declarations (char, int, long) Treat “C” like a “macro-assembly” language Remember that floating point support is emulated by lengthy software routines Remember that using table lookup might be a better approach for transcendental functions (sin, cos, tan, log) than calculation via software emulation 177 Useful #define Tricks Get input from GPIO #define BUTTON_1_MASK #define BUTTON_1_PRESSED 0x04 ( PORT1_IN & BUTTON_1_MASK ) Drive output pins #define LED_1_MASK #define LED_1_ON #define LED_1_OFF 0x20 ( PORT1_OUT |= LED_1_MASK ) ( PORT1_OUT &= ~(LED_1_MASK) ) if( BUTTON_1_PRESSED ) { LED_1_ON; } else { LED_1_OFF; } Discussion - 1 What does “real time” mean (or, what are the key characteristics of a “real time” system)? there are “mission critical” timing constraints (usually tied to input/output data sampling rates and/or data processing overhead) service latencies are known and fairly tightly bounded are typically “event-driven” require low overhead context switching 179 Discussion - 2 What does “fail safe” mean in the context of embedded software (firmware) development? A fail-safe or fail-secure device is one that, in the event of failure, responds in a way that will cause no harm, or at least a minimum of harm, to other devices or danger to personnel. cite examples of “fail-safe” device behavior cite examples of “non fail-safe” device behavior 180 Application Code - 1 What are some possibilities for organizing embedded application code? polled program-driven “round robin” polling loop advantage: simple! disadvantage: large number of devices big loop large latency 181 Application Code - 2 What are some possibilities for organizing embedded application code? interrupt- (event-) driven sometimes called “event driven” all processing (after initialization) is in response to interrupts may want CPU to “sleep” between interrupts to reduce power consumption 182 Application Code - 3 What are some possibilities for organizing embedded application code? command-driven or “flag”-driven (also referred to as “state machine”) “hybrid” of program-driven and interrupt-driven service routines “activated” based on (ASCII string) commands received alternately, activities of polling loop can be controlled by state of various “flags” set by interrupt service routines (e.g., in response to button presses, time slice expiration, etc.) 183 Application Code - 4 What are some possibilities for organizing embedded application code? real-time OS kernel (timer-interrupt driven) data structure provides list of currently enabled tasks (can be dynamically inserted/deleted) periodic interrupt (RTI) used to determine when tasks rolled in/out can vary relative priority of enabled tasks by changing time slice allocation 184 Dealing With Random Behavior - 1 Possible “random” behaviors digital input values read from a port are “random” – check pull-up (internal/external), most likely inputs are floating (also check for cold solder joints) digital input values read from a port have a consistent (wrong) pattern – check programming of port pins – make sure they are configured as inputs – input may be damaged due to ESD/over-voltage the same value is read from adjacent port pins – check for solder bridges, cold solder joints, or floating adjacent pins 185 Dealing With Random Behavior - 2 Possible “random” behaviors… digital values sent to an output port don’t appear on the pins (port pins are not driven) – check to make sure port pins are programmed to be outputs, and that the “drive” register (if present) is set correctly (some pins can be configured to be open-drain) some output pins are always driven high or always driven low – this is most likely due to a “stuck at” fault resulting from a failure in the pad driver circuit (if there are spare port pins available, fly wire around the problem: otherwise, it’s time to replace the microcontroller) the same value is output on adjacent port pins – check for solder bridges (and possible damage to C) 186 Dealing With Random Behavior - 3 Possible “random” behaviors… analog input values read from the ADC are always zero (or, always the same value) – check ADC programming and device driver (make sure you are waiting for the “conversion complete” flag to be set) analog input values read from the ADC are “random” (or, are inconsistent) – check ADC reference voltages and input pin solder joints (cold joint can act like a capacitor); also, check driver routine to make sure it is handshaking on the “conversion complete” flag the lower two bits (or so) of values read from the ADC are “random” – this is “normal” (typically all the lower two bits are good for is rounding the result!) 187 Dealing With Random Behavior - 4 Possible “random” behaviors… the SCI/SPI is not receiving or transmitting data – most likely a configuration/driver problem (look at Tx line on MSO; when Tx works, loop back to Rx line and check to make sure the same characters your driver is transmitting are being received) the SCI is “alive” (can see waveforms on oscilloscope), but board will not communicate with a PC “com” port or a serial LCD – check baud rate and character frame format of sending/receiving end; check to make sure RS232 level translators generating correct polarity and voltage swing (nominally 9 V); check to make sure side “A” Tx connected to side “B” Rx, and vice-versa 188 Dealing With Random Behavior - 5 Possible “random” behaviors… applications run on the processor for a few seconds, and then “crash” – may have random interrupts that are not implemented or handled correctly, stack may be overflowing (“creep” due to software error) microcontroller gets too warm for comfort – pins programmed as outputs are “fighting”, input signals not at supply rail potential (weak 1’s), or may be drawing too much current from port pin (source/sink) 189 Clicker Quiz 190 Q1. The code organization used in Labs 7-10 can best be categorized as: A. polled program-driven B. interrupt-driven (event-driven) C. flag-driven (state machine) D. real-time OS kernel (timer-interrupt driven) E. none of the above 191 Q2. When running the ADC in 10-bit mode with the analog input connected to a fixed voltage source, the lower two bits keep changing on successive samples. This is most likely… A. due to a programming error B. due to a power supply issue C. due to a “stuck at” fault (bad pad driver) D. what should be expected (i.e., normal) E. none of the above 192 Q3. If a logic “1” is constantly output on a pin that is programmed as an input port, this most likely is… A. due to a programming error B. due to a power supply issue C. due to a “stuck at” fault (bad pad driver) D. what should be expected (i.e., normal) E. none of the above 193 Q4. If different values are written to a port but the pins are always “0”, this most likely is… A. due to a programming error B. due to a power supply issue C. due to a “stuck at” fault (bad pad driver) D. what should be expected (i.e., normal) E. none of the above 194 Q5. If the same value is read from adjacent input port pins, this most likely is due to a… A. solder bridge B. cold solder joint C. floating adjacent pin D. all of the above E. none of the above 195 “Avoid Really Stupid Tricks (RST)” - 1 Do NOT solder parts, attach wires, connect probes, etc. while your board is powered up Temporary short circuits can totally fry numerous components on your board Remember that the soldering iron tip is GROUNDED, and that random points tied to ground on your board while it is in operation could be a very bad thing! 196 “Avoid Really Stupid Tricks (RST)” - 2 Do NOT attempt to “probe” the pads of surface mount parts Few have been known to do this successfully Shorts between/among microcontroller pins, regardless of how temporary, can be disastrous This is why your kit has a breadboard header! 197 “Avoid Really Stupid Tricks (RST)” - 3 Do NOT connect port pins directly to power supply rails to obtain a “1” or “0” when debugging (or, in general) Pin might be programmed as an output, at which point its pad driver will be instant toast If pin programmed as an input, might be overbiased and destroy input buffer circuit ALWAYS use a resistor (10K is a good value) as a pull-up or pull-down – ALWAYS To test ADC (analog) inputs, ALWAYS use a potentiometer (10K is a good value) – ALWAYS198 “Avoid Really Stupid Tricks (RST)” - 4 Do NOT attempt to power different parts of your circuit with different (external) power supplies Think about what will happen to your board/parts if two essentially infinite current sources are trying to drive (even slightly) different voltages on the same net/trace… Then, look for “burn marks” on fellow students Use a SINGLE power supply for all logic components (including the microcontroller module) 199 “Avoid Really Stupid Tricks (RST)” - 5 Do NOT power your project using the USB BDM interface (in dialog box, uncheck the “supply power to target” option) Look no further than the “dead” PC in lab with blown out USB interface module… 200