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Published in IET Power Electronics
Received on 11th June 2013
Revised on 21st July 2013
Accepted on 17th August 2013
doi: 10.1049/iet-pel.2013.0455
ISSN 1755-4535
Analysis, design and implementation of an improved
two-switch zero-current zero-voltage pulse-width
modulation forward converter
Karim Soltanzadeh1, Majid Dehghani1, Hosein Khalilian2
1
Department of Electrical Engineering, Najafabad Branch, Islamic Azad University, Najafabad, Iran
Department of Electrical Engineering, Tabriz National University, Tabriz, Iran
E-mail: k.soltanzadeh@yahoo.com
2
Abstract: In this study, an improved two-switch zero-current zero-voltage switching pulse-width modulation (ZCZVS-PWM)
forward converter, which employs a simple resonant lossless snubber circuit, is introduced. A simple resonant snubber circuit
consists of a capacitor, an inductor and two diodes. In proposed converter, switch Q1 operates under exactly zero-current
switching at turn-on, and exactly zero-voltage switching (ZVS) at turn-off, and switch Q2 operates under exactly ZCZVS at
turn-on, and ZVS at turn-off, and the all-passive semiconductor devices operate under soft-switching at turn-on and turn-off.
The proposed converter has no current and voltage spikes in the switches in comparison with the hard-switching forward
converter counterpart and is suitable for high switching frequency and high-power operation. The proposed converter is
analysed and various operating modes of the improved two-switch ZCZVS-PWM forward converter are discussed. Analysis
and design considerations are presented and the prototype experimental results of a 160 W (32 V/5 A) proposed converter
operating at 300 kHz switching frequency, confirm the validity of theoretical analysis.
1
Introduction
Pulse-width-modulated (PWM) forward converter is used in the
industry in a wide variety of applications. This converter is
required to operate with high switching frequency because of
demands for small converter size and high-power density.
High switching frequency operation, however, results in
higher switching losses, increased electromagnetic interference
(EMI) and reduced converter efficiency. In the classical
configuration of the forward converter uses a tertiary winding
for core reset [1, 2], and a disadvantage of the reset winding
is that the transformer leakage inductance discharge spike
cannot be put off. The leakage spike sums up with the
voltage induced by the reset winding and causes a
high-voltage spike across the active switch. In [3], a resistorcapacitor-diode (RCD) clamp circuit was proposed for the
forward converter transformer reset. The RCD snubber is
simple, but the power stored in snubber capacitor dissipates
on the resistor and the switch turns off at hard-switching, thus
the overall efficiency of converter is still low. In order to
decrease the switching losses and absorb the voltage spikes
while reducing the converter losses, active snubber and
clamps are applied to dc–dc forward converters [4–19].
Almost all these techniques achieve soft-switching
condition in the switch using an active auxiliary circuit.
Resonant forward converters have been presented in [4–7]
to reduce switching losses and increase system efficiency.
However, the voltage stress in resonant converters is high
for high-input voltage applications. The high-voltage or
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current stress on semiconductors will increase conduction
losses.
The forward converters with the zero-voltage switching
(ZVS) technique have been presented in [8–12]. However,
the main drawbacks of these schemes are the complex
control approach and too many power switches in the circuit.
In [13, 14] active clamp, ZVS forward converters providing
ZVS condition for the converter switch were presented. In the
active clamp technique, the soft-switching condition is load
dependent and soft-switching condition is lost under light
load condition.
In [15–17], zero-current switching (ZCS) forward
converter is introduced. In [15], an extra winding is
required to reset the transformer core just like the regular
forward converter. In [16, 17], an auxiliary circuit on the
secondary side of transformer is required. However, this
auxiliary circuit is complex. In [18, 19], conventional reset
winding in switching transformer were removed, but these
converters must operate at frequency modulation and output
filter is not optimum.
The aim of this paper is to introduce a simple snubber cell
for dc/dc PWM two-switch forward converter. The proposed
improved two-switch zero-current zero-voltage switching
pulse-width modulation (ZCZVS-PWM) forward converter
is depicted in Fig. 1. The ZCZVS technique in this paper is
provided by a snubber cell. The snubber cell consists of a
resonant inductor Lr, a resonant capacitor Cr and two diodes
Dr and D. The switch Q1 in the proposed converter is
turned ON under ZCS, and Q2 is turned ON under ZCZVS,
IET Power Electron., 2014, Vol. 7, Iss. 4, pp. 1016–1023
doi: 10.1049/iet-pel.2013.0455
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Fig. 1 Proposed two-switch ZCZVS-PWM forward converter
and both switches are turned off under ZVS condition without
voltage spikes.
To simplify the steady-state analysis of the circuit given in
Fig. 1 during one-switching cycle, it is assumed that input and
output voltages and output current are constant, and
semiconductor devices and resonant circuit are ideal.
Section 2 presents the principle of circuit operation and
analysis of the proposed converter. The converter design
procedure is given in Section 3. In Section 4, experimental
results for a 160 W (32 V/5 A) proposed converter operating
at 300 KHz switching frequency are given. Finally, in
Section 5, the conclusions and discussions are presented.
2
Operation principles and analysis
Seven stages occur within one-switching cycle in the
steady-state operation of the proposed converter. The main
theoretical waveforms of the proposed forward converter
are shown in Fig. 2. The equivalent circuit schemes of these
operation stages are given in Figs. 3a–g, respectively. At
earlier moment of t = t0, the equations vCr (t) = Vs and
iLr (t) = iLd (t) = 0 are valid.
Stage 1 [t0, t1: Fig. 3a]: At the beginning of this stage, the
switches Q1 and Q2 are off and the free-wheeling diode D2 is
in the on state and conducts the load current Io. At t = t0, both
the switches Q1 and Q2 are turned on by an external gate
driver circuit, and Q1 turns on under exactly ZCS through
leakage inductor Ld, and Q2 turns on under exactly ZCZVS.
The clamping diodes Dm1 and Dm2 are reverse biased and
hence their currents iDm1 (t) and iDm2 (t) are zero. Since
vCr (t) = Vs , the diode Dr turns on under ZVZCS at t = t0, and
the resonance between Cr and Lr occurs, and resonant
capacitor Cr begins to discharge on the resonant inductor Lr
and iLr (t) increases. The voltage across the leakage inductance
is Vs. The current through the leakage inductance and rectifier
diode D1 rises and the iD2 (t) falls from Io to zero at t = t1 given by
iLd (t) = iQ2 (t) =
Vs
(t − t0 )
Ld
nV
iD1 (t) = s (t − t0 )
Ld
iD2 (t) = Io −
nVs
(t − t0 )
Ld
(1)
voltage vCr (t) can be written as follows in this interval.
Vs
sin vr (t − t0 )
Zr
(4)
vCr (t) = Vs cos vr (t − t0 )
(5)
iLr (t) =
where the characteristic impedance Zr is
Lr
Zr =
Cr
(6)
and the resonant frequency ωr is given by
vr = 1/ Lr Cr
(7)
(2)
So the current through the switch Q1 is
(3)
The resonant inductance current iLr (t) and the resonant capacitor
IET Power Electron., 2014, Vol. 7, Iss. 4, pp. 1016–1023
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Fig. 2 Theoretical waveforms
iQ1 (t) =
Vs
V
(t − t0 ) + s sin vr (t − t0 )
Ld
Zr
(8)
At t = t1, the current through the switch Q2 reaches Io/n and the
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Fig. 3 Equivalent circuit schemes of the operation stages in the proposed converter
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doi: 10.1049/iet-pel.2013.0455
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free-wheeling diode D2 turns off with almost ZCZVS and this
stage finishes. The duration of this time interval is
Dt1 = t1 − t0 =
Io L d
nVs
VCr (t1 )
Zr
sin vr (t − t1 ) + iLr (t1 ) cos vr (t − t1 )
(10)
vCr (t) = VCr (t1 ) cos vr (t − t1 ) − iLr (t1 ) Zr sin vr (t − t1 ) (11)
iQ1 (t) =
Io
+ iLr (t)
n
(12)
Dtx1 = tx1 − t1 =
VCr (t1 )
1
tan−1
Zr ILr (t1 )
vr
Dt3 = DTs − Dt2 − Dt1
At t = t2, vCr (t) reaches to − Vs and the resonant inductor current
iLr (t) decreases from its peak value Vs/Zr, and falls to zero, and
then resonant diode Dr turns off under exactly ZVZCS. The
resonant currents iLr (t), iQ1 (t) and the resonant voltage vCr (t)
are given as
V
iLr (t) = s cos vr (t − tx1 )
Zr
(14)
vCr (t) = −Vs sin vr (t − tx1 )
(15)
iQ1 (t) =
Io
+ iLr (t)
n
(16)
Dt2 = t2 − t1 = Dtx1 + Dtx2 =
p
− Dt1
vr
iLr (t) = iDr (t) = 0
IET Power Electron., 2014, Vol. 7, Iss. 4, pp. 1016–1023
doi: 10.1049/iet-pel.2013.0455
(19)
(23)
nVs Cr
Io
(24)
Stage 5 [t4, t5:Fig. 3e ]: At t = t4, the diode D2 starts to
conduct and the resonance between leakage inductance Ld
and capacitor Cr begins. During this stage, the current iLd (t)
decreases from its peak value and charges vCr (t) from zero.
The resonant current starts the power rectifiers
commutation, so that D1 current drops while D2 current
rises. The resonant currents iLd (t)and resonant voltage vCr (t)
are given as
ILd (t) =
Io
cos vd (t − t4 )
n
(25)
vCr (t) =
Io
sin vd (t − t4 )
nZd
(26)
where
Ld
Zd =
Cr
(18)
Stage 3[t2, t3:Fig. 3c]: This stage is on state of the
conventional two-switch PWM forward converter and
power transfer process occurs from source to load. During
this stage, the voltage across the leakage inductance is Vs
and it is linearly charged by the input voltage source. The
currents iLr (t), iQ1 (t), iQ2 (t) and resonant voltage vCr (t) are
given as
Io
(t − t3 ) − Vs
nCr
Dt4 = t4 − t3 =
(17)
At t = t2 , iQ1 (t) = Io /nand this stage finishes. The time interval
of this stage is given as
(22)
This stage ends at time t = t4, when the voltage across resonant
capacitor Cr is discharged by reflected load current
completely and falls to zero, and allowing diode D2 starts to
conduct. The time interval of this stage is as
The time interval Δtx2 is
p
Dtx2 = t2 − tx1 =
2.vr
(21)
where D is the duty cycle of control signal and Ts = 1/fs is the
switching period. fs is the switching frequency.
Stage 4 [t3, t4:Fig. 3d ]: Since the resonant capacitor Cr is
precharged to − Vs from stage 2, the power switches Q1 and
Q2 turn-off under ZVS condition at t = t3, then reflected load
current Io/n forces the snubber diode D on. During this stage,
the voltage across Cr is discharged by reflected load current
and the energy stored in Cr is released to the load side.
Negative voltage across Cr keeps the diode D1 on. As the
voltage across Cr decreases, the voltage across the switches
increases. The resonant capacitor voltage vCr (t) for this
interval is derived as
vCr (t) =
(13)
(20)
At t = t3, the switches Q1 and Q2 turn-off under ZVS
condition because of capacitor charge, and resonant diode
D turns on under ZVS and this stage finishes. The time
interval Δt3 of this stage is written as
The time interval Δtx1 is
Io
n
vCr (t) = −Vs
(9)
Stage 2 [t1, t2:Fig. 3b]: During this stage, the switches Q1, Q2
and diodes D1, Dr are on, and another diodes are off. The
voltage across the leakage inductance is Vs and the leakage
inductance is linearly charged by the input voltage source.
The switch current iQ2 (t)equals Io/n and iD1 (t) = Io . At t = t1
the resonance between Cr and Lr continues in stage 1, and the
resonant capacitor voltage vCr (t) decreases and iLr (t) increases
fastly. At t = tx1, vCr (t) falls to zero and iLr (t) reaches to its
peak value Vs/Zr. The resonant currents iLr (t), iQ1(t) and the
resonant voltage vCr (t) are given as
iLr (t) =
iQ1 (t) = iQ2 (t) =
(27)
and
1
vd = Ld Cr
(28)
This stage ends at time t = t5 when the voltage across each
switch and vCr (t) equals Vs thus turning on the clamping
diodes Dm1 and Dm1 under ZVZCS and snubber diode D
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turns OFF under exactly ZVZCS. The time interval of this
stage is as
Dt5 =
1
arcsin
vd
nVs Zd
Io
(30)
nV
ID1 (t) = niDm1 (t) = − s (t − t5 ) + nILd (t5 )
Ld
(31)
Vs
(33)
DC voltage transfer function
Referring to the voltage waveform of the output inductor in
Fig. 2 and applying volt–second balance, we have
Vs
−V
n
IQ
2(max )
=
Io(max )
n
(38)
The maximum reverse voltages across the power diodes D1
and D2 are almost the same as a standard hard-switching
forward converter design and given by
D1 (max )′
=V
D2 (max )′
=
Vs
n
(39)
The maximum value of the currents through the power diodes
is
(40)
Design the snubber parameters
3.3.1 Snubber capacitor: The snubber capacitor is
designed to control dv/dt of the drain-to-source voltage of
the power switches. When the main switches turn-off, it
provides an alternative path for the leakage inductance
current to reduce switching turning-off losses and dv/dt
EMI noises. High-frequency response capacitor with low
equivalent series resistance is required. The capacitor Cr
in proposed converter is mainly responsible for ZVS
turn-off of power switches. Thus, the discharging time of
Cr should be larger than the fall time of the switch to
ensure proper ZVS turn-off of the switch. During stage 4,
the switches Q1 and Q2 turn-off and the current Io/n flows
through snubber diode D to discharge Cr to leakage
inductance. During this stage, capacitor discharges
linearly. Thus Δt4 = tZVS is time that Cr discharges
completely from the value −Vs to zero. To ensure
proposed ZVS turn-off of the switches, discharge time
tZVS is taken to be approximately three-times the fall time
tf of switches. The snubber capacitor is derived as
Cr =
(Dt1 + Dt2 + Dt3 )
Io( max )
(3t )
nVs( min ) f
(41)
o
(Vo )(Dt4 + Dt5 + Dt6 + Dt7 )
(34)
Assuming that the time duration of stages 1 and 4 is very
small in comparison with those of stages 2, 3, 5, 6 and 7,
the dc voltage transfer function is approximately
V
D
M= o s
Vs
n
3.2
During stage 2, the maximum value of the current through the
power switch Q2 is
3.3
3 Design two-switch ZCZVS-PWM forward
procedure
(37)
(32)
Stage 7 [t6, t7:Fig. 3g ]: This stage at t = t6 starts when the
current of free-wheeling diode iD2 (t)arrives to the load
current Io. This stage is off-state of the conventional
PWM forward converter. At t = t7, one-switching cycle is
completed and another switching cycle begins.
3.1
Io(max ) Vs
+
n
Zr
ID1 (max ) = ID2 (max ) = Io(max )
This stage ends at time t = t6 when iD2 (t) arrives to load
current Io, and diodes D1, Dm1 and Dm1 turn of under
ZVZCS condition. The time interval of this stage is as
ILd (t5 )Ld
1
V
V
ILd (t) = iDm1 (t) = iDm2 (t) = − s (t − t5 ) + ILd (t5 )
Ld
nV
ID2 (t) = Io − niDm1 (t) = Io + s (t − t5 ) − nILd (t5 )
Ld
IQ (max ) =
(29)
Stage 6 [t5, t6:Fig. 3f ]: At t = t5, the clamping diodes Dm1
and Dm1 turn-on and transformer starts with the beginning
of reset and iLd (t) decreases. During this stage, the voltage
across each switch and vCr (t) equals Vs, the current of
free-wheeling diode iD2 (t) rises and the current of
rectifier diode iD1 (t) falls simultaneously and linearly.
The currents iLd (t), iDm1 (t), iDm2 (t), iD1 (t) and iD2 (t) are
given as
Dt6 = t6 − t5 =
During stage 2, the maximum value of the current through the
power switch Q1 is
=V
Q2 (max )
= Vs
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1
(2pfr )2 .Cr
(42)
3.3.3 Snubber diodes: During stage 1, the maximum
value of the current through the snubber diode Dr is
During stage 4, the maximum off-state voltage appearing
across power switches is almost the same as a standard
hard-switching two-switch forward converter design and
given by
Q1 (max )
Lr =
(35)
Design power switches and power diodes
V
3.3.2 Snubber inductor: In order to minimise the
influence of the resonant parameters and to easily achieve
ZVS turning-OFF for power switch, we selected fs/fr = 0.14.
Thus, we can obtain the resonant inductor Lr as follows
(36)
Vs (max )
Zr
The maximum reverse voltage across the Dr is
ID (max ) =
(43)
VD (max ) = Vs(max )
(44)
r
r
IET Power Electron., 2014, Vol. 7, Iss. 4, pp. 1016–1023
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During stage 4, the maximum value of the current through the
snubber diode D is
ID (max ) =
Io(max )
n
output filter can be selected using the traditional
hard-switching forward converter design method [20] as
follows
(45)
n=
The maximum reverse voltage across the D is
VD(max ) = Vs(min )
4
(46)
Experimental result
The ZVZCS PWM forward converter is designed for the
following specifications:
†
†
†
†
†
†
Maximum output power: Po = 160 W;
Output voltage: Vo = 32 VDC;
Maximum input voltage: Vs = 180 VDC;
Minimum input voltage: Vs = 120 VDC;
Nominal input voltage: Vs = 150 VDC;
Switching frequency = fs = 300 kHz.
4.1
Design transformer and output filter
Although the lossless snubber cell is present in the two-switch
PWM forward converter, the transformer turns ratio and
n1 hVs(min ) Dmax
=
= 1.62
n2
V◦
where η is the efficiency of converter, and we assumed that
η = 0.9. Dmax is the maximum value of the duty cycle and
Dmax = 0.48 is selected with reference to [21]. Ferrite EE30
core is selected as a core of power transformer.
The filter inductance Lf and filter Cf capacitor are designed
like a regular PWM forward converter. Voltage output ripple
and current output ripple must not exceed 1 and 20%,
respectively.
LF .
.
Vo (1 − D)
DILF .f
1−D
,
DV
8.LF . o .f 2
Vo
LF = 150 mH,
CF
CF = 4.7 mF
Using the design procedure discussed in the previous section,
the following components were selected:
† Power switches Q1 and Q2: IRF640;
† Power diodes D1 and D2: HER605;
Fig. 4 Complete circuit of the implemented prototype
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Fig. 5 Voltage and current of the switch Q1, vQ1(t) = 100 V/div,
iQ1(t) = 5 A/div, VGS(t) = 20 V/div, time:0.5 μs/div
Fig. 6 Voltage and current of the switch Q1, vQ2(t) = 100 V/div,
iQ2(t) = 5 A/div, VGS(t) = 20 V/div, time:0.5 μs/div
† Snubber diodes Dr and D: HER604;
† Output inductor LF = 150 μH: ferrite EI28 core/60 turns/2
mm air gap length;
† Snubber capacitor Cr = 1 nF/250 V;
† Snubber inductor Lr = 6 μH, ferrite EE10 core/10turns/0.1
mm air gap length.
† Filter capacitor CF = 4.7 μF/60 V.
Fig. 8 Leakage inductance current and voltage across resonance
capacitor, vCr ( t): 100 V/div, iLd ( t): 3 A/div, time:0.5 μ/div
Fig. 9 Current of diode D and voltage across resonance capacitor,
vCr ( t): 100 V/div, iD(t): 2 A/div, time:0.5 μ/div
PWM controller is applied to HIP2500. TL494 used for
control output voltage, and produces PWM pulse signal.
The HIP2500 is high-voltage, high-speed power MOSFET
driver with independent high- and low-side referenced
output channels. The output pulse of HO pin of HIP2500 is
applied to gate of switch Q2 and LO pin is applied to gate
of switch Q1.
The complete prototype circuit diagram of the proposed
converter is shown in Fig. 4.
The control system implemented by two main IC and they
are TL494 and HIP2500. The output pulse of the TL494
Fig. 7 Resonant inductance current and voltage across resonance
capacitor, vCr ( t): 100 V/div, iLr ( t): 2 A/div, time:0.5 μ/div
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Fig. 10 Efficiency of the proposed converter (continuous line) and
hard-switching counterpart (broken line) against output power
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Figs. 5–9 have shown some obtained experimental results
of the prototype proposed converter. It can be seen that the
experimental waveforms are closed to theoretical waveform,
and confirming the soft-switching without voltage and
current spikes. Fig. 5 has shown voltage and current of the
switch Q1, and Fig. 6 has shown voltage and current of the
switch Q2.
In Figs. 5 and 6, it can be noticed that Q1 and Q2 operate in
ZCS and ZCZVS turn-on, and both of them operate in ZVS
turn-off, and it can also be noticed that they do not have
any voltage and current spikes in switching state.
Fig. 7 has shown voltage across resonant capacitor vCr (t)
and resonant inductance current iLr (t); Fig. 8 has shown
voltage across resonant capacitor vCr (t) and the leakage
inductance current iLd (t); and Fig. 9 has shown
voltage across resonant capacitor vCr (t) and the diode D
current iD(t).
The efficiency curve of the proposed converter against
output power is shown in Fig. 10. Note that the proposed
converter has 91% efficiency in full load, and also has high
efficiency in light load.
5
Conclusion
In this paper, an improved two-switchZCZVS-PWM
forward converter that employs a simple snubber circuit
that overcomes most of the drawbacks of the normal
PWM forward converter is proposed. In the proposed
converter, the switches Q1 and Q2 operate at ZCS and
ZCZVS turn-on respectively and both of them operate at
ZVS turn-off, and the all-passive semiconductor devices
operate at soft-switching turn-on and turn-off. This new
converter has no additional current and voltage spikes of
the main switches, and it is suitable for high switching
frequency and high-power operation. A PWM ZCZVS
two-switch forward converter has been analysed in detail.
The predicted operation principles and theoretical analysis
of this converter have been exactly verified with
experimental results of a 160 W and 300 KHz proposed
converter.
6
References
1 Batarseh, I.: ‘Power electronic circuits’ (John Wiley & Sons, Inc.,
Hoboken, NJ, 2004)
IET Power Electron., 2014, Vol. 7, Iss. 4, pp. 1016–1023
doi: 10.1049/iet-pel.2013.0455
2 Mohan, N., Undeland, T.M., Robbins, W.P.: ‘Power electronics:
converters, applications and design’ (John Wiley & Sons, Inc.,
Hoboken, NJ, 2003, 3rd edn.)
3 Bridge, C.D.: ‘Clamp voltage analysis for RCD forward converters’.
Proc. IEEE APEC, 2000, pp. 959–965
4 Smith, T.A., Dimitrijev, S.: ‘Analysis of a multiresonant forward
converter based on nonideal coupling of the transformer’, IEEE Trans.
Power Electron., 2000, 15, (1), pp. 111–120
5 Farrington, R., Jovanovic, M.M., Lee, F.C.: ‘Constant frequency
zero-voltage-switched multi-resonant converters: analysis, design and
experimental results’. Proc. IEEE PESC Conf., 1990, pp. 197–205
6 Gonzalez, R., Nuno, F., Lopera, J.M., Diaz, J.: ‘A practical
implementation of a two fully regulated outputs converter’. Proc.
IEEE CIEP Conf., 1993, pp. 71–77
7 Tabisz, W.A., Jovanic, M.M., Lee, F.C.: ‘High-frequency multiresonant
converter technology and its applications’. Proc. PEVSD Conf., 1991,
pp. 1–8
8 Lin, B.-R., Tseng, C.-H.: ‘Analysis of parallel-connected asymmetrical
soft-switching converter’, IEEE Trans. Ind. Electron., 2007, 54, (3),
pp. 1642–1653
9 Lin, B.-R., Chiang, H.-K.: ‘Analysis and implementation of a soft
switching interleaved forward converter with current doubler rectifier’,
IET Proc. Electr. Power Appl., 2007, 1, (5), pp. 697–704
10 Lin, B.-R., Huang, C.-L., Shih, K.-L.: ‘Implementation of a ZVS
interleaved converter with two transformers’, IET Power Electron.,
2009, 2, (5), pp. 614–623
11 Torrico-Bascop, R., Barbi, I.: ‘A double ZVS-PWM activeclamping
forward converter: analysis, design, and experimentation’, IEEE
Trans. Power Electron., 2001, 16, (6), pp. 745–751
12 Lo, Y.-K., Kao, T.-S., Lin, J.-Y.: ‘Analysis and design of an interleaved
active-clamping forward converter’, IEEE Trans. Ind. Electron., 2007,
54, (4), pp. 2323–2332
13 Yang, S., Qian, Z., Ouyang, Q., Peng, F.Z.: ‘An improved active-clamp
ZVS forward converter circuit’. in Proc. 23rd Annu. IEEE Appl. Power
Electron. Conf. (APEC), Austin, TX, 24–28 February, 2008,
pp. 318–322
14 Lo, Y.K., Kao, T.S., Lin, J.Y.: ‘Analysis and design of an interleaved
active-clamping forward converter’, IEEE Trans. Ind. Electron., 2007,
54, (4), pp. 2323–2332
15 Adib, E., Farzanehfard, H.: ‘Family of zero-current transition PWM
converters’, IEEE Trans. Ind. Electron., 2008, 55, (8), pp. 3055–3063
16 Adib, E., Farzanehfard, H.: ‘Family of isolated zero-current transition
PWM converters’, J. Power Electron., 2009, 9, (2), pp. 156–162
17 Adib, E., Farzanehfard, H.: ‘Analysis and design of a zero-current
switching forward converter with simple auxiliary circuit’, IEEE
Trans. Power Electron., 2012, 27, (1), pp. 144–150
18 Cobos, J.A., Garcia, O., Sebastian, J., Uceda, J.: ‘Resonant reset forward
topologies for low output voltage on board converters’. Proc. IEEE
APEC’94, 1994, pp. 703–708
19 Xi, Y., Jain, P.K.: ‘A forward converter topology employing a resonant
auxiliary circuit to achieve soft switching and power transformer
resetting’, IEEE Trans. Ind. Electron., 2003, 50, (1), pp. 132–140
20 Kazimierczuk, M.K.: ‘Pulse-width modulated DC–DC power
converters’ (John Wiley and Sons, New York, 2008)
21 Pressman, A.I.: ‘Switching power supply design’ (McGraw-Hill,
New York, 1998, 2nd edn.)
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& The Institution of Engineering and Technology 2014