©James Buckwalter 1

• For very large input signals, the output waveform is driven into the "saturation" region (bipolar) or
"linear" region (FET) - and becomes limited by the on-resistance of the device.
• Waveform behavior is determined by harmonic terminations. Theory is not simple.
• The amplifier goes into compression (gain drops but not precipitously) and can still get good efficiency.
©James Buckwalter 2

• Underlying assumption: simple model of transistor
• Transistor acts like current source, with Iout a linear replica of vin, except for limitations of cutoff when vin<vth
=> For sinewave input, output current is a sinewave, possibly with clipping
Iout
Imax vin iout
Vout
©James Buckwalter 3

• Transistor acts like current source, with Iout a linear replica of vin, except for limitations of cutoff when vin<vth
• When Vout gets low enough, transistor acts like voltage source
Iout
Imax vin vout
Vout
©James Buckwalter 4

Vds
Vo
Id
Iave
Iout
Imax
Vo Harmonics are shorted match match
RL
Vmin Vo Vmax
Vout time
Irf time
Must be sinusoidal
Vdc fixed
Vds(t) is fixed!!
Ids(t) must change

• If output voltage “tries” to go below zero the voltage waveform becomes progressively more like a square wave
• The current is mostly zero when the voltage is nonzero. The load line is traversed only during transitions
Iout
Imax
Vce
Vo
• Overdriven Class F amplifiers approach switching mode operation
Vmin Vo Vmax
Vout
Vrf time
©James Buckwalter 7

©James Buckwalter 8

Waveform Engineering Spreadsheet
Model transistor as current source with constant gm, together with saturation
Input is a sinewave of voltage with specified bias point
Class A, Class AB, etc)
(can set
Specify output voltage in terms of fundamental and harmonics of voltage
Spreadsheet calculates actual current, taking into account saturation:
Iout= Ioutnom / (1+exp(Vth-Vin/Vsat)) smooth clipping this provides
Spreadsheet computes what impedances Z1, Z2, Z3 would have to be to create the voltage waveform assumed
For this to be a valid amplifier, you should
1) Check that the impedances have positive real part.
2) Check that the voltage waveform is positive only (otherwise adjust voltage dc bias)

Iout
Vt1 Vt2
Vin
Irf
Vsin is centered around zero
You specify Vt to control conduction angle

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
-1 V
1 V
0 V
0.00001 V
Vdc
Vfund
V2nd
V3rd
Magnitude
1.02
1
0
0
Angle
Summary of Calculated Results
Pout 0.499997685 W
Efficiency 49.01938092 %
Zfund Re
Zfund Im
1 ohm
-9.42328E-06 ohm
Vdc
Idc
1.02 V
1 A
Z2nd Re -1.019770476 ohm
Z2nd Im -0.020825224 ohm
V
0 V
0 V
0 V
Pdc
Pdiss
1.02 W
0.520001157 W
Inefficiency 50.98050562
Z3rd Re
Z3rd Im
-1.019484315 ohm
-0.031804559 ohm
Waveforms of Transistor Voltage(blue) and Current (black)
2.5
2
1.5
1
0.5
0
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)
Fundamental Voltage (blue) & Current 2nd Harmonic Voltage (blue) &

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
0 V
1 V
0 V
0.00001 V
Vdc
Vfund
V2nd
V3rd
Magnitude
1.02
1
0
0
Angle
V
0 V
0 V
0 V
Summary of Calculated Results
Pout 0.249998843 W
Efficiency 77.19562923 %
Zfund Re
Zfund Im
2 ohm
-1.03328E-05 ohm
Vdc
Idc
Z2nd Re
Z2nd Im
1.02 V
0.317501013 A
2.20819E-05 ohm
2.22897E-07 ohm
Pdc
Pdiss
0.323851033 W
0.073851612 W
Inefficiency 22.80419208
Z3rd Re
Z3rd Im
-22.08967468 ohm
-4.248460907 ohm
Waveforms of Transistor Voltage(blue) and Current (black)
2.5
2
1.5
1
0.5
0
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
0 V
1 V
0 V
0.00001 V
Vdc
Vfund
V2nd
V3rd
Magnitude
0.99
1
0
0
Angle
V
0 V
0 V
0 V
Summary of Calculated Results
Pout #NUM!
W
Efficiency #NUM!
%
Zfund Re
Zfund Im
#NUM!
#NUM!
ohm ohm
Vdc
Idc
Z2nd Re
Z2nd Im
0.99 V
#NUM!
A
#NUM!
#NUM!
ohm ohm
Pdc
Pdiss
Inefficiency
Z3rd Re
Z3rd Im
#NUM!
#NUM!
#NUM!
#NUM!
#NUM!
W
W ohm ohm
Waveforms of Transistor Voltage(blue) and Current (black)
2.5
2
1.5
1
0.5
0
-0.5
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
0 V
1 V
0 V
0.00001 V
Vdc
Vfund
V2nd
V3rd
Summary of Calculated Results
Pout 0.236109996 W
Efficiency 64.80581827 %
Vdc
Idc
Magnitude
1.2
1
0
0.2
Angle
V
0 V
0 V
0 V
1.2 V
0.303612137 A
Pdc
Pdiss
0.364334564 W
0.131001798 W
Inefficiency 35.95645605
Zfund Re
Zfund Im
2.117647199 ohm
-1.32273E-05 ohm
Z2nd Re
Z2nd Im
2.98575E-05 ohm
1.00874E-07 ohm
Z3rd Re
Z3rd Im
-7.199979614 ohm
-0.000223847 ohm
Waveforms of Transistor Voltage(blue) and Current (black)
3
2.5
2
1.5
1
0.5
0
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
0 V
1 V
0 V
0.00001 V
Vdc
Vfund
V2nd
V3rd
Magnitude
0.9
1
0
-0.2
Angle
V
0 V
0 V
0 V
Summary of Calculated Results
Pout 0.249998846 W
Efficiency 87.48838106 %
Zfund Re
Zfund Im
2.000000029 ohm
-9.21318E-06 ohm
Vdc
Idc
Z2nd Re
Z2nd Im
0.9 V
0.317501013 A
1.94839E-05 ohm
3.57976E-07 ohm
Pdc
Pdiss
0.285750911 W
0.035751486 W
Inefficiency 12.51141644
Z3rd Re
Z3rd Im
167628.8141 ohm
-950463.012 ohm
Waveforms of Transistor Voltage(blue) and Current (black)
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
0 V
1 V
0 V
0.00001 V
Summary of Calculated Results
Pout 0.249998843 W
Efficiency 100.9482204 %
Zfund Re
Zfund Im
2 ohm
-5.32327E-06 ohm
Vdc
Vfund
V2nd
V3rd
Magnitude
0.78
1
0.3
0
Angle
Vdc
Idc
0.779999306 V
0.317501013 A
Z2nd Re -1.402955043 ohm
Z2nd Im 5.21996E-06 ohm
V
0 V
-45 V
0 V
Pdc
Pdiss
0.247650569 W
0.029726209 W
Inefficiency 12.00328721
Z3rd Re
Z3rd Im
-10.43286793 ohm
-2.192618628 ohm
Waveforms of Transistor Voltage(blue) and Current (black)
2.5
2
1.5
1
0.5
0
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)

Power Amplifier Waveforms
Inspired by Steve Cripps Rev 1: Still being checked out, user beware!!!
Input Parameters
Imax
Vth
Vin
Vknee
Vsat
1 A
0 V
1 V
0 V
0.00001 V
Vdc
Vfund
V2nd
V3rd
Summary of Calculated Results
Pout 0.185785124 W
Efficiency 78.01991319 %
Vdc
Idc
Magnitude
0.75
1
0.3
0
Angle
V
42 V
0 V
0 V
0.749998439 V
0.317501013 A
Pdc
Pdiss
0.238125264 W
0.052340198 W
Inefficiency 21.98011131
Zfund Re
Zfund Im
1.486287875 ohm
1.338262352 ohm
Z2nd Re 1.94481E-06 ohm
Z2nd Im -1.402965471 ohm
Z3rd Re
Z3rd Im
-1.786400741 ohm
-0.364870102 ohm
Waveforms of Transistor Voltage(blue) and Current (black)
2.5
2
1.5
1
0.5
0
0 45 90 135 180 225 270 315 360 405 450 495 540 585 630 675 720 765 angle (degrees)

Class J Amplifier
New designation introduced by
Steve Cripps
V
DD
Amplifier design is very straightforward corresponds to what many designers do without knowing it!
Class L - Lazy man's amplifier?
Input matching network C ds
L s
R
L
The harmonic matching is provided by the device output capacitance only => external matching is only done for the fundamental
For many traditional transistors,
Cds provides a short to all harmonics => class AB, B, etc.
For some modern transistors,
Cds is low (good!). Then should change the fundamental match to optimize efficiency!

Class J Amplifier
If Cds is not very large, 2 nd harmonic is not shorted.
Use 2 nd harmonic to achieve voltage waveform with flat bottom

Higher efficiency Input matching network
V
DD
L s
C ds
R
L
Best efficiency but requires Z2f with negative real part!!

Class J Amplifier
If Cds is not very large, 2 nd harmonic is not shorted.
Use 2 nd harmonic to achieve voltage waveform with flat bottom

Higher efficiency Input matching network
V
DD
L s
C ds
R
L
Best efficiency but requires Z2f with negative real part!!
Good efficiency and realizable. Use Zf inductive.

Class J Amplifier Characteristics
Fundamental impedance: RL + j X1, with X1~RL
2 nd Harmonic impedance: j X2, with X2~ RL
3 rd Harmonic impedance: j X3 ~ 2/3 RL
Ideal Efficiency ~ similar to Class B peaks at ~ 78-80 %

Formal Class J Characteristics
For I( q
) = cos q (-p/2<q<p/2, 0 otherwise)
V(dc) = 1
Vfund ( q
) ~ cos( q
p
/4)
~ cos q cos p
/4 + sin q sin p
/4
~ cos q
+ sin q
V2fo
(q) ~ sin 2 q
~ cos q sin q
Vtotal ( q
) = 1 - cos q
- sin q
+ cos q sin q
Vtotal ( q
) = (1-cos q
)*(1-sin q
)
Note that <Vtotal( q
) > =1 (just like for Class B)
½*Re {fundamental[Vtotal] * fundamental[I]} = ¼ (just like for Class B)
Ideal Efficiency ~ similar to Class B peaks at ~ 78-80 %

characteristics of some of the high efficiency regions
These are leading to new insights for broadband design
For I= cos q (-p/2<q<p/2, 0 otherwise )
V= 1- cos q for class B
V= (1-cos q
)*(1-sin q
) for Class J
V= (1-cos q
)*(1a sin q
) for more general class with same efficiency
Steve Cripps

For I= cos q (-p/2<q<p/2, 0 otherwise )

Broadband Continuous Class F PA Design

Vce
Vo
IC
Iave
IC
Iave
Vce
Vo
Output Waveforms to Optimize Efficiency (1) time time
V(t) is square wave has fundamental + odd harmonics
I(t) is rectified sine wave has fundamental + even harmonics
Power is only at fundamental !
V is minimum when I>0, h is max time
“Dual” solution
Power only at fundamental
V is minimum when I>0 time

Output Waveforms to Optimize Efficiency (2)
Class E
There are plenty of other waveforms that can achieve efficiency
= “100%”
Don’t need square wave for V(t) or I(t).
Need to satisfy V=Z*I, where Z has non-negative real part at all harmonics in order to be realizable.

Simulated Efficiency vs Harmonic Load Reactance
X2=Im(Znet) at 2fo
X3=Im(Znet) at 3fo
Class F -1
Class F
Class F
Class B
Class F -1
Znet
Cds RL
XL(f)
X1=0

Simulated Efficiency vs Harmonic Load Reactance
Class E
X1=RL*0.7

1) Decide on Vdd, and identify power transistor with sufficient power handling capability and breakdown voltage
2) Using dc characteristics, decide on resistive load line. Verify that sufficient Pout can be obtained
3) Determine input impedance and match transistor input - using bias condition of "average dc current corresponding to average output power"
4) Determine load susceptance and match output to obtain RL and
BL
5) Provide output match at harmonic frequencies
6) Set up bias network
7) Optimize using simulator
Steps 2, 3, 4, 5, and 7 can be carried out experimentally with load pull system