Application Note: Improvements for EMC/EMI
EMC/EMI
Recommendations
Hardware improvements for EMC/EMI test
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Table of Contents
1
General Description ............................................................................................................. 3
2
Layout rules on PCB ............................................................................................................ 4
2.1
GND System ........................................................................................................................ 4
2.2
Power supply and Signal Tracks .......................................................................................... 5
2.3
Components ......................................................................................................................... 7
3
Example ............................................................................................................................... 8
4
Summary ............................................................................................................................ 10
5
Copyright ............................................................................................................................ 11
6
Disclaimer .......................................................................................................................... 11
7
Contact Information ............................................................................................................ 11
Revision History
Revision
Date
Owner
Description
1.0
27.08.2013
REI
Init Doc
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1
General Description
This Application Note is explaining how it’s possible to improve the hardware (sensor application) to
have a good chance to pass EMC/EMI tests.
Due the different EMC/EMI specifications it’s hard to specify standard boards or additional
components. Each EMC/EMI specification has different requirements, which has different influence
to the application boards.
The application note is explaining some general recommendations, which are helping to improve
the hardware.
In general there are 4 different kind of coupling are possible on a PCB. Coupling is the mechanisms
by which EMI( electromagnetic interference) is able to travel from the source to the Sensor.
In the end there are different behaviors on the sensor output from small disturbances till a complete
damaged output
The 4 basic coupling mechanisms are conductive, capacitive, magnetic/inductive and radiative
Radiative
Sensor PCB
SOURCE
Capacitive
Inductive
Conductive
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2
Layout rules on PCB
2.1
GND System
For PCB optimization the ground should have the lowest possible impedance and the noise current
in the system ground should be minimized.
There are several options to fulfill this optimization:
1) Using of GND planes on top and bottom side of the device instead of GND tracks.
2) Using of an unbroken GND plane on the second plane.
This GND layer must be free from any signal traces or other gaps longer than 10mm. Any
gap in the ground increases its impedance and introduces slot-antennas.
3) Vias between bottom and top GND.
4) Additional grounding of the sensor ( example picture)
5) Ground fill
Usually not every area on the layer is used for wiring. These unused areas should be filled
with copper and then shall be connected to ground. It is not sufficient to connect this ground
fills just somewhere to the ground plane. These ground fills shall be connected to ground in
a grid at least 10mm.
6) Guard ring on PCB-edges
The intention of the guard ring is that HF-energy , that otherwise would have been emitted
from the PCB-edge, is reflected back into the board where it partially will be absorbed.
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Guard ring example with vias.
7) GND Vias close to capacitors ( e.g. decoupling capacitor)
2.2
Power supply and Signal Tracks
a) Signal Tracks
1) Tracks on the pcb should be as short as possible
2) Put filters on I/O lines near to the connector
3) Place decoupling Capacitors close to the IC
Example with AS5162: C3 is the Out Load capacitor on the sensor PCB. --> filter cap.
Additional there is a place holder ( R2) for an ferrit.
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b) Power Supply
1) Big VDD Track for reducing the DC-resistance
2) Tracks on the PCB should be as short as possible.
3) Place decoupling Capacitors as close as possible to the IC VDD
The connection to the local ground planes has been kept as short as feasible.
VDD
4) Put additional filters RC to VDD
There is a disadvantage on sensors with analog output with the additional R1 filter.
Due the voltage drop over the resistor, there will be a radiometric shift on the output.
In this case it’s better to use a ferrite bead.
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2.3
Components
1) If possible , placement of all components on only one plane
2) Place holder for additional filters.
3) Additional ESD Protection if necessary ( TVS Diode)
3
Signal Routing for Sensors with SPI Output / Ribbon cable
This general routing and setup basics will reduce a possible communication error in the SPI during
an EMC Test.
a) Over long distances the coupling capacitance between the different Signals could be very
big.
With a “wrong” routing (Figure A) there is the possibility that the MISO-Signal is disturbing
the SCK Signal during an EMC Test.
To reduce this issue a simple modification of the routing is enough (Figure 5)
(Figure A)
(Figure B)
Conclusion:
The VSS track has to be between SCK and each other SPI Signal to have an isolation
which reduces the disturbance.
In general it’s mandatory to have the SCK Signal close to the GND Track.
If possible it’s useful to have a GND Tack between each signal.
This kind of isolation is also useful for the PCB routing.
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b) Additional filter close to the driving outputs will reduce the disturbance on a SPI
communication to a minimum. The RC filter will reduce the communication noise as well.
The filters are mandatory on uC and sensor side.
uC side: MOSI; SCK and SS
Sensor side : MISO
4
Example
Bad board layout for EMC/EMI Test ( based on AS5163 sensor)
-No additional filter on VDD
- No additional filter option on the output
- Long tracks
- No Guard ring
- Thin VDD track
- No GND filling
-no via connection between top and bottom GND
- Capacitors far away from the IC
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Improved board layout for EMC/EMI Test( based on a AS5162 Sensor example)
-
Short tracks
-
Big VDD track
-
Output filter
-
Input RC Filter
-
Guard Ring
-
Full GND Plane on top and bottom
-
Vias close to the decoupling capacitors
-
Decoupling capacitors close as possible to the IC
-
Vias connection between Top and Bottom GND
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5
Summary
In general it’s important to have on the first Test PCB all possibilities to do a quick change in the
setup during EMC measurements.
This means the PCB should have place holders for additional capacitors and ferrite or resistor in the
VDD Track and on the Output track. This will help to save time during EMC Tests and gives the
freedom to try different filter settings.
After passing the EMC test there is still the possibility to reduce the BOM.
Important: In general each PCB has to be updated in layout and filtering, if there is a change in the
BOM.
AMS recommendation:
-
Using Topand Bottom GND planes
-
Placement of the components only on one plane
-
Using of an unbroken GND plane on the second plane is mandatory
-
VIAS between Top GND and Bottom GND
-
Vias close to the capacitor ( e.g. decoupling capacitor)
-
Additional Filter RC on VDD ( IMPORTANT: Disadvantage on ICs with analog output :
voltage drop --> ratiometric shift; Ferrite bead better)
-
Placing of external components as close as possible to the IC
-
Output capacitors connecting close to the connector
-
Additional ESD Protection if necessary (TVS Diode)
-
Tracks on the PCB as short as possible
-
Power Track as big as possible
-
Guard ring
-
Ground fill
-
Ground between SPI Signals.
-
Ground close to the SPI CLK
-
RC Filter for driving SPI Outputs
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Copyright
Copyright © 1997-2013, ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
7
Disclaimer
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information set forth herein or regarding the freedom of the described devices from patent infringement. ams
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designing this product into a system, it is necessary to check with ams AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or high reliability applications, such as military,
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show deviations from the standard production flow, such as test flow or test location.
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8
Contact Information
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ams AG
Tobelbader Strasse 30
8141 Unterpremstaetten
Austria
T. +43 (0) 3136 500 0
For Sales Offices, Distributors and Representatives, please visit:
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