DesignCon 2011
PDN Application of Ferrite
Beads
Steve Weir, IPBLOX, LLC
sweir@ipblox.com
(775)299-4236
Abstract
Ferrite beads are commonly used to isolate Power Distribution Network noise. While
ferrite beads are powerful, low-cost tools, they are very often applied in an undisciplined
manner that provides little benefit, and often harms design performance. This paper
provides a comprehensive view of: when, where, how, and why ferrite beads should and
should not be used in power distribution networks of high performance mixed-signal
PCB designs.
Author Biography
Steve Weir, CTO IPBlox, LLC Steve is an independent consultant with over 20 years
industry experience and a broad range of expertise. Steve holds numerous patents, has
authored more than a dozen papers on power integrity, and contributes regularly to the
SI-List signal integrity reflector.
Objectives
Ferrite bead based filters are frequently specified in mixed-signal applications. While
filters based on ferrite beads can be very effective, over and / or improper usage adds
unnecessarily to design cost and complexity, and often impairs design performance as
well. The goal of this paper is to provide the reader with the necessary tools to:
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•
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Understand ferrite bead properties with a good simulation model.
Understand PDN behavior with sensitive loads.
Synthesize ferrite bead based filters that meet design requirements.
Ferrite Bead Properties
Ferrite beads are inductors constructed using one of the many available ferrite materials.
Ferrite materials are sintered crystalline compositions of primarily MnZn, and NiZn.
MnZn ferrites have: much higher permeability, much lower resistivity, and much higher
apparent permittivity than NiZn materials. Beads are available in both materials. For
EMI suppression and high frequency filtering, the higher resistivity, and lower effective
permittivity of NiZn make this the usual material of choice.
Low Frequency Characteristics
Ferrite materials exhibit very low loss at low to medium frequencies. NiZn materials inparticular exhibit low losses into the tens of MHz. The result is that ferrite beads are high
quality factor inductors at low frequencies. When connected to low ESR capacitors they
form high Q filter networks up to the tens of MHz.
Medium Frequency Characteristics
At frequencies from the mid 10’s of MHz to as high as 1GHz or more, eddy current and
hysteresis losses dominate bead impedance. Over this frequency range, ferrite beads
appear resistive. It is this resistive characteristic that has held prized value with EMC
practitioners for decades. Whereas a low loss element reflects offending energy, beads
dissipate medium frequency noise energy as heat.
High Frequency Characteristics
All ferrites exhibit inter-crystal domain capacitance. At sufficiently high frequencies, the
capacitance dominates impedance and ferrites couple more noise energy than they
absorb. IE beads turn into tiny series coupling capacitors. Recent material and
manufacturing improvements yield components that are capable of substantial series
impedance into the mid GHz range.
Ferrite Bead Response Curves
Ferrite bead manufacturers tend to offer performance information in one or the other
format: 50 Ohm port S parameter data, or ZRX curves. For power filtering applications,
ZRX curves are often the more intuitive and readily usable format. For simulation in a
SPICE engine, either source should first be converted to an equivalent circuit.
Figure 1, Example Ferrite Bead ZRX Curve
Figure 1 reproduces the ZRX curve for a TDK MPZ1608S221A 0603 size bead. Below
10MHz the response is inductive, Z and X are virtually equal. In this region the bead is a
very high Q inductor: At approximately 28MHz X and R cross. At this frequency, stored
energy and dissipated energy match. From 28MHz to the peak impedance at 150MHz
net reactance falls to zero at which point the impedance becomes completely resistive.
From the peak impedance at 150MHz out to 900MHz the device becomes capacitive
admittance. Parasitic capacitances for common 0603 and 0805 size beads typically vary
from 0.4pF to 1.5pF.
Single Branch Ferrite Bead Model
A single branch ferrite bead model consists of four elements:
• Series DC resistance, RDC
• Inductance, L
• AC resistance, RAC
• Parasitic capacitance, CPAR
Figure 2, Single Branch Ferrite Bead Model
Coefficients for: L, RAC, and CPAR may be obtained from inspection of ZRX plots, while
RDC is obtained from the datasheet value, or measurement.
Inductance is found as L = Z/jω at a frequency close to initial separation of the Z and X
plot lines. RAC reads directly as the peak impedance. CPAR is obtained by solving for the
parallel admittance at a frequency well beyond the impedance peak:
CPAR may be determined by solving for impedance at high frequency:
Equation 1
This single branch model produces good correlation to VNA measurements at: low
frequencies, at the bead peak frequency, and very high frequencies. The model tends to
broaden the peak impedance range over actual devices.
Two Branch Ferrite Bead Model
A two branch model improves accuracy versus a single branch model:
Figure 3, Two Branch Ferrite Bead Model
For most PDN filter applications either the single or two branch models are more than
adequate.
Figure 4, Response Comparison Datasheet vs. Single and Two Branch Models
Figure 4 illustrates comparative impedance magnitudes from a common ferrite bead data
sheet, a single branch model derived using the formulas above, and a two branch model
derived using a best-fit algorithm. On a log-log plot magnitude the two branch model
exhibits a tight fit with the data sheet over four frequency decades. The single branch
model deviates mostly near the peak impedance, expressing up to 30% higher impedance
than the data sheet.
As seen in Figure 5, modeled and measured responses using either model correlate quite
well.
Figure 5, Measured vs. Modeled Response Bead Plus Bypass Capacitor
Both models track well with respect to each other, varying only slightly approaching the
region of peak bead impedance. The mounted capacitor model is a two-branch LRC
derived from capacitor only measurements.
Effects of DC Bias
DC bias can substantially reduce the inductance of ferrite beads. Some manufacturers,
such as Laird (formerly Steward) publish performance information at different levels of
DC bias current. Many manufacturers do not. In applications where a bead will be used
above 30-40% of its rated current, inductance can fall by up to 90%, greatly diminishing
attenuation in the low portion of the stop band. For accurate results it is important to
model the bead inductance over the range of DC currents that occur in the application.
PDN Filters Using Ferrite Beads
When designing PDN filters with ferrite beads, the important parameters are:
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Required stop band frequency range.
Required stop band attenuation.
Required PDN impedance seen on the load side.
Resonance damping for any peak that forms between the bead and bypass
network.
Filter Insertion Frequency Response S21
It is important to recall that the dominant behavior of a ferrite bead is a high Q inductor
up to some number of MHz, typically 10MHz-50MHz. In the common situation where
the low pass cut-off frequency, FCO, occurs below the bead L-R frequency transition,
substantial to massive peaking is possible. Near FCO the filter imparts substantial
insertion gain if all of the conditions are met:
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•
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Source impedance is much lower than twice the characteristic L/C0.5 filter
impedance.
Load impedance is much higher than one half the L/C0.5 filter impedance.
FCO occurs below the L-R transition, ie jωL >> RAC.
Filter capacitor ESR is << than twice the characteristic L/C0.5 filter impedance
In many PDN ferrite bead applications, especially with light loads, all of these conditions
are met. In order for the source PDN to regulate well, its impedance must be much lower
than all loads combined, including any one isolation filter. Similarly, the series filter
impedance as seen on the load port must be much lower than the load impedance.
The L-R transition of ferrite beads is a function of the material used. Some MnZn
materials exhibit transitions as low as 2MHz. Available beads in NiZn materials exhibit
transitions between 10MHz and 1000MHz, with transitions between 10MHz and 50MHz
being the most common.
Ceramic capacitors that dominate bypass applications due to low cost, small size, and
high performance have ESRs typically less than 100mOhms for any value greater than
1nF.
The greater the disparity between network impedances, the more poorly damped the
filter, the greater the propagated noise peaking, and load impedance at FCO will be.
Figure 6, Filter Response w/ 1000 Ohm Load
Figure 7, Filter Response w/10 Ohm Load
Figure 6 and Figure 7 depict frequency response for various driving and load impedances
using a ferrite bead and capacitor combination with a characteristic L/C0.5 of 2.34 Ohms.
Both figures include the S21 response from a VNA with 50 Ohm ports. The VNA
responses exhibit a -3dB corner at 1/(50πC) due to the 50 Ohm driving and loading ports.
The response is free of peaking, but is not representative of filter performance in a typical
circuit.
Practical circuits have load impedances many times higher than the source as required for
good voltage regulation from DC through the filter corner frequency. The damped LRC
filter response of such circuits can easily peak at +20dB or more. Unfortunate
combinations of bead and capacitor values can place such resonances close to significant
energy sources, such as switching power supplies clock rates causing havoc in the very
sensitive circuits the filters are intended to shield.
Damping requires providing sufficient energy dissipation as a combination of series and
shunt resistance near the filter cut-off frequency: FCO. Of the available damping
configurations, dominant pole has the advantages of: No additional DC power
consumption, no additional series resistance, and no degradation to the high frequency
filtering. One or more of these drawbacks are suffered by each of the other available
damping configurations. The sole disadvantage of the dominant pole method is the
requirement for an additional, larger capacitor value.
Dominant Pole Filters
A dominant pole filter establishes a first pole with high damping well below the design
cut-off frequency. The damping resistor in the dominant branch loads the otherwise
under damped original L-C section. At the limit pole value of 0Hz the dominant pole
capacitor contributes no phase shift near the cut-off frequency, and the optimum value for
the damping resistor is: RDP = (L/(2C))0.5. This yields the familiar maximally flat
Butterworth filter.
As any real dominant pole capacitor value shrinks towards the filter capacitor value
several impacts occur:
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The pass-band develops a peak that increases as the ratio falls.
Optimum damping resistance increases.
Peaking sensitivity to damping resistor value match increases.
Peak filter impedance seen by the load increases.
Worst-case insertion loss due to component tolerances at nominal FCO shrinks
from -3dB.
Figure 8, Dominant Pole Compensated Low-pass Filter
Table 1 lists common coefficients for optimized dominant pole filters. Where:
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CDP is the dominant pole capacitor.
RDP is the dominant pole damping resistor / ESR
FCO is the -3dB frequency
CDP/C FCO/(2π(L*C)0.5) RDP/(L/(2C))0.5
2X
5X
10X
1.37
1.27
1.21
1.72
1.30
1.15
Transition Band Max Gain
Nom (L/C)0.5+/-15% Nom
2.00
2.04
1.40
1.42
1.20
1.23
Table 1, Dominant Pole Filter Coefficients / Transition Band Insertion Gain
For example:
Given a filter requirement for -3dB 100kHz FCO, and no more than +4dB gain in the
pass-band, and a ferrite bead, or other inductor with 1.2uH low frequency inductance:
Use a 5X dominant pole, ideal peaking +3dBScale FCO for 5X dominant pole: FCO_SCALED = FCO/1.27 = 78.74kHz
Solve for C:
C >= 1/(1.2uH*(2π*78.74kHz)2) >= 3.4uF
Select 4.7uF as a commonly available value.
Solve for CDP:
CDP = 5C = 23.5uF
22uF is acceptable, worst-case peaking will be somewhat higher than the 1.42X of a true
5X CDP/C ratio filter.
Solve for RDP:
RDP = 1.30*(1.2uH/(2*4.7uF))0.5 = 0.46 Ohms, 0.50 Ohms acceptable.
The resulting filter response, including margining the inductor +/-20% and the capacitor
+/-10% meets the design requirements:
L/LNOM C/CNOM Gain Peak
+0%
+0%
+3.09dB
-20%
-10%
+2.96dB
-20%
+10%
+3.59dB
+20%
-10%
+2.83dB
+20%
+10%
+3.32dB
Peak Freq Loss @ 100kHz Loss @ 1MHz
39.36kHz
-6.42dB
-52.12dB
50.12kHz
-3.14dB
-44.96dB
48.98kHz
-4.44dB
-46.82dB
31.62kHz
-7.82dB
-48.50dB
32.73kHz
-9.14dB
-50.35dB
Table 2, Example Filter, Margined Response
Z22 Shunt Impedance at the Load
Low impedance PDNs driving through series low pass filter output impedance exhibit an
inverted “V” impedance versus frequency response. At low frequencies, the series
impedance approaches zero, and the load sees the low source PDN impedance. At the
filter cut-off frequency, impedance approximates the characteristic L/C0.5 impedance
multiplied by the network Q. At frequencies above FCO, the output shunt capacitor
network impedance dominates.
The maximum impedance occurs at the cut-off, is proportional to the series inductance L,
and inversely to the filter output capacitance C. The direct consequence is that in order to
hold impedance presented to the load to an acceptable maximum value, the output filter
capacitance scales directly with the series filter inductance.
Figure 9, Normalized Output Impedance vs. Frequency, Damped Voltage Sourced Series Filter
Over-specification of series inductance forces use of larger and more expensive
capacitors than would otherwise be necessary.
Effects of Dividing a Plane/Area w/ Series Filters
Given a plane cavity with relative permittivity of εR, thickness H bypassed with a bypass
capacitor density of ρ capacitors per unit area, each with LCAP_MOUNTED per capacitor, the
cross-over frequency between the discrete capacitor network and the plane cavity is:
Equation 2
And the characteristic impedance at FCO is:
Equation 3
Both the cross-over frequency and characteristic impedance are area independent.
Dividing the plane does not change either. However, dividing the plane:
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Increases the frequency of any given modal resonance: m, n.
Attenuates noise propagation above the isolating cut-off frequency.
Isolates bypass above the isolating cut-off frequency.
Figure 10, Example Cavity Division Using Ferrite Beads
Modal resonances occur for each positive integer m, n applied to the x and y dimensions
of a rectangular cavity w/o bypass capacitors:
Equation 4
The example in Figure 10 depicts a power cavity divided into four isolated sections. The
wavelengths associated with each resonant mode decrease as the corresponding
dimension for ωx and ωy shrink.
The most common use of this technique is to push the lowest modal resonances away
from primary clock or bit rate / 2 frequencies when those radiate excessively. The
technique can be very effective, but imposes several side-effects:
•
The divided polygons each exhibit higher Q at each new modal peak than the
original contiguous plane. These peaks occur at higher frequencies where they
are more difficult to control.
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Signal returns that cross the polygon boundaries degrade the signals that cross and
inject noise into all dielectric surrounding the polygons, adjacent slots and cavity
alike.
Low frequency bypass and damping must be provided for each isolated section.
The primary advantage of this technique is isolation between the polygons at frequencies
from the discrete PDN to cavity FCO to daylight. As with any series filter, bypass cost is
minimized by restricting the series impedance to only the minimum required to achieve
the needed attenuation.
In this example, TDK MPZ1608D600B beads were used which each have effective
inductance of only 50nH. Two beads are used along each polygon edge to further reduce
total inductance, mitigating impact at low frequencies. The PCB has uniform bypass of
two 1uF 0402 X5R capacitors per square inch distributed uniformly, and bulk
capacitance of 500uF / 7mOhms in each quadrant. The VRM model is 160nH in series
with 10mOhms.
Figure 11, Transfer Z, PCB Contiguous Power Cavity
Figure 12, Transfer Z, Power Cavity Divided Into Four Quadrants w/ Ferrite Beads
Without the beads, the capacitors and plane cavity provide isolation of 10-25dB through
the mid-frequency range. Isolation compresses first at the discrete PDN to cavity FCO,
and collapses throughout the modal resonances.
With the beads, cut-off occurs near 800kHz due to the bead inductance and PDN bypass
capacitance. The cut-off is well damped and does not require compensation. Local Z11
increases as the beads isolate the PDN bypass outside the southeast quadrant. Effective
transfer impedance from the excitation point in the southeast quadrant to other quadrants
drops rapidly as the beads and bypass capacitors attenuate noise propagation. At the
discrete PDN to cavity FCO, isolation of 35dB – 75dB is evident in the isolated quadrants.
Isolation remains better than 20dB out to 10GHz. However, load isolation within the
excited quadrant degrades by about 10dB compared to the contiguous plane case.
It is important to recognize that transfer impedance is the noise current to noise voltage
transfer ratio from the noise source in the southeast quadrant and does not represent the
impedance presented to any load in each of the other quadrants.
Figure 13, Z11 Comparison Contiguous vs. Isolated
As seen in Figure 13, while isolation with ferrite beads shifts the lowest modal
impedance peaks and valleys up in frequency. Z11 increases substantially through both
the mid-frequencies, and at the new modal peaks. Mid-frequency impedance increases
due to truncation at the plane edges which increases the effective inductance the plane
cavity and bypass capacitors present to the noise source. Modal Q increases due to
reduced propagation path length for each reflection pass, and consequently less series
loss due to skin resistance and dielectric loss tangent.
The example is potentially useful for DDR-1066 or faster busses, but the modal
resonances could be problematic for 3.125Gbps – 6Gbps SERDES.
PDN Noise Management for Sensitive Nodes
PDN noise at a given node can be divided into:
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External voltage noise from the PDN network attenuated through the series path.
Load noise current impressed onto the PDN network local shunt impedance
External voltage noise is a function of VRM noise and distant noise currents impressed
onto the external PDN network impedance and passed through the series loss of the PDN
towards the local load. Local noise current is the self-noise of the circuit node in
question. Consider first a plural set of loads that are completely isolated:
Figure 14, Isolated PDN Loads
Each load may be characterized by:
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S21 noise rejection versus frequency from the PDN interconnect to the load.
Noise current versus frequency imposed by the load on the PDN PCB
interconnect
The series interconnect and, when present, local load bypass set an S21 insertion loss
function against noise appearing at the PCB PDN interconnect. This leaves a frequency
dependent noise voltage budget at the common PDN interconnect. For the case of
isolated loads, the allowable noise voltage and load noise current set the PDN impedance
ceiling.
When multiple loads connect to a common PDN node, both the noise currents and PDN
impedance become distributed and shared. Series isolation is appropriate when it can be
shown that series isolation:
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Substantially reduces the size of the PDN for the required performance, or
Substantially reduces the cost of the PDN for the required performance, or
Is required to meet the PDN required performance
Figure 15, PDN Loads w/ Common Impedance
In order to simplify evaluation, we can represent the networks from the point of view of
each load.
Figure 16, PDN Model for Common Impedance Evaluation
As each load sees the common PDN interconnect, external noise currents sum with the
load’s own noise current, but the PDN impedance is also reduced by the presence of
bypass necessary for the distant PDN loads. Under the assumptions:
•
The PDN is free of resonances within any load bandwidth
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Interconnect series impedance is small relative to the bypass impedance for each
load
Each load belongs to the same load class:
o Each load has equal noise sensitivity at its respective PDN attachment
Then the peak noise voltage of the nodes when isolated is the same as when connected.
If the noise currents are coherent, then below modal frequencies, no change to noise
voltage occurs by joining the nodes.
However, if the noise currents are incoherent, then the RMS decreases as the square root
of the number of identical amplitude, incoherent sources, while the peak noise remains
fixed. If the noise sources are coherent but out of phase then the peak noise is always
some value less than the peak of the single source and single bypass impedance.
When the independent noise-voltage tolerances at the PDN PCB interconnect are
dissimilar, joining the nodes at the PCB reduces amplitude for the more noise tolerant
independent nodes, while increasing it for the more noise sensitive nodes. In order to
maintain acceptable noise levels for the noise sensitive nodes, either the entire PDN
impedance must be scaled down to the requirements of the more sensitive loads, or the
quiet nodes must be isolated.
Example 1A:
Analog load: +/-2mV pp noise budget at the PDN interconnect DC – 3GHZ, 100mA
dynamic load current.
Digital I/O: +/-30mV pp noise budget at the PDN interconnect DC – 3GHz, 10mA / I/O,
10 I/Os.
Example 1B:
Analog load: +/-2mV pp noise budget at the PDN interconnect DC – 3GHZ, 100mA
dynamic load current.
Digital I/O: +/-30mV pp noise budget at the PDN interconnect DC – 3GHz, 10mA / I/O,
100 I/Os.
The analog load requires 20mOhms impedance. As a separate rail, the digital I/Os
tolerate reactive bypass impedance of: 3 Ohms/N, where N is the number of I/Os.
Example 1A digital loads require 300mOhms as a separate rail, but 20mOhms if the
analog and digital rails are common. A shared rail would require 10mOhms total
impedance versus 18.75mOhms parallel equivalent for isolated rails, a component
increase of 88%.
Example 1B digital loads require 30mOhms shunt impedance as a separate rail, but
2mOhms if the rails are joined. The net impedance of the shared rail would be
1.8mOhms, whereas the parallel equivalent of the isolated rails would be 12mOhms. The
joined rail requires 6.6 times as many bypass capacitors, and much thinner dielectric
interconnect than the isolated rails.
Example 2:
Multiple analog loads as above.
As independent loads, each analog load requires that the PDN present no more than
20mOhms impedance. Dividing the rail does not reduce the number of bypass
components required. Series isolation of one node from another merely serves to drive
the RMS noise seen by each load closer to the peak noise. Further, smaller interconnect
polygons increases the magnitude of modal impedance peaks.
Designing Ferrite Bead Filters
Effective series filters using ferrite beads may be synthesized from a heuristic process:
1. Determine load DC current requirements.
2. Determine maximum allowable series DC resistance for acceptable DC drop.
3. Determine the noise stop band and minimum acceptable S21 insertion loss
required through the stop-band.
4. Determine the required load side Z22 impedance versus frequency.
5. Determine the maximum allowable bypass network inductance from Step 4.
6. Determine the minimum bead AC impedance required to meet the insertion loss
requirements of Step 1 at the stop band high frequency limit, given the bypass
network inductance from Step 5.
7. Determine the minimum acceptable bead inductance from FCO and Z22
requirements.
8. Select a prospective bead based on steps 1-7.
9. Determine the required load side capacitance from the inductance of the selected
bead from Step 8, and the greater of FCO and load side Z22 requirements.
10. Determine if the filter requires damping compensation.
11. Synthesize the damping compensation network if required as per Step 10.
12. Simulate and iterate as required.
Design Example, Analog PLL
Given the following design constraints:
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DC load current 0.2A
DC drop 0-20mV
Noise stop-band -40dB 4MHz – 1GHz
Z22 impedance 1.5Ohms 4MHz – 1GHz
Interconnect inductance 50pH
We follow the procedure outlined above to synthesize a series filter using a ferrite bead.
The allowable DC bead resistance is:
0.2A/20mV <= 100mOhms
Allowable bypass network inductance is:
1.5Ohms/(2π*1GHz) – 50pH = 190pH
Minimum bead impedance at 1GHz is:
190pH*2π*1GHz*40dB = 119 Ohms
FCO estimated is: Stop band low frequency*10(INSERTION_LOSS_DB/40) = 400kHz.
Minimum bead inductance is:
1.5Ohms*0.71/(2π*400kHz) = 422nH.
A TDK MPZ1608S101A has: series resistance of 0.03 Ohms, 3.0A current capability,
inductance of 636nH, shunt resistance of 145 Ohms and shunt capacitance of 1.2pF.
Load side capacitance:
To satisfy FCO:
To satisfy Z22:
1/((2π*400kHz)2*636nH)
636nH/1.52
>= 240nF.
>= 282nF.
The capacitance must be obtained with a mounted inductance of less than 190pH. Three
0402 capacitors attached to power / ground on planes 2/3 yields typically 170pH. Use 3
each 220nF capacitors, such as Murata GRM155R61A224KE19s, 10V, 0402 package,
X5R dielectric, 17mOhm ESR.
Determine if damping compensation is needed:
Bead inductance is close to 1 Ohm at FCO, while the parallel bypass capacitors exhibit
less than 6mOhms ESR. Q > 100, damping should be applied.
Design a dominant pole compensation filter to provide damping:
A 5X dominant pole requires C >= 5*3*220nF >= 3.3uF. Use a 4.7uF capacitor such as
Murata GRM188R60J475KE19, 6.3V, 0603 package, X5R dielectric, 8mOhm ESR.
Select the damping resistor using the coefficient from Table 1, and the nominal inductor
and bypass capacitor values: R = 1.30/(636nH/(2*660nF))0.5 = 902mOhms. Use 0.82
Ohms.
Figure 17, Example Filter Performance
Conclusions
Applied properly, ferrite bead based power filters realize a high degree of insertion loss
in a modest PCB area and at a low component cost. However, there are multiple prices
for this isolation, including:
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Aggravated interconnect modal resonance impedance peaks.
Increased mid-frequency PDN inductance.
Increased low-frequency impedance and/or resonance at the bead LPF FCO.
As with any tool, ferrite beads are often over applied, and misapplied. In particular,
while mixed signal designs with different noise voltage sensitivity classes do benefit from
isolation on a class basis, individual loads within the same noise class do not benefit from
individual isolation. Misapplying beads in such cases increases all: average noise, midfrequency impedance, modal impedance peaks, parts count, routing complexity, and cost.
The most important points when applying ferrite beads or any series PDN filter are:
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•
•
Apply series filters including those with ferrite beads only as needed.
Design the series filter only for the insertion loss that is needed.
Insure the PDN load port impedance is sufficiently low for the application.
References:
Miller, Blando, Williams, Novak, “Impact of PCB Laminate Parameters on Suppressing
Modal Resonances” DesignCon 2008
Hamp, “Segmentation of Power-Bus Structures”, IEEE 2005
Iorga, “Noise Coupling In Integrated Circuits”, 2008 Noise Coupling Inc.