ELEC4240/9240
Power Electronics
Lecture 8 - Effect of source inductance on rectifier operation
Ideal VS real rectifier with source inductance
The output DC voltages of the rectifier circuits discussed so far have been found by
assuming that diode currents transfer (commutate) from one diode to another
instantaneously. However this can not happen when the AC source has some
inductance Ls. (Change of current through any inductance must take some time!). This
source inductance is associated with the leakage inductance of the supply transformer
and the inductance of the AC supply network to the input transformer. The
commutation process (or the overlap process) forces more than one diode or a pair of
diodes (in a bridge rectifier) to conduct simultaneously, resulting in a drop voltage
from the output terminals which is proportional to the load current.
The output dc voltage Vd of a rectifier falls with load current Id, by an amount which
is much larger than additional voltage drop across the conducting diodes when the
current through the diodes increases. The AC source inductance, which consists of the
AC line and the input transformer leakage inductances, is mostly responsible for the
additional voltage drop. Consider the half-wave diode rectifier shown below.
is
D
Ls
vs
vs = Vmaxsinωt
IDf
∼
vi
Df
Id
Load
Figure 8.1. Half-wave diode rectifier with source inductance.
Let us assume that the load current Id is smooth and ripple-free (i.e., of constant, due
to the highly inductive load). Assume also that for ωt > 0, the load current flows
through the rectifier diode and that for ωt > π, it commutates to the free-wheeling
diode Df. This transfer of the load current between the rectifier and the freewheeling
diodes can not however be instantaneous, because of the source inductance Ls. This
transfer takes place over a small commutation or overlap angle µ, during which time,
the current gradually falls to zero in one circuit and it rises to Id in the other circuit at
the same rate. Clearly, the two diodes simultaneously conduct during the
commutation process (µ).
Lecture 8 Effect of overlap on rectifier
8-1
F. Rahman
ELEC4240/9240
Power Electronics
vs
iD
Id
iDf
µ
vo
vi
µ
µ
µ
µ
Figure 8.2 Waveforms in the rectifier circuit of figure 8.1
Lecture 8 Effect of overlap on rectifier
8-2
F. Rahman
ELEC4240/9240
Power Electronics
Because of the prolonged conduction of Df, the load voltage is clamped to zero for
0 < ωt <µ, resulting in some loss of positive voltage in the vo waveform.
Consequently Vd is reduced, the extent of which depends on µ, which in turn depends
on Ls and Id.
During the process of overlap, all of the ac source voltage drops across Ls, so that for
0 < ωt < µ,
v = Vmax sin ω t = Ls
di
dt
8.1
Integrating,
∫
µ
0
Vmax sin ω td( ω t ) = ω Ls
∫
Id
0
di = ω Ls I d
8.2
or, Vmax ( 1 − cos µ ) = ω Ls I d
and cos µ = 1 -
ω Ls
Vmax
8.3
Id
8.4
The overlap, or commutation angle, µ can the found from (4) given Id and Ls.
Vd =
=
1
2π
∫
Vmax
π
π
0
−
Vmax sin( ω t )d( ω t ) −
1
2π
∫
µ
0
Vmax sin ω td( ω t )
⎤
1
V ⎡
ω Ls
Id ⎥
ω Ls I d = max ⎢1 −
2π
π ⎣ 2Vmax ⎦
8.5
Vmax
π
Vd
Id
Figure 8.3 Voltage regulation characteristic of the rectifier of figure 8.1 due to source
inductance
Lecture 8 Effect of overlap on rectifier
8-3
F. Rahman
ELEC4240/9240
Power Electronics
Overlap in a bridge rectifier due to source inductance
During the positive half cycle, diodes D1 and D4 carries the load current Id. During
the negative half cycle, diodes D3 and D2 carry the load current. During overlap all
four diodes carry the load current. The output voltage during overlap is zero and all of
the supply voltage applies across the source inductor Ls.
vo
Ls
ip
D1
is
V maxsin ωt
Id
D3
Load
Vd
vi
N:1
D2
D4
Figure 8.4. A diode bridge rectifier with source inductance
vs
vo
µ
µ
Id
is
- Id
vi
µ
µ
µ
µ
Figure 8.6 Waveforms in the rectifier of figure 8.4
Lecture 8 Effect of overlap on rectifier
8-4
F. Rahman
ELEC4240/9240
Power Electronics
Thus, during commutation overlap,
Vmax sin ω t = Ls
∫
µ
0
di
dt
8.6
Vmax sin ω td( ω t ) = ω Ls
∴ cos µ = 1 −
∫
Id
− Id
di = 2ω Ls I d
2ω Ls
Id
Vmax
8.7
The dc output voltage of the converter is given by
Vd =
1
π
∫
π
µ
Vmax sinω td( ω t ) =
1
π
∫
π
0
Vmax sinω td( ω t ) −
1
π
∫
µ
0
Vmax sinω t( dω t )
=
2Vmax ⎛
ω Ls ⎞
I ⎟
⎜1 −
π ⎝ Vmax d ⎠
8.8
=
2Vmax ⎛
ω Ls ⎞
−
1
I ⎟
⎜
π ⎝ Vmax d ⎠
8.9
2Vmax
π
Vd
Id
Figure 8.5 Regulation characteristic of a 1-phase bridge rectifier due to source
inductance
Lecture 8 Effect of overlap on rectifier
8-5
F. Rahman
ELEC4240/9240
Power Electronics
Effect of overlap on three-phase center-tap rectifier
In the three-phase, center-tap rectifier of figure below, the load current starts to
commutate to diode D2 from ωt = 0+ when vb starts to become more positive than va.
During overlap, both diodes D1 and D2 carry the load current which is assumed to
remain constant during the process.
v an
Ls
vbn
Ls
v cn
Ls
D1
D2
D3
vo
Id
L oad
Vd
n
Figure 8.7 Three-phase center-tap rectifier with source inductance
van
vbn
vcn
vo
vabi
µ
ia
ib
ic
Figure 8.7
µ
Figure 8.8 Waveforms in the rectifier of figure 8.7
Lecture 8 Effect of overlap on rectifier
8-6
F. Rahman
ELEC4240/9240
Power Electronics
During overlap,
dia
+ vo
dt
di
= Ls b + vo
dt
van = Ls
8.10
vbn
8.11
Assuming that Id remains constant during the overlap time, and noting that
ia + ib = I d , so that
dia
di
=− b.
dt
dt
8.12
Adding the voltage equations and canceling the equal but opposite terms,
vo =
van + vbn
, during the overlap process.
2
8.13
Thus, during the commutation overlap, the converter output voltage vo is the average
of the voltages of the lines undergoing commutation. Once the load current is fully
commutated, vo jumps up to the potential vb. Form the ideal output voltage waveform,
the area bounded by vb and (va +vb)/2 is lost due to overlap of two conducting diodes.
In the following analysis, the line-neutral voltages are:
van = Vmax sinω t ;
vbn = Vmax sin (ω t − 2π / 3 ) ; vcn = Vmax sin (ω t − 4π / 3 )
The part of the positive voltage pulse lost due to overlap starting from angle ωt = π/6
is given by
vbn −
vbn + van vbn − van
di
=
= Ls
2
2
dt
8.14
The area (shaded) inside the voltage pulse lost due to overlap is given by
∫
π
6
π
6
+µ
⎛ vbn − van ⎞
⎜
⎟ d( ω t ) = ω Ls
2
⎝
⎠
∫
Id
0
di = ω Ls I d
8.15
Note that (vb - va) is the line-line voltage vba. The integral on the right hand side by
shifting the origin by π/6 to the left. Thus
Lecture 8 Effect of overlap on rectifier
8-7
F. Rahman
ELEC4240/9240
∫
µ
0
Power Electronics
3Vmax
sin ω td( ω t ) = ω Ls I d
2
8.16
2ω Ls
Id ,
Vmax l − l
8.17
∴ 1 − cos µ =
cos µ = 1 −
so that
2ω Ls
I d where Vmax l-l = √3 Vmax
Vmax l − l
8.18
The dc output voltage is
Vd =
3Vmax l − l
3 3 Vmax 3ω Ls
Id =
−
2π
2π
2π
⎛
⎞
ω Ls
Id ⎟
⎜1 −
⎜ Vmax l − l ⎟
⎝
⎠
8.19
3Vmax l − l
2π
Vd
Id
Figure 8.9 Regulation characteristic of the rectifier in figure 8.7
Lecture 8 Effect of overlap on rectifier
8-8
F. Rahman
ELEC4240/9240
Power Electronics
Effect of source inductance on three-phase diode bridge rectifier
vo = vL+ − vL−
vL+
Ls
van
ia
D1
Ls
ib
D3
D5
R
vabi
Vd
vbn
Ls
vcn
iL
Load
L
ic
D4
D6
D2
vL−
Figure 8.10 Three-phase diode bridge rectifier with source inductance
As for the three-phase CT rectifier, the voltage equations are
dia
+ vL +
dt
di
vb = Ls b + vL +
dt
va = Ls
8.20
8.21
when D1 and D3 are in overlap due to the source inductance Ls and where all voltages
are with respect to the fictitious neutral point. vL+ is the potential of the positive
voltage bus (cathodes of the upper diodes) of the rectifier with respect to the neutral
point.
As before, during each overlap, the positive and negative dc buses have voltages
which are average values of the commutating line-line potentials.
During the commutation overlap of diodes D1 and D3, the positive rail voltage is (vb
+ va)/2, and the positive voltage lost from VL+ as a result of the overlap is
vb − vL+ = vb −
vb + va vb − va
di
=
= Ls
2
2
dt
8.21
Integrating for the duration of the overlap
∫
π
6
π
6
+µ
⎛ vb − va ⎞
⎜
⎟ d( ω t ) = ω Ls
2
⎝
⎠
Lecture 8 Effect of overlap on rectifier
∫
Id
0
di = ω Ls I d
8-9
8.22
F. Rahman
ELEC4240/9240
Power Electronics
va
vc
vb
vo
vABi
ia
ib
ic
Commutation notches in vabi
Figure 8.11 Waveforms in the rectifier of figure 8.10
Lecture 8 Effect of overlap on rectifier
8-10
F. Rahman
ELEC4240/9240
Power Electronics
Note again that (vb - va) is the line-line voltage. The integral in the right hand side by
shifting the origin by π/6 to the left. Thus
∫
µ
0
3Vmax
sin ω td( ω t ) = ω Ls I d
2
8.23
2ω Ls
I d , so that
Vmax l − l
8.24
∴ 1 − cos µ =
cos µ = 1 −
2ω Ls
I d where Vmax l-l = √3 Vmax
Vmax l −l
8.25
The dc output voltage Vd is given by
Vd =
Vd =
3Vmax l − l
π
1
−
π /3
∫
µV
0
max l − l
2
sin ω td (ω t ) =
3Vmax l − l
π
−
3ω Ls
⎞
3Vmax l − l ⎛
ω Ls
Id ⎟
⎜⎜ 1 −
⎟
π
⎝ Vmax l − l ⎠
π
Id
8.26
8.27
3Vmax l − l
π
Vd
Id
Figure 8.12. Voltage regulation characteristic of the three-phase diode bridge rectifier
due to source inductance
Lecture 8 Effect of overlap on rectifier
8-11
F. Rahman