INF4420
Digital to analog converters
Spring 2012
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
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Outline
Resistive DACs
Capacitive DACs
Current steering
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Introduction
Digital to analog converters (DACs), takes a
digital input word, and converts it to a voltage
or current proportional to the input value.
Usually the DAC will use an arrangement of
switches and resistors, capacitors, or current
sources, to generate an output that is a fraction
of or proportional to some reference current or
voltage (bandgap).
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Introduction
Proper layout (to reduce mismatch) is critical
for performance. Switches are also critical
(signal dependent Ron, clock feed-through, and
charge injection).
DACs find numerous applications, from
trimming and adjustment circuits to high-end
video DACs (12 bit, 150 MSPS), and
communication circuits.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Introduction
Outline of the full digital to analog converter.
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Resistive divider
(Kelvin divider) DAC
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Kelvin divider
Different
switching
schemes are
possible.
●
●
Tree
X-Y
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Output settling
There is inherent resistance in the resistive
divider. Switches have both Ron and parasitic
capacitance (also for switches turned off).
Resistance is code dependent. Capacitance is
approximately constant.
Gives rise to exponential settling.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Output settling
Output buffer will have finite slew rate (large
signal) and gain bandwidth (small signal).
Exponential settling
from finite gain
bandwidth
Slewing
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Mismatch
Resistors are affected by systematic and
random mismatch, causing a deviation from
their ideal value.
Linear gradient in resistor values gives rise to a
parabolic INL. Harmonic distortion!
Good layout is important. Trimming or
calibration may be necessary.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
R-2R resistor ladder DAC
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Deglitch
Glitches are likely to occur when the DAC is
switching (overshoot resulting in more settling
and slewing). A track and hold (T&H) amplifier
can be used to avoid glitches on the output of
the DAC.
Timing of the T&H relative to the DAC input is
critical (track while the output is constant, and
hold when the output is transitioning). Noise
and linearity of the T&H must be sufficient.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Capacitive divider DAC
Array of binary weighted capacitors. We
program which capacitors are connected
between out and gnd, or between out and ref.
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Capacitive divider DAC
Capacitive divider
where we program
which capacitors
belong to C1 or C2.
Digitally programming
the fraction of Vref.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Capacitive divider DAC
Samples amplifier offset
(and 1/f noise) during
reset. Avoids rail-to-rail
buffer input.
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Current source DAC
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Current source DAC
Current
source with
finite output
resistance,
switch
resistance,
and resistive
loading.
Norton
equivalent.
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Current source DAC
α must be small for acceptable INL and
distortion.
● Current sources with large output impedance
● Differential output (cancels even harmonics)
● Amplifier virtual ground (speed issues)
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Current source DAC
Using cascode (M1), the
output resistance is
approximately gmro2.
Depending on biasing of the
cascode, Vcp, we need
≥ 2VDS,sat + VTH or ≥ 2VDS,sat.
Active cascode also
possible.
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Current source DAC
Random variation of drain current is an
important limitation. Need to design current
sources with sufficient area and overdrive.
Gate current can be problematic.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Current source DAC
Addressing unity current sources in a 2D array.
● Sequential selection
● Common centroid
● Random (several possibilities)
Segmenting the array with a local current
replica is also useful.
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Current source DAC
Switch driver must
ensure switches are
not off at the same
time to avoid
triodeing the current
source (recovery
time).
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Ideal reconstruction filter
The DAC output has a S&H response.
Need an output filter to further attenuate
frequency images and smooth out the time
domain waveform.
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Ideal reconstruction filter
The ideal
reconstruction filter is
not realizable (infinite
impulse response
without recursion), we
must use an
approximation of the
ideal brick wall filter
instead.
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)
Resources
Not part of the curriculum
Mercer, Digital to Analog Converter Design
Baker, CMOS: Circuit Design, Layout, and
Simulation, IEEE Wiley, 2010
Sansen, Analog Design Essentials, Springer,
2006, Ch. 20
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INF4420 Spring 2012 Digital to Analog Converters
Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no)