A New ZCS-PWM Converter for High Voltage High Power Application
1
M. Delshad1 , H. Farzanehfard2
Department of Electrical and computer Engineering, Isfahan University of Technology, Isfahan, Iran
Department of Electrical and computer Engineering, Isfahan University of Technology, Isfahan, Iran
2
Abstract— In this paper a new FB-ZCS-PWM converter for
high voltage high power applications is presented. This
converter utilizes parasitic components of high voltage
transformers as resonant elements and employs fixed
frequency phase shift control to implement soft switching
condition. The detailed steady state analysis of the converter
is presented by computer simulation and analytical method.
I. INTRODUCTION
High voltage dc-dc converters are widely used in
electronically equipments such as x-ray generators , RF
generation , traveling wave tube , etc. However , The
design of high voltage dc-dc converters is problematic
because the large turn ratio of the transformer exacerbates
the transformers no idealistic. leakage inductance cause
undesirable voltage spikes that may damage circuit
components and winding capacitance may result in
current spikes and slow rise times. These no idealities can
lead to greatly increased switching and snubber losses and
reduced converter efficiency and reliability.[1]-[7].
A FB-ZCS topology shown in Fig. 1 which is a dual
topology of the FB-ZVS-PWM converter. In Fig. 1
converter consist of a resonant tank in the primary side of
transformer, The insertion Lin between input and inverter
is to achieve a current fed source , a high voltage
transformer , multiplier stage and six switch in three lag,
capacitive filter and resistance load. This converter
utilizes parasitic component of high voltage transformers
(such as leakage inductance and winding capacitance) as
resonant elements. Voltage multiplier in secondary side is
used to reduce turns ratio and also peak voltage on the
rectifying diodes. In fact in the converter the third leg is
placed to reduce the second leg current thus gate signals
of switches in the third and second legs are same. Since
this converter operate at fixed frequency the
implementation of its controller circuit will be easy. A
lead_lag controller is used in the converter. This converter
has ten operation intervals during a single switching
cycle.
Fig.1-The proposed FB-ZCS-PWM converter
The proposed converter has ten operation modes
during a one switching cycle. Only the modes of a half
switching cycle discussed here because the other five
modes are symmetric. The first five modes of operation
are discussed follows:
1)
Mode I t0 < t ≤ t1
Operation begins when S1,S4,S5,S6 are on. Since resonant
capacitor voltage (Vcr) is equal to nVo and is directly applied to
m
the resonant inductance (Lr), the current through S5 and S6 is
reduced linearly thus S5 and S6 can turn off at ZCS. During this
mode, energy is transfer to the output. Mode I ends when the
current in S5 and S6 reaches zero.
iLr (t o ) = iS 5 + iS 6 = I in
(1)
nV o
i Lr ( t ) = −
( t − t 0 ) + i Lr ( t 0 )
mL r
(2)
n
V0
m
n
Vcr 2 (t ) = − V0
m
(3)
Vcr1 (t ) =
The overlap of S4 with S5 and S6 must be long enough to
allow S5 and S6 current to reach zero.
t1 − t 0 =
II. MODES OF OPERATION
The steady state operation of this converter is
explained considering all circuit components except the
transformer are ideal. The primary to secondary turns
] and the multiplier gain is
ratio is defined as n [ n = NP
2NS
m. Ripple inductance current is neglected and the output
voltage considered to be constant. Fig. 1 has shown the
schematic proposed converter.
(4)
I in
nv0
mLr
(5)
2) Mode II t1 ≤ t < t2
With S1 and S4 are both on, the input inductor stores
energy no energy is transferred from the input to the load.
The desired energy transfer from input to output
determines the interval of this mode.
i Lr (t ) = 0
(6)
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n
V0
m
n
Vcr 2 (t ) = − V0
m
Vcr1 (t ) =
(7)
sw1
(8)
sw2
3) Mode III t 2 < t < t3
Mode III begins at t2 when S2 and S3 is turned on. S1
current is transferred to S2 and S3, in a resonant fashion.
Specifically, by allowing inductor current to resonate to Iin ,S1 current goes to zero providing ZCS for S1 and
concluding this mode.
−2nVO
Sin(ω 0 (t − t 2 ))
(9)
i Lr (t ) =
mZ 0
n
VO Cos (ω 0 (t − t 2 ))
m
n
= VO Cos (ω 0 (t − t 2 ))
m
sw3
sw4
sw5
sw6
t1 t2
VCr =
VCr
Z0 =
Lr
Cr
ω0 =
(10)
Io
1
Lr C r
t1
t5 t6
t9
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
iLr
m
V Cr 1 (t 4 ) = −
I in
n
(t − t 3 ) + V O Cos (γ )
2C r
m
(12)
VCr 2 (t 4 ) = +
I in
n
(t − t 3 ) − VO Cos (γ )
2C r
m
(13)
0
t1
t2
t3
t4
t5 t6
t7 t8
t9
t10
Fig. 3-Main theoretical waveform
iLr (t ) = − I in (9)
For the time interval t4–t3 the following is obtained
2nVo C r (1 + Cos (γ ))
(t 4 − t 3 ) =
(14)
mI in
III. STEADY-STATE ANALYSIS
5) Mode V t 4 < t < t 5
During this mode energy is transferred from input to
output. The iLr and VCr equations are given by
iLr (t ) = − I in
(15)
n
Vo
m
n
V Cr 2 ( t ) = +
Vo
m
t4
Vc r
4) ModeIV t3 < t < t 4
During this mode resonant capacitor Cr1 discharges
linearly to − nV O and Cr2 charges to nV O .
V Cr 1 ( t ) = −
t10
Fig.2-Gate signals for inverter switches
Overlap of S1 with S4 must be long enough to allow S1
current to reach zero.
I Z
(t 3 − t 2 ) = Sin −1 ( in 0 )
(11)
2n
V0
m
m
t5 t6 t7 t8 t9
t3 t4
(16)
In the steady-state analysis in the previous section, three
mode durations (I,III,IV) that are fixed were obtained.
Two additional equations are needed to solve for two
variable duration modes. The first relation is obtain by
averaging the output current and the second relation is
obtained by summing the time durations in a half
switching period as shown in equations (18) and (19)
respectively, using the following definitions.
IO =
(17)
The converter operation modes VI through X are
symmetric with respect to the first five modes as
illustrated in Fig. 2 and Fig.3.
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. 5 * ( t1 − t 0 ) nI in + nI in ( t 5 − t 4 )
TS
2
TS
= (t1 − t0) + (t2 − t1) + (t3 − t2) + (t4 − t3) + (t5 − t4)
2
(18)
(19)
Knowing the duration of all modes, the converter
behavior can be analyzed by using MATLAB and
converter can be design for a desired output voltage.
mode equation are normalized the in terms of gain and
quality factor shown bellow:
Mn =
VO
mVin
Qn =
Rload
Z0
fn =
fS
fO
(20)
M
α = ω0 (t1 − t0 ) = n
nQn
(21)
β = ω 0 (t 2 − t1 )
(22)
Mn
)
Qn
(23)
nQ n
(1 + Cos (γ ))
Mn
(24)
γ = ω 0 (t 4 − t 3 ) = Sin −1 (
δ = ω 0 (t 5 − t 4 ) =
ω 0TS
π
1
= nM n ( α + ε )
2
fn
2
ω 0TS π
=
=α + β +γ +δ +ε
2
fn
=
(25)
(26)
The steady state control curves of Fig. 4 is obtained by
The curves are presented to show the qualitative
relationships between load, gain, switching and resonant
frequencies. Increasing B corresponds to a gain increase
and is analogous to increasing D in the boost converter
also, it is clear that an decrease in load results in a
decrease load regulation range for constant fs and Z0 ,
notice that this decrease is not linear (load doubling yields
maximum gain decrease from 80 to 50). A more
significant decrease in regulation range comes from
reducing fs.
MATLAB.
IV. DESIGN RESONANT COMPONENT
For high voltage applications, typical leakage
inductance value between the primary and secondary
reflected to primary is in the range of 5-10uH. Therefore
an additional resonant inductor in most applications is not
needed. To obtain ZCS condition, the overlap of switches
in modes I and III must be long enough to reduce the
switch current to zero before turn off. In mode III, ZCS
condition depends on resonant components. For ZCS to
be achieved the energy stored in Cr must be large enough
so that resonant current reach to –Iin. In the other words:
1
1
n
n
(27)
Lr (− I inMAX ) 2 ≤ Cr (( VO ) 2 − ( VO .Cosγ ) 2 )
2
2
m
m
According to above relation γ = 90° , energy transfer from
resonant capacitor is maximum. This energy must be
large enough to reduce the resonant inductor current to
–Iin. Therefore, the guaranteed ZCS under all load and
line conditions the following relation is true.
nV
I inMAX ≤ O
(28)
mZ 0
V. MULTIPLIER VOLTAGE CIRCUIT
The high frequency inverter-fed multistage voltage
multiplier is only composed of diodes and capacitors [8].
The multiplier also provides rectification and produces a
high dc voltage from a high frequency AC voltage source.
In comparison to a simple rectifier, the introduction of
this multiplier would greatly reduce the number of
secondary turns , stray capacitance and diode voltage
ratings. The multiplier is a symmetrical Cockroft Walton
for which the output voltage (VO), voltage drop (∆V ) and
ripple (δV ) are given by
Vo = 2n.Vmax
(29)
∆V =
iL 1 3 1 2 1
.( n + n + n )
f .c 6
4
3
(30)
δV =
il n
.
f .c 2
(31)
VI. CIRCUIT CONTROL
Considering the converter operation, control circuit is
designed in order to obtain proper switches overlap for
achieving ZCS condition.
As explained in converter steady state analysis, the
output voltage controlled by timing mode II ( β ) . To
control the output regulation it is better to control α + β ,
since the duration of mode I load dependent and before
switch turn off, this mode ends. Therefore , the duration
control of mode II alone can not produce proper
regulation. Thus combining the duration of modes I and II
( α + β ) which is precisely the period between turn on of
S2 and S3 with S4 can be used the control parameter.
The PWM control signal is shown in Fig. 5 along with
switch gate waveforms. As observed the control signal
frequency is twice the switching frequency and its pulse
width is equal to α + β .
Fig.. 6 shows a control scheme is implemented which
allows a single control signal to generate gating signals
for all four primary switches. This scheme makes use of
negative-edge triggered, J-K Flip-Flops, U1 and U2, to
generate complementary drive signals and relative phase
shift between upper and lower switches. The RC network
on the flip-flop output is used to set a fixed overlap time
for both upper and lower switch sets.
Fig. 4- Steady-state control curves, M (gain) versus
B (Phase shift angle).
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Fig. 7-Output voltage waveform.
Fig. 5- The PWM control signal.
Fig. 8- Current in input inductance
U1
U2
Fig. 9- (a)Output ripple voltage (b)resonant Capacitor
Voltage (c)resonant inductance current
Fig. 6-Actual circuit for simulations: Gate Drive .
VII. DESIGN EXAMPLE AND SIMULATION
RESULTS
For a typical TWT load Vin = 800V VO = 50 KV
From the developed equations the following parameter
value are evaluated.
L in = 5 mH
n2 =
1
6
n1 =
1
6
C O = 100 nF
Lr = 50 µ H
f S = 20 KHz
Cr = 10 µ F
The following Figures refer to main waveforms of
converter such as VO, ILr, VCr1, ilin ,…As seen in this Fig.
S3 , S4and S6 switches turn on and turn off at ZCS.
Fig. 10- Current and Voltage in S4
1164
Switching Control for Medical Use Xray Power Generator,”PIEMC2000
pp596-601
Fig. 11- Current and Voltage in S3
Fig. 12- Current and Voltage in S6
CONCLUSION
In this paper a ZCS PWM converter is introduced and
its steady-state operation for high voltage DC applications
is presented. The large signal computer simulation results
are shown. In contrast to most commonly used full bridge
resonant converters, this converter has its unique merits
like fixed frequency operation and ability to incorporate
parasitic components into resonant tank.
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DC Application”IEEE Trans on Aerospace and Electronic Systems
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[5] C. Iannello, S. Luo, and I. Batarseh, “A full bridge ZCS PWM
converter For high voltage, high power applications,” in Proc. IEEE
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impulse response of dc/dc switching power converters,” IEEE Trans.
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