Survey of Trends for Integrated Point-of-Load Converters P Power Supply S l On O Chi Chip Prepared by: Arthur Ball, Michele Lim, Julu Sun, Qiang Li Prof. Khai D. T. Ngo, Prof. Fred C. Lee Presented by Fred C. C Lee and Qiang Li Center for Power Electronics Systems Sept 22-24, 2008 1 Expanded Research to Lower Power IT Applications pp $20- $30 Billion Dollar Industryy Telecom Network IT Industries Server Laptop Desktop 2 Present Server Power Architecture VID:0.95~1.7V/ 120A/ 100A/μs VR 1.2V/ 7.2A/ 50A/μs Processor1 3.3V/ 30mA/ VID:0.95~1.7V/ 120A/ 100A/μs VR 1.2V/ 7.2A/ 50A/μs Processor2 3.3V/ 30mA/ VR AC 12V PSU PFC Eng. St. D2D VR 1.5V/ 3(6)A/ 1(2)A /ns 1.2V/ 3.6(7.2)A/ 1(2)A /ns 1.8V/ (0.65)A / (0.025)A /ns 5V Chipset 1.3V/ (0.5)A/ (1)A /ns VR 3.3V/ 0.14(0.23)A/ 0.36(0.55)A /ns 3.3V VR 1 8V 1.8V 0.9V Memory VR 12V 5V HDD 12V 5V O Other 3.3V 3 Power Architecture for Laptop AC input: 90~265V LDO AC/DC adapter d t 19 V 8.7-19 V VR and LDO VR VR VR CPU Graphics DDR 16 W 18 W switch 8 7-16 8.7 16.8 8V Battery charger pack VR Boost LCD Adaptor VRs Power path Battery Power Keep alive I/O power VR Main power 25 W 16.5 W 54 W Embedded Power (Semiconductor Companies) (Delta) 4 Point-of-Load Converters Non-Isolated Non Isolated Buck Type MP3 Player Cellular phone Possible Applications Digital Camera GPS PDA Telecom Automotive Electronics L t Laptop application … Market Size: $4B 5 POL: Voltage Regulator Module 320 H 320nH CB Controller 1.2mF 320nH Pentium III 1.5V 30A 1GHz Controller 320nH Controller 320nH Controller 6 Lower Power POL Monolithic Integration S top1 L Drive S r 7 7 More Integrated POL IC L S top1 L DriveS r Big market for Integrated POL; Big challenge for inductor integration. 8 Integration of POL Line represents today’s thermal limit versus frequency For converters of 12V or less 50W • Discrete • Active Integration • Active & Passive Integration 5W 0.5W * 500kHz 1MHz 10MHz Data points are referred to “Reference IV” Today’s monolithic lithi limit li it 100MHz 9 POL Products & Research Shown here is the demarcation between industry products and research territory, as seen today. 50A 5A Industry Products 0.5A Research 500kHz 1MHz * Data points are referred to “Reference IV” 10MHz 100MHz 1GHz 10 Presentation Outline Device Technologies Magnetic Material Level of Integration g Integration Example 11 Device Technology for Different POL -- VDMOS & Trench MOSFET Current VRM for Intel CPU with Infineon Trench MOSFET Discrete VDMOS 40A Discrete Trench MOSFET 20A Frequency 100kHz 1MHz 12 Device Technology for Different POL -- Trench MOSFET with Advanced packaging Current 40A 20A Discrete VDMOS Discrete Trench MOSFET Discrete Trench MOSFET with advanced advanced packaging Frequency 100kHz 1MHz 13 Packaging Inductances -- LF Pak Wire Free Group Ls≈1nH Ld ≈ 3nH LFPAK SuperSO8 PowerPAK 14 Advanced Packaging Techniques IR DirectFET & Infineon CanPAK PolarPak from Vishay Vishay, ST Vishay ST Vishay, Ls=0.1nH Ls=0.1nH 15 Integration by Co-Packaging -- Dr.MOS Power One On Semi Low RDS_on FETs Synchronous buck PWM controller Driver circuit Philips 16 Packaging Inductances (from Renesas with same Silicon Die) SO8 LFPAK Dr.MOS Ls=1.5nH Ld=3nH Ls=1nH Ld=3nH Ls=0.1nH Ld=2.5nH 17 Device Technology for Different POL -- Lateral MOSFET & Lateral-Trench MOSFET Current 40A 20A Discrete VDMOS Discrete Trench MOSFET 100kHz Discrete Trench MOSFET with advanced advanced packaging 1MHz Discrete L t l Lateral‐ Trench MOSFET Integrated Lateral MOSFET Frequency 18 Survey on Device Technology Trend Trench with advanced‐packaging 100A Di Discrete Trench t T h FDB7030 HUF76139 HUF76139 [3.6] [3.7] IR Direct FET [3.9] HAT2168 68 [3.8] CSD16410 [3.11] Si7886DP [3.5] FDS6680 [3 3] [3.3] FDS6612A [3.2] 10A Si4539ADY [3.1] 1A Renesas DrMOS [3.10] GWS24N07 [3.12] Discrete Lateral Volterra FDS6898 [3.4] MAX8654 [3.13] TPS54317 [3.15] Di Discrete Lateral‐Trench t L t lT h MAX8566 [3.14] Monolithic Integrated Lateral TPS62290 TPS6235x [3.16] [3.17] MAX8640 [3 18] [3.18] Frequency q y 100kHz * Data points are referred to “Reference III” 1MHz 19 New Device FOM for Low Voltage g Application pp High Voltage Low Voltage IRFP460A for boost converter HAT2168 for VRM application 400V,10.3A,100kHz peak Qgs2=2.9nC Qgd=29nC 12V, 20A, 600kHz Qgs2=1nC, Qgd=2.65nC Qgd switching loss FOM = Qgd ⋅ Rds _ on Cond. loss FOM 2 = (Qgd + K gs 2 ⋅ Qgs 2 ) ⋅ Rds _ on Where Kgs2 is a function of gate drive voltage: K gs2 (VDR ) = 1 + VDR 2Vplt (VDR − Vplt ) Vplt − Vth Vin ⋅ I o ⋅ Rg 20 40 35 30 25 20 15 10 5 0 Vishay ‐ Trench Infineon ‐ Infineon Trench 2 Renesas ‐ Trench D8 Infineon ‐ Trench 3 Renesas ‐ Trench D9 Ciclon ‐ Lateral‐Trench Greatwall ‐ Lateral 5 10 15 20 25 Vds (V) 30 FOM M2=(Qgd+ +Kgs*Qgs2))*Rds FOM=Qgd*Rds FOM for Low Voltage Devices 35 Infineon ‐ Trench 80 60 Vishay ‐ Trench 40 Renesas ‐ Trench D8 Infineon ‐ Trench 3 20 0 Renesas ‐ Trench D9 Greatwall ‐ Lateral 5 10 15 Ciclon ‐ Lateral‐Trench 20 25 Vds (V) 30 35 21 Presentation Outline Device Technologies Magnetic Materials Level of Integration g Integration Example 22 Frequency Range of Conventional Materials NiZn MnZn Amorphous material P Permalloy ll Kool Mu Iron power 10k 100k 1M 10M 100M The frequency range for most conventional magnetic material is below 10MHz. 23 Frequency Range of Emerging materials Granular film material (e.g. CoZrO) (S. Ohnuma, T. Masumoto…, Research Institute for Electric and Magnetic Materials, Sendai, Japan) ( Weidong Li, R. Sullivan…, Dartmouth College) Polymer bonded materials (e.g. (e g Ferrite Polymer Compounds) ( K.W.E.Cheng',C .Y.Tang…,Hong Kong polytechnic Univ.) ((Jae Y. Park,, Mark G. Allen…,, Georgia g Institute of Technology.) gy ) Composite magnetic material (Fe/SiO2 composite) (John Q. Xiao, University of Delaware, USA) Electroplated alloy material (e.g. CoNiFe) ( S. Kelly, S. Roy…, National University of Ireland ) 1M 10M 100M There are many ongoing research focus on developing the magnetic material suitable for more than 10MHZ applications. 24 Frequency Dependence of Permeability for Different Materials Conventional material Initial permeability Emerging material 1000 Electroplated alloy material--- CoNiFe 500 MnZn---3F51 Granular film material---CoZrO 100 NiZn---4F1 Iron powder---Ferroxcube 2P50 50 C Composite it magnetic ti material---Fe/SiO2 t i l F /SiO2 composite it 100k 1M 2M 3M 4M 5M ~ Fs (Hz) 10M 20M 100M 25 Core Loss Density of Different Magnetic g Materials Iron powder Pv (Kw w/m3) (Ferroxcube Ui=40~90) Fe/SiO2 composite Kool Mu NiZn (Ferrocube 4F1 Ui=80) Electroplated alloy (Magnetics Ui=60) ((CoNiFe)) MnZn (Ferrocube 3F51 Ui=650) Granular film (CoZrO) Calculation Delta B=40mT Fs (KHz) 26 Integrated Magnetic Components with Different Materials Po MnZn Ferrite 500W [2.34] Fujiwara ‘98 [2.35] Meinhardt ‘99 Ferrite Polymer Compounds [2.29] S. H. Chung’01 [1.6] E. Waffenschmidt ’05, 05, MagLam [1 [1.4] 4] 20 nH nH, S S. Roy ’07, CoNiFe 50W Electroplated alloy-CoNiFe [2.20] Lim ‘07 [2.22] Prieto ‘02 [2.21] I. Kowase ‘05 [2.4] R.Sullivan ’04, CoZrO Granular film material [2.31] J. A. Cobos ’97 5W NiZn Ferrite [2.5] T. O'Donnell ‘04 [2 13] R [2.13] R.Sullivan‘03, Sullivan‘03 CoZrO [2.25] Ludwig ‘03 [2.23] Moon ‘05 0 5W 0.5W [2.18] Mikura ‘06 [2.9] Yun ‘04 [2.10] Cian ÓMathùna ‘08 [2 8] M [2.8] Musunurii ‘05 [2.1] Brunet ‘02 [2.2] Iyengar ‘99 Permalloy 100kHz 1MHz 10MHz * Data points are referred to “Reference I” & “Reference II” 100MHz Fs 27 Ferrite Polymer Compounds (FPC) [1.6] -- Maglam g Maglam Winding PCB Advantage of Maglam Specific resistance 49.5Gohm Low eddy current loss Lamination temperature 180oC Compatible to PCB process Disadvantage of Maglam Permeability 17 S Saturation i flux fl density d i 300 T 300mT * [1.6] Eberhard Waffenschmidt, … IEEE TRANSACTIONS, 2005; Research in the Philips and Isola. 28 Integrated Magnetic Components with Different Materials Po MnZn Ferrite 500W Ferrite Polymer y Compounds [2.34] Fujiwara ‘98 [2.35] Meinhardt ‘99 [2.29] S. H. Chung’01 [1 6] E [1.6] E. Waffenschmidt ’05 ’05, MagLam 50W [1.4] 20 nH, S. Roy ’07, CoNiFe Electroplated [2.20] Limalloy-CoNiFe ‘07 [[2.22]] Prieto ‘02 [2.21] I. Kowase ‘05 [2.4] R.Sullivan ’04, CoZrO Granular film material [2.31] J. A. Cobos ’97 5W NiZn Ferrite [2.5] T. O'Donnell ‘04 [2.13] R.Sullivan‘03, CoZrO [2.25] Ludwig ‘03 [2.23] Moon ‘05 0 5W 0.5W [2.18] Mikura ‘06 [2.9] Yun ‘04 [2.10] Cian ÓMathùna ‘08 [2.8] Musunuri ‘05 [2.1] Brunet ‘02 [2.2] Iyengar ‘99 Permalloy 100kHz 1MHz 10MHz * Data points are referred to “Reference I” & “Reference II” 100MHz Fs 29 Granular film material – CoZrO [[2.4]] The core loss density of CoZrO is smaller than that of Electroplated alloy CoNiFe and NiZn Ferrite 4F1. Specific Power Loss S s (kW/m3) Permeability The permeability of CoZrO spectrum is approximately flat up to1GHz. 10000 3MHz 4F1 NiZn Ferrite 1000 CoNiFe 100 CoZrO 10 1 10 100 1000 Peak Flux Density (mT) * [2.4] C. R. Sullivan,… IEEE TRANSACTIONS, 2004; Research in the Thayer School of Engineering. 30 Presentation Outline Device Technologies Magnetic Materials Level of Integration g Integration Example 31 Level of Integration Inductor Integration Current Level with Frequency 100A 10A Board Level Integration Package P k llevell integration 1A Wafer level integration 100 mA A 100kHz 1MHz 10MHz 100MHz 32 Board Level Integration Winding i t integrated t d iin PCB 100A [2.37a] 150 nH nH, [2.35] [2 35] 10A [2.37] Metglas, Si steel, 800 nH, [2.28] MnZn/PI, Ur=6, 50140nH, 15m Ω, [2.21] [2 30] [2.30] [2 37b] [2.37b] L=16uH, L 16uH, [2.34] 50 uH, [2.24] 1A [2.31] [2.33] NiZn, 25-100nH, 1-3mΩ, [2.20] 2 uH, Ur=150, [2.22] [2.36] FPC, [2.29] [2.31] 1-10uH,NiCuZn, [2.17] 3uH NiZnCu 3uH, NiZnCu, [2.18] [2 18] NiFe, 4.7uH, [2.25] [2.23] Inductor integrated in LTCC substrate 100 mA A Inductor integrated in PCB substrate ( Eberhard Waffenschmidt, … IEEE TRANSACTIONS, 2005.) (Michele H. Lim, … IEEE TRANSACTIONS, 2008.) 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 33 Board Level Integration Organic based 100A Lower processing temperature Higher processing temperature 10A 1A (Michele H. H Lim, Lim … IEEE TRANSACTIONS, 2008.) NiZn, 25-100nH, 1-3mΩ, [2.20] Metglas, Si steel, 800 nH, [2.28] 50 uH, [2.24] Ceramic based MnZn/PI, Ur=6, 50140nH, 15m Ω, [2.21] 2 uH, Ur=150, [2.22] 1-10uH,NiCuZn, [2.17] NiFe, 4.7uH, [2.25] FPC, [2.29] [2.23] DBC carrier 3uH, NiZnCu, 3uH NiZnCu [2.18] Magnetic layer 100 mA A Planar i d t inductor Winding Magnetic layer ( Eberhard Waffenschmidt, … IEEE TRANSACTIONS, 2005.) 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 34 Package Level Integration LTM4600 100A IDC = 10 A Ipeak = 14 A LTM4601, [2.40] 10A EN5360, [2.38] 1A FB6831, [2.41] FX5545G201, [2.42] MIC3385, [2.43] LM3218, [2.44] 100 mA A FB6831J IDC = 0.5 A F = 2.5 MHz 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 35 Wafer Level Integration -- On silicon 100A 10A (T. O'Donnell,… APEC, 2008) (Ah C. (Ahn, C H. H ,… IEEE TRANSACTIONS, TRANSACTIONS 1996) 1A 80-200nH, 5-8 Ω, [2.11] 100 mA A CoHfTaPd NiFe, 300nH, NiFe, 0.9uH, 1Ω [2.1] [2.3] NiFe, 0.83uH, 2.3 [2.10] Ω , [2.9] CoZrNb, 1uH, Fwd conv., 350 nH, 3.9 3.1 Ω, [2.12] Ω, 40 nH, 0.6 Ω, [2.6] NiFe [2.2] 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 36 Wafer Level Integration -- In silicon (Mingliang Wang, … PESC, 2007) 100A In-silicon 10A CoZrO, 10.4 nH, 30mΩ, [2.4] NiFe, 130 nH, 20mΩ, [2.15] CoZrO2, 2.53 nH, 30mΩ, [2.13] 1A (C. R. Sullivan,… IEEE TRANSACTIONS, 2004) 100 mA A 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 37 Current Capability of Different g Wafer Level Integration Magnetic fabricated in-silicon has higher current capability than magnetic fabricated on-silicon 100A In-silicon 10A CoZrO 10 CoZrO, 10.4 4 nH nH, 30mΩ 30mΩ, [2.4] [2 4] On-silicon NiFe, 130 nH, 20mΩ, [2.15] CoZrO2, 2.53 nH, 30mΩ, [2.13] NiFe, 300-700 nH, 0.5-10Ω, [2.5] 1A 80-200nH, 58 Ω, [2.11] CoHfTaPd [2.3] NiFe, 0.9uH, 1Ω [2.1] NiFe, 0.83uH, 2.3 Ω , [2.9] CoZrNb, 1uH, 3.1 Ω, [2.12] 100 mA A NiFe, 300nH, [2.10] Fwd conv., 350 nH, 3.9 Ω, 40 nH, 0.6 Ω, [2.6] NiFe [2.2] 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 38 Presentation Outline Device Technologies Magnetic Materials Level of Integration g Integration Example 39 3D Integrated POL 100A Board Level 3D Integrated POL [2.37a] 150 nH nH, [2.35] [2 35] 10A Metglas, Si steel, 800 nH, [2.28] [2.37] LTM4601, [2.40] MnZn/PI, Ur=6, 50140nH, 15m Ω, [2.21] CoZrO 10 CoZrO, 10.4 4 nH nH, 30mΩ 30mΩ, [2.4] [2 4] [2 30] [2.30] [2 37b] [2.37b] L=16uH, L 16uH, [2.34] 50 uH, [2.24] 1A [2.31] [2.33] 80-200nH, 58 Ω, [2.11] 100 mA A NiZn, 25-100nH, 1-3mΩ, [2.20] 2 uH, Ur=150, [2.22] [2.36] EN5360, [2.38] NiFe, 130 nH, 20mΩ, [2.15] CoZrO2, 2.53 nH, 30mΩ, [2.13] [2.31] NiFe, 300-700 nH, 0.5-10Ω, [2.5] FX5545G201, [2.42] 1-10uH,NiCuZn, [2.17] 3uH NiZnCu 3uH, NiZnCu, [2.18] [2 18] NiFe, 4.7uH, [2.25] [2.23] MIC3385, [2.43] LM3218, [2.44] CoHfTaPd [2.3] FB6831, [2.41] NiFe, 300nH, [2.10] NiFe, 0.9uH, 1Ω [2.1] NiFe, 0.83uH, 2.3 Ω , [2.9] CoZrNb, 1uH, Fwd conv., 350 nH, 3.9 3.1 Ω, [2.12] Ω, 40 nH, 0.6 Ω, [2.6] FPC, [2.29] Package Level NiFe [2.2] Wafer Level 100kHz 1MHz * Data points are referred to “Reference II” 10MHz 100MHz 40 Concept of 3D Integration Driver D i llayer and d heat spreader Active layer and heat sink LTCC Inductor layer 3D Integration I t ti Solution S l ti Benefits: Footprint saving and fully utilize space Thermally-enhanced Thermally enhanced co-packaged co packaged solution for >15A 15A applications that require small size and low profile 41 Advantage of DBC Active Layer PCB AlN DBC Tmax = 158°C 158 C Tavg = 96.8°C Tmax = 94 94.1 1°C C Tavg = 91.0°C Embedded bare die AlN DBC has ~6x greater thermal conductivity than 4-layer PCB 42 Active Layer Using “Flip-MOS Pair” Metalization (trace) Loop inductance should be reduced Top MOSFET (bare die) Source Drain Source Drain S b t t Substrate Drain Bottom MOSFET (bare die) L_loop =0.82 nH ! ((Maxwell Q Q3D)) In-package decoupling Caps Embedding the flipped devices allows for smallest loop inductance and for layering of components on top and bottom 43 Passive Layer Design • Low Temperature Co-fired Ceramics (LTCC) is used to integrate inductor • Made by laminating many sheets of 60-100μm thick ferrite tape • In the middle layer, y , silver paste p is used for the conductor trace • The layers are then pressed together and sintered at 900oC L (nH) LTCC inductor Commercial inductor I (A) Advantage of LTCC is its nonlinear inductance profile 44 Stacked Power Module A bi t temperature=23 Ambient t t 23oC Efficiiency Vo=1.2V, 1.3MHz PCB Active Layer DBC Active Layer DBC Without driving loss Io (A) Natural convection – so no fan is used 260 W/in3 power density 45 Coupled Inductors LTCC coupled inductors Process A A I2 L2 L1 A’ I1 A’ Size Reduction 2* NonNon-coupled inductors 13 3 mm 18 8 mm 2 phase coupled inductors 28% footprint reduction 37% volume l reduction d ti 18 mm 18 mm 46 Alternative Planner Inductor Structure -- Vertical Flux vs Lateral Flux Vs Lateral flux Vertical flux 900 Vertical flux inductor 800 Lateral flux inductor 700 L (nH) Lateral flux inductor 600 500 400 300 200 100 Vertical flux inductor 0 35% footprint reduction 0 2 4 6 8 IDC (A) 10 12 14 16 47 Technology Roadmap Industry Academia Roadblocks & Barriers • • • • Device Integrated magnetics Packaging Density • • • • Cost Reliability EMI Thermal management 48 Acknowledgement This work was supported by International Rectifier. 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