Solid State Phenomena Vol. 134 (2008) pp 129-131
Online available since 2007/Nov/20 at www.scientific.net
© (2008) Trans Tech Publications, Switzerland
doi:10.4028/www.scientific.net/SSP.134.129
I: Ultra-Shallow Junction Cleaning: Metrology for Evaluating Dopant
Loss and Substrate Erosion
M. S. Ameen1, a, A. K. Srivastava, I. L. Berryb
1
Axcelis Technologies, 108 Cherry Hill Drive, Beverly, MA, 01950, USA
a
mike.ameen@axcelis.com, bivan.berry@axcelis.com
Keywords: plasma ashing, ultra-shallow implants, dopant loss, wet cleans
within the native oxide film. For implants
that are 300 eV or less, up to 60% and more
of the total implanted dose will be within 2
nm of the surface. The boron in this nearsurface proximity will be sensitive to any
surface treatments, including oxidation,
etching, and thermal treatments that are
standard in post-implant cleaning and dopant
activation processes.
100%
90%
Native Oxide
Abstract
We have investigated the use of Rs and SIMS
measurements to quantify substrate erosion
due to plasma ashing and subsequent wet
cleaning in the creation of ultra-shallow
junctions. The near-surface proximity of the
implants makes them highly sensitive to
various plasma and wet chemical processes.
We also observed a dependency on the
implant species, dose and energy that can be
correlated to substrate damage incurred during
implant.
80%
Introduction
Plasma ashing followed by wet cleaning is
standard processing for stripping photoresist
from wafers. One requirement that has been
highlighted recently is the need for “zero
substrate loss” (ZSL) in the post processing of
low energy implants in order to minimize 1)
silicon loss due to oxidation or etching, and 2)
dopant loss from the Si that will result in
different electrical properties of the devices.
The need for ZSL places strict boundaries on
the processing of the wafer after implant, in
terms of the chemistries used and thermal
budget of the process.
The sensitivity of ultra-low energy implants to
surface effects is demonstrated in Figure 1. In
this figure, the cumulative dose is plotted
verses depth for low energy B+ implanted into
crystalline silicon at a dose of 1 x 1015
ions/cm2 for 0.30, 0.5, and 1 keV implants.
The native oxide thickness is represented in
the shaded area for a bare wafer. For the case
of 1 keV implants, the figure illustrates that >
25% of the total implanted boron is contained
% Dose
70%
60%
300 eV
50%
500 eV
40%
1 keV
30%
20%
10%
0%
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
80.0
90.0 100.0
Depth, Å
Figure 1. Cumulative dose verses thickness
for ultra-low energy implants.
Quantification of ZSL is challenging due to
the small dimensions being measured and the
limitations and expenses of existing methods.
Optical and surface photo-voltage (SPV)
techniques, including interferometry and
ellipsometry are subject to changes in surface
roughness and index of refraction,
transmission electron microscopy (TEM) is
costly and time consuming.
In this paper we use the standard dopant
evaluation techniques of sheet resistance (Rs)
and secondary ion mass spectrometry (SIMS)
to quantify the effect of ashing and wet
cleaning on the dopants implanted in the near
surface. We have evaluated standard ashing
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Ultra Clean Processing of Semiconductor Surfaces VIII
conditions using either CF4 or non-CF4 based
plasmas in a downstream microwave asher,
and oxidizing and reducing wet cleans. This
paper focuses on some of the metrology issues
associated with ZSL. The second paper
outlines process optimization and recipe
development required for 45 nm ashing [1].
Experiment Description
Implants. Implants of 11B+ were done from
500 eV –2.0 keV into 200 mm n-type wafers.
BF2+ was implanted at 1 keV (200 eV B
equivalence) and 2.3 keV (500 eV
equivalence) at the same dose. Arsenic was
implanted at 2 keV. All implants were at
doses of 5 x 1014 ions/cm2. The Boron
energies used will place all of the dopant
within 50 Å of the surface. The project range
of 2keV As is also 50 Å.
Post Implant Processing. Implanted wafers
were processed using standard ashing
chemistries in a downstream microwave
asher. Recipes typically are based on oxygen
and forming gas plasma, with or without CF4
added. After ashing, a split of wafers was run
through a 10 second wet clean consisting of
either 100:1 HF or 1:1 H2O2/H2SO4 (SPM)
cleans. The HF dip is known to remove
surface oxide; the SPM clean does not.
Wafers were then annealed in a single-wafer
furnace at 950oC for 10 seconds prior to
measuring the Rs values. Table 1 shows a
representative split for the experiments.
Table I: Representative split for process
variables used in the experimental matrix.
Wafer ID
0.5 keV B, 5e14
Plasma Ash
O2 based rapid strip
O2 + CF4
Wet Clean
HF dip (Clean 1)
(H2SO4/H2O2) (Clean 2)
NO CLEAN
Anneal
Anneal (950oC 5 sec)
Analysis
SIMS
Rs Measurements
SPV Measurements
1 2 3 4 5 6 7 8 9 10 11 12 13
x x x x x x x x x x x x x
Results and Discussion
Figure 2 shows results of the Rs after ashing
and wet cleaning the surface. The Rs values
will increase if dopant is lost or rendered
inactive in the surface. Lower Rs values
indicate more active dopant remaining in the
silicon. The first point in the figure is a
control sample that did not receive ash or wet
clean prior to annealing.
Figure 2 indicates that CF4-containing ashing
processes remove more dopant than the
oxygen-only process in all cases. We also
observe that more dopant is retained in
samples that received an oxygen ash and SPM
clean than in the control wafer. This is
believed to be due to the formation of an
oxide layer during either ashing or SPM
clean. This oxide layer prevents dopant from
out-diffusing during the annealing process and
results in lower Rs. The HF dip may be
removing dopant in the near surface as it
etches the oxide. This effect is enhanced
during anneal since dopant is free to outdiffuse. It is unclear at this time why the HF
clean in combination with the CF4 ash had
more dopant retained than in the no-HF dip
case.
2500
2000
Rs (Ohms/Sq)
130
No Ash or Clean
CF4 Ash
O2 Ash
1500
1000
500
0
x x x
x x x
x
x
x
x
x
x
As-Implanted
x x x
x
x
x
x
No Clean
Figure 2. Results from ashing and cleaning of
500 eV B+, 5x1014 ions/cm2.
x
x
x
x x x x x x
x x x x
x x x x x x
x x x x x x
H2O2/H2SO4
Treatment
x
x
HF Dip
x
x
x
Solid State Phenomena Vol. 134
131
1E+22
B concentration [/cm3]
1E+21
1E+20
O2 ash + Anneal
No Clean + Anneal
1E+19
Low CF4 Ash + SPM + Anneal
High CF4 Ash + SPM + Anneal
1E+18
1E+17
1E+16
0
200
400
600
800
1000
Depth [A]
Figure 3. SIMS profiles of 500 eV Boron
following ashing in O2 and CF4 based
plasmas.
Figure 3 shows the corresponding SIMS
profiles for low energy Boron implants after
ashing and cleaning. The wafers ashed in
oxygen-based plasmas have nearly identical
profiles to the as-implanted wafers. This is
expected based on the Rs results. The profiles
also clearly indicate that the CF4-based
plasmas are etching the surface. A lower flow
CF4 process reduces the effect; this approach
may provide an acceptable trade-off when
considering requirements for residue removal
of high dose ion implanted photoresist. This
is discussed further in our second paper [1].
Oxide growth after ashing is shown in Figure
4 for each of the implant conditions used in
this study. We observe that the initial oxide
thickness, as measured by ellipsometry, varies
somewhat as a function of implant conditions.
This is most likely due to damage introduced
by the implant, though other factors may play
a role as well. The oxygen plasma, as
expected, forms a thicker oxide.
Figure 4. Oxide thickness after ash treatments.
We observe that the CF4-based process results
in an increase in oxide thickness of several
angstroms. While this may be a measurement
artifact, the CF4-based process is known to
remove dopant; hence the oxide formed may
be due to a competitive etching/oxidation
process occurring during the ashing.
Summary
We have shown that shallow implants are
sensitive to post-cleaning processes that are
typically used to remove photoresist residues
and prepare the devices for annealing. Rs
combined with SIMS and surface oxide
measurements give a good indicator of how
aggressive the clean process has been in terms
of substrate erosion.
References
[1] Ultrashallow junction cleaning:
Metrology for Evaluating Dopant Loss and
Substrate Erosion, A. K. Srivastava1, K. Han,
M. Ameen, I. Berry, S. Rounds. This
conference, 2006.
Ultra Clean Processing of Semiconductor Surfaces VIII
10.4028/www.scientific.net/SSP.134
I: Ultra-Shallow Junction Cleaning: Metrology for Evaluating Dopant Loss and Substrate Erosion
10.4028/www.scientific.net/SSP.134.129