EE 210 Op Amp Design Formal Lab Report

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Michael Tang
TA: Ketobi
Lab Station #5
Section 1
7/18/13
Partners: Matt, Ryan
Task 1: Basic Inverting Amplifier
Design Objective:
For this task, a basic inverting amplifier was needed to be designed to amplify the output signal
of a dynamic microphone. The output has to be inverted.
Schematic:
Theory of Operation:
The input signal of 200 mVpp would go through the circuit and the output would be measured at
16 Vpp. The signal flows through the inverting op amp consisting of two resistors. The op amp
would have a gain of -80 in order to amplify the signal to the desired amount.
Derivations/Analysis:
Gain for inverting amplifier: x = - (Vout/Vin) = - 16Vpp / 0.2 Vpp = -80
Resistor values: -80 = - (R2/R1)
R2 = 80k ohms, R1 = 1k ohms
Experimental Results:
R1 = 991 ohms, R2 = 81.1k ohms
Vin = 0.21 Vpp, Vout = 16.6 Vpp
Oscilloscope screenshot is included.
Percent error of output signal = ((16 – 16.6) / 16.6) x 100% = 3.61%
Results/Concluding Thoughts:
The inverting amplifier that we designed worked well and followed the given conditions. The
output signal was close 16 Vpp as the design called for. The circuit amplified and inverted the
input signal as it was supposed to. If errors were to occur in our circuit, it would be caused be the
resistors, since the resistors control the gain of the op amp. Our design worked well, but to lower
the output signal, we would change the resistor values and make sure the gain doesn’t go over
-80.
Task 2: Weighted Summing Amplifier
Design Objective:
For this task, there are two unbalanced channels due to a stereo signal. To balance them, a
weighted summing amplifier is needed. The sum of the outputs also has to be inverted.
Schematic:
Theory of Operation:
This circuit would have one inverting op amp and three resistors to control the gains coming
from the two unbalanced channels. The resistors will be selected to control the output signal
coming from each channel. The two channels should have the same output signal coming out.
The two output signals are added, since a summing amplifier is used, and should produce an
output signal around 16 Vpp.
Analysis:
Output Voltage of each channel needs to be 8 Vpp.
Gain for left channel = 8Vpp / 0.5 Vpp = 16
Gain for right channel = 8 Vpp / 0.2 Vpp = 40
40 = R3/R1, 16 = R3/R2
Setting the two equations equal:
40R1 = 16R2  2.5R1 = R2
We chose R1 = 10k ohms and R2 = 25k ohms
R3 is found by substituting R1 or R2 in the gain equation for one of the channels.
R3 = 400k ohms
Experimental Results:
R1 = 10.6k ohms, R2 = 23.79k ohms, R3 = 390k ohms
Vout = 15.9 Vpp
Percent error Vout: ((16 - 15.9)/15.9) x 100% = 0.63 %
Note: Oscilloscope screenshot not included because you (Ketobi) forgot to mention to us to take
them at the time.]
Results/Concluding Thoughts:
Our circuit worked well enough to get the output signal close to 16 Vpp. The error wasn’t so
significant, so we were satisfied with our circuit design. If we were to change anything about this
circuit, it would be the resistor used in the circuit so that we could get values closer to the
nominal values of the resistors we selected. Aside from using different resistors, we wouldn’t
change anything about the design.
Task 3: Two Channel Mixer with Balanced Inputs
Design Objective:
For this task, a balanced stereo signal is given where the two channels have the same voltage
amplitude. The design calls for the ability to mix the channels into a single inverted output while
independently varying the gains of the two channels. An op amp circuit with two potentiometers
is needed in order to achieve this.
Schematic:
Theory of Operation:
This circuit has two potentiometers to control the two channel inputs independently. Adjusting
both to 0% will yield close to 16Vpp while adjusting both to 100% yields 0.4Vpp. This circuit is
a summing amplifier circuit. R1 and R2 will be the same because the two input signals from both
channels are the same.
Analysis:
R1 = R2
Vout min = (R3/(R2+20k))Vleft + (R3/(R1+20k))Vright = 0.2V
Vout max = (R3/R2)Vleft + (R3/R1)Vright = 8V
(R3/R1)(Vleft + Vright) = 8V
(R3/R1)(0.5) = 8V
R3 = 16R1
Substitute R3 in the Vout min equation.
(16R1(0.25))/(R1+20) + ((16R1)(0.25))/(R1+20) = 0.2V
15.6R1 = 8000
R1 = R2 = 512.8 ohms
R3= 8.205k ohms
Experimental Results:
Oscilloscope screenshots from multisim will be attached.
Percent error Vout min: ((0.4 – 0.396) / 0.396) x 100% = 1.01%
Percent error Vout max: ((16 - 14.6) / 14.6) x 100% = 9.59%
Results/Concluding Thoughts:
The circuit worked for the Vout min when both of the potentiometers were turned to 100%. For
Vout max, the result was more than 1 V off. This is due to the usage of resistors less than 1k
ohms. The smaller resistors are more affected by the loading effect which causes the voltage
reading to be less than expected. If I were to redesign this circuit, I would try to use larger
resistors to avoid the loading effect.
Task 4: Level-Shifting Amplifier
Design Objective:
For this task, the input signal is a mono signal. A DC offset exists and it needs to be removed.
The output of the circuit has to remove the DC offset and invert and amplify the output. To
achieve this, a level shifting amplifier has to be created.
Schematic:
Theory of Operation:
This circuit uses a level-shifting amplifier to cancel the DC offset. This circuit has one op amp
and two resistors. The circuit acts similarly to a subtracting amplifier except one of the inputs is
DC constant. The circuit will essentially subtract the DC offset to cancel it.
Analysis:
Gain = 16 Vpp / 0.6 Vpp = 26.6667
-26.6667 = R2/R1
We chose R1 = 2k ohms, R2 = 53.333k ohms.
For the non-inverting part:
Vb( 1+ (R2/R1)) = 2.5 V where 2.5 is the DC offset
Vb(27.666) = 2.5V
Vb = 0.09036 V  the voltage we put into the positive terminal
Experimental Results:
Vout = 15.8 V
Percent error: ((16 – 15.8) / 15.8) x 100% = 1.27 %
Oscilloscope screenshot is attached.
Results/Concluding Thoughts:
Our design worked well and it successfully canceled the DC offset. The percent error found was
due to the resistors’ values not being precisely what we needed since we used common resistor
values instead of custom made exact values. The only thing we would change for this task is the
resistors used to match the exact resistor values needed to get the exact output signal.
Task 5: Variable Level-shifting Amplifier
Design Objective:
For this task, the input signal is a mono signal, but the DC offset is variable within a given range
of 1V to 3V. The output needs to be inverted and amplified and the DC offset needs to remove.
A level shifting amplifier needs to be created with a potentiometer within the circuit.
Schematic:
Theory of Operation:
The circuit is supposed to cancel out a DC offset between 1V and 3V. A potentiometer was used
to accomplish this. This circuit works similar to the previous task’s circuit as a level shifting
amplifier.
Analysis:
vout = -(R2/R1)Va + ((R2+R1) + 1)(R4/(R3+R4+Rpot))Vb  difference amp equation
Experimental Results:
N/A
I couldn’t figure out the resistor values, so I have no simulation to show.
Results/Concluding Thoughts:
I had a complication in calculating the resistor values. Vb is not known which means you have to
calculate it based off of 1V to 3V DC source values. I tried finding the gain for the inverting part
of the op amp, then tried solving for Vb, but I couldn’t come up with the correct resistor values.
Questions:
1. To make my circuit a variable gain amplifier, I would add a potentiometer in series with
R1 (the smaller resistor).
Vmax = 16 Vpp= 0.2 Vpp * (R2/R1)
Vmin = 8 Vpp = 0.2 Vpp * (R2/ (R1 +20k))
Solving for R2: R2 = 40R1 + 800k
Substitute R2 back into Vmax equation: R1 = 20k ohms and R2 = 1600k ohms
2. If you didn’t invert the balanced signal, you wouldn’t get a negative result. To fix this, I
would use two inverted op amp for each channel and sum the outputs with another noninverting op amp with a gain of 1. This is unnecessary work to not invert the sum.
3. The complication is trying to get 0 Vpp. When calculating the ratio of R3 over R1, you
find that it would be 0, which is a problem in finding the resistor values by plugging R3
in the Vout max equation. To fix this, I would add a third potentiometer in series with R3,
so that the resistance there can be very small to get a small resistor ratio so the gain will
be close to 0.
4. If you wanted variable signal amplification, you have to take into account what Vb is
going to be since R1 or R2 is changing. You have to change Vb to remove the DC offset
for each change turn of the potentiometer.
5. Variable signal amplification would change the values of R1 and R2, so you need to
change Vb to cancel out the DC offset. It is a similar issue with number 4.
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