2. Single Stage OpAmps
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2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 2. Single Stage OpAmps Francesc Serra Graells francesc.serra.graells@uab.cat Departament de Microelectrònica i Sistemes Electrònics Universitat Autònoma de Barcelona paco.serra@imb-cnm.csic.es Integrated Circuits and Systems IMB-CNM(CSIC) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 1 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 3 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Single-Transistor Topologies Operational voltage amplifier (OpAmp)? Current-driven bias point to control circuit power Common source Supposing forward saturation, drain is selected as output port due to its high impedance (CLM): Common gate Design of Analog and Mixed Integrated Circuits and Systems Back gate F. Serra Graells 4 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 5 /74 Single-Transistor Topologies Operational voltage amplifier (OpAmp)? Supposing forward saturation, drain is selected as output port due to its high impedance (CLM): Current-driven bias point to control circuit power Power efficiency Common source Common gate Back gate Moderate Gm/ID Highest Gm/ID Lowest Gm/ID High input impedance Low input impedance Low input impedance Inverting amplifier Non-inverting amplifier Inverting amplifier Easier feedback p+ n+ Design of Analog and Mixed Integrated Circuits and Systems n+ Latchup Triple-well required F. Serra Graells Mono 2. Single Stage OpAmps Differential CMFB Folded Cascode Gain 6 /74 Voltage Transfer Curve Large signal analysis of common source amplifier: M1 e.g. autobiasing M1 operating in strong inversion and forward saturation: M1 VB=0 unless specified CLM negligible in large signal M1 in saturation M1 in conduction Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Gain and Frequency Response Common source small signal analysis: Incremental equivalent circuit: M1 D M1 strong inversion and forward saturation bias point G B D S G B S Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 7 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 8 /74 Gain and Frequency Response Incremental equivalent circuit: DC voltage gain M1 3dB/oct 6dB/oct 3dB/oct In general, for CMOS amplifiers: M1 strong inversion and forward saturation bias point Design of Analog and Mixed Integrated Circuits and Systems input transconductance F. Serra Graells output resistance 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 9 /74 Gain and Frequency Response Incremental equivalent circuit: Spectral bandwidth open-loop closed-loop -20dB/dec M1 max. closed-loop (i.e. follower) Frequency 0.5oct/oct M1 strong inversion and forward saturation bias point 0.5oct/oct Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Dynamic Range Differential CMFB Folded Cascode Gain Thermal noise contribution only (f > flicker corner): Noise equivalent circuit: x10 (20dB) x1 (0dB) Time Equivalent input noise: Uncorrelated phenomena and low-frequency: Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 10 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 11 /74 Thermal noise contribution only (f > flicker corner): Dynamic Range Noise equivalent circuit: x10 (20dB) x1 (0dB) Time 1.5dB/oct Bandwidth Temp erature Supply Power Dynamic Range 3dB/oct Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Full CMOS Circuit Similar performance analysis: M3 Large signal VTC: M2 M2 in conduction M2 in saturation M1 All operating in strong inversion and forward saturation bias points: M1 in saturation M1 in conduction Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 12 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 13 /74 Full CMOS Circuit Similar performance analysis: M3 Small signal gain and bandwidth: M2 3dB/oct M1 6dB/oct 3dB/oct All operating in strong inversion and forward saturation bias points: 0.5oct/oct 0.5oct/oct Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 14 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Fully-Differential vs Single-Ended Single-ended OpAmps: Power rails resistive parasitics Compact area and power Poor signal integrity Digital M1 Capacitive/inductive coupling parasitics Dynamic sources of interference: Large signals (e.g. digital states) Power supply currents EM fields Temperature gradients Mechanical stress Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 15 /74 Mono 2. Single Stage OpAmps Differential CMFB Folded Cascode Gain Fully-Differential vs Single-Ended Pseudo-differential OpAmps: Signal true info Digital M1 M2 Signal baseline only Interference rejection Area and power overheads (x2) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 16 /74 Mono 2. Single Stage OpAmps Differential CMFB Folded Cascode Gain Fully-Differential vs Single-Ended Pseudo-differential OpAmps: Signal true info Digital M1 M2 Signal baseline only Interference rejection Area and power overheads (x2) Full-scale extension (+6dB) Noise increase (+3dB) SNR (+3dB) Time Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 17 /74 Mono 2. Single Stage OpAmps Differential CMFB Folded Cascode Gain Fully-Differential vs Single-Ended Pseudo-differential OpAmps: Signal true info Digital M1 M2 Signal baseline only Interference rejection Area and power overheads (x2) Full-scale extension (+6dB) Noise increase (+3dB) SNR (+3dB) Distortion cancellation (even harm.) Limited by device matching Design of Analog and Mixed Integrated Circuits and Systems Time F. Serra Graells 18 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : : 2 device multiplicity same aspect ratio Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 19 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 20 /74 Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : Differential input only: : M5 ? M3 M6 M1 M2 M4 2 device multiplicity same aspect ratio Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells ? 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : Differential input only: : M5 M6 M1 M3 M2 M4 2 device multiplicity M5-6 current mirror asymmetry Not full cancellation of unwanted terms same aspect ratio Mostly used for single-ended signaling Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 21 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Fully-Differential OpAmps Basic CMOS topology: 1 : 1 : Gain All operating in strong inversion saturation + neglecting CLM Large signal VTC: 1 M7 in conduction M5 M7 M1 M2 M7 in saturation M4 M3 1 M6 : 2 22 /74 M2 in saturation M2 in conduction Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 : M6 Gain All operating in strong inversion saturation + neglecting CLM Large signal VTC: 1 M7 M1 in conduction M1 in saturation M1 1 M2 M4 M3 : 2 Reduced output range 23 /74 M2 in saturation M2 in conduction Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 Large signal VTC: 1 M6 M7 M1 M2 : 24 /74 All operating in strong inversion saturation + neglecting CLM M4 M3 1 : Gain 2 Reduced output range Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 Large signal VTC: 1 M6 M7 M1 M2 : 25 /74 All operating in strong inversion saturation + neglecting CLM M4 M3 1 : Gain 2 Reduced output range Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 : Gain 26 /74 All operating in strong inversion saturation + neglecting CLM Large signal VTC: 1 M6 M7 M1 M2 M4 M3 Prob. 1 : 2 Reduced output range More offset contributions Pelgrom's Law Threshold voltage mismatching only Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 27 /74 Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : Small signal differential and common DC gains: : 2 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 28 /74 Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : Small signal differential and common DC gains: : differential output 2 common output differential input Design of Analog and Mixed Integrated Circuits and Systems common input F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 29 /74 Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : : Small signal differential and common DC gains: Perfect matching (M1=M2 and M6=M7): 2 differential output differential input Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 30 /74 Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : : Small signal differential and common DC gains: Perfect matching (M1=M2 and M6=M7): 2 Real matching (e.g. VTH1=VTH2): Neglecting common output Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Fully-Differential OpAmps Basic CMOS topology: 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : Summary of design guidelines: : 2 Reduced output range Matching is critical performance Design of Analog and Mixed Integrated Circuits and Systems resources F. Serra Graells 31 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 32 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 33 /74 Common-Mode Output Issue Single-ended differential OpAmps: Fully-differential OpAmps: e.g. max. feedback M5 M6 M1 M3 M5 M2 M4 Well-defined and stable common-mode level M3 M6 M7 M1 M2 M4 High sensitivity to technology mismatching (M5-M6|7 and M3-M4)! Specific auxiliary control circuitry is needed in practice... Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Common-Mode Output Issue Common-mode feedback (CMFB) loop: M1 M2 M1 M2 Behaviorally equivalent... CMFB control functionality: Sensing common-mode output Computing error according to reference level Applying needed common-mode correction Not to be confused with CMRR! Multi-stage OpAmps require one CMFB loops for each stage CMFB control design? Design of Analog and Mixed Integrated Circuits and Systems gain bandwidth F. Serra Graells accuracy stability 34 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Continuous-Time CMFB Resistive-based sensing: Passive common-mode output estimation M4 M5 M6 R1 M1 R2 M2 M3 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 35 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Continuous-Time CMFB Resistive-based sensing: Passive common-mode output estimation M4 M5 M6 R1 M1 R2 M2 M3 OpAmp original OR is preserved Resistive extra loading... Design of Analog and Mixed Integrated Circuits and Systems ...or limited CMFB bandwidth F. Serra Graells 36 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Continuous-Time CMFB Resistive-based sensing: M4 M5 M6 M7 M8 M1 M2 R1 R2 M3 Resistive loading is avoided OR severe reduction Power consumption overhead Common-mode output level is technology dependent! Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 37 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Continuous-Time CMFB Resistive-based sensing: M4 M5 M6 M7 Master-slave automatic tuning M8 M1 M2 R1 R2 M3 M9 Resistive loading is avoided OR severe reduction Power consumption overhead Common-mode output level is technology dependent! Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 38 /74 Mono 2. Single Stage OpAmps Differential CMFB Folded Cascode Gain Continuous-Time CMFB Resistive-based sensing: Low-pass CMFB filtering C1 M5 M6 R1 R2 M1 M4 M3 1 M2 : 2 Compact circuit solution Common-mode output defined by technology No power consumption overhead Strong OR reduction Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 39 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Continuous-Time CMFB MOS-based sensing: M8 M9 M1 M4 x1 Supposing M5, M6 and M7 working in deep conduction: M10 M2 By CMFB symmetry (M5=M6): M3 x2 M7 M6 M5 By bias symmetry (M5|6=M7 and M3=M4): Master-slave tuning Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 40 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Continuous-Time CMFB MOS-based sensing: M8 M9 M1 M4 x1 M10 M2 By CMFB symmetry (M5=M6): M3 x2 M7 Master-slave tuning Supposing M5, M6 and M7 working in deep conduction: M6 M5 By bias symmetry (M5|6=M7 and M3=M4): Resistive loading is avoided Negligible OR reduction No power consumption overhead Technology compensation Gain non-linearity Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 41 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Discrete-Time CMFB Switched-capacitor (SC) implementation: e.g. fully-differential integrator stage clock C2P C1P C1N C2N Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 42 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Discrete-Time CMFB Switched-capacitor (SC) implementation: e.g. fully-differential integrator stage M6 M5 clock C2P M1 M7 M2 C1P M4 M3 CFP CFN C1N C2N Capacitive CMFB sensing Reduced power overheads Low loop-gain Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 43 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 44 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Output Range Issue Basic fully-differential topology (not showing CMFB): 1 : 1 M5 1 M6 M7 M1 M2 M4 M3 1 : : 2 Time OR improvement requires very large aspect ratios! Not compatible with other optimization rules (e.g. CMRR) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 45 /74 Mono 2. Single Stage OpAmps Differential CMFB Folded Cascode Gain Folded Topologies Fully-differential folded OpAmp (not showing CMFB): : 1 1 M4 ? 1 M3 M5 M1 M2 M8 M7 : 1 : 1 M6 ? M9 : 2 1 M10 : 1 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 46 /74 Mono 2. Single Stage OpAmps Differential CMFB Folded Folded Topologies Cascode Gain All operating in strong inversion saturation + neglecting CLM Fully-differential folded OpAmp (not showing CMFB): Still a single stage Opamp! low-impedance nodes 1 : 1 M4 1 : 1 : 1 M3 M5 M1 M2 M8 M7 2 1 M6 M9 : 47 /74 M10 : 1 Static power consumption (x2) Device silicon area (x2) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells Mono 2. Single Stage OpAmps Differential CMFB Folded Folded Topologies Cascode Gain All operating in strong inversion saturation + neglecting CLM Fully-differential folded OpAmp (not showing CMFB): Still a single stage Opamp! low-impedance nodes 1 : 1 M4 1 : 1 : 1 M3 M5 M1 M2 M8 M7 2 Static power consumption (x2) 1 M6 M9 : 48 /74 M10 : 1 Full-scale OR optimization Device silicon area (x2) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells Mono 2. Single Stage OpAmps Differential CMFB Folded Folded Topologies Cascode Gain All operating in strong inversion saturation + neglecting CLM Fully-differential folded OpAmp (not showing CMFB): 1 : 1 M4 1 : 1 : 1 M3 M5 M1 M2 M8 M7 2 1 M6 M9 : 49 /74 M10 : 1 Static power consumption (x2) Full-scale OR optimization Device silicon area (x2) High supply voltage needed... Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Folded Topologies Fully-differential dual folded OpAmp (not showing CMFB): 1 : 1 : M6 M5 M4 M1 M2 M7 1 M10 M8 M13 M12 1 : 2 M3 M9 M11 : 2 : 2 Static power consumption (x3) Device silicon area (x3) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 50 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Folded Topologies Cascode Gain 51 /74 All operating in strong inversion saturation + neglecting CLM Fully-differential dual folded OpAmp (not showing CMFB): 1 : 1 : M4 low-impedance nodes M6 M5 M1 M2 1 Still a single stage Opamp! M10 Suposing: M7 M8 M13 M12 1 : 2 M3 M9 M11 : 2 : 2 Static power consumption (x3) Same OR optimization Device silicon area (x3) Compatible with low supply voltage Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells Mono 2. Single Stage OpAmps Differential CMFB Folded 1 Folded Topologies : M4 : 1 M4 1 M3 M5 M1 M2 1 1 M5 M1 M2 : 1 : 2 M6 M9 1 : 2 : M10 1 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 1 M6 M9 M8 M7 1 : M3 52 /74 : 1 M8 M7 Gain 1 Single-ended folded OpAmp counterparts: 1 Cascode M10 : 1 Mono 2. Single Stage OpAmps Folded Topologies 1 Differential CMFB : 1 Cascode M5 M1 M2 M13 : : 1 M9 : M6 M5 M4 M1 M2 M7 M8 M13 M12 1 M10 2 M3 M11 2 1 : 2 : 2 Design of Analog and Mixed Integrated Circuits and Systems : 2 M4 M12 1 53 /74 M3 M6 1 Gain : 2 M9 M11 Single-ended folded OpAmp counterparts: : Folded F. Serra Graells M7 1 M10 M8 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 54 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Principle Basis CMOS OpAmp general linear model: input transconductance output resistance Enhancement by increasing MOSFET output impedance? Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 55 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Principle Basis CMOS OpAmp general linear model: -20dB/dec Frequency input transconductance output resistance Gain improvement: Enhancement by increasing MOSFET output impedance? Accurate feedback functions Lower equivalent input noise No speed enhancement (GBW) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 56 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Principle of Operation Output impedance multiplier: Introducing cascoding in OpAmps: DC voltage biasing level M2 cascode device transconductor M1 device my device cascode device Aplicable to most analog basic building blocks (e.g. current mirror, voltage differential pair) Design of Analog and Mixed Integrated Circuits and Systems M2 M1 voltage attenuation F. Serra Graells 57 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Basic Cascode OpAmp Low-frequency small-signal analysis: CMOS OpAmp model: M2 M1 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 58 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Basic Cascode OpAmp Low-frequency small-signal analysis: CMOS OpAmp model: M2 M1 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 59 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Basic Cascode OpAmp Low-frequency small-signal analysis: M2 CMOS OpAmp model: voltage gain factor! similar transconductance M1 series combination voltage gain factor! higher output impedance output impedance of cascode device output impedance of transconductor device Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 60 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Regulated Cascode OpAmp ? ? M2 M1 even larger attenuation factors! Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 61 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Regulated Cascode OpAmp Low-frequency small-signal analysis: CMOS OpAmp model: M2 M1 even larger attenuation factors! Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 62 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Regulated Cascode OpAmp Low-frequency small-signal analysis: CMOS OpAmp model: M2 M1 even larger attenuation factors! Minimalist implementation: M2 M3 M1 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 63 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Output Range Optimization M2 M3 M1 alternative low-voltage approach: M3 64 /74 All operating in strong inversion saturation + neglecting CLM Basic cascode DC biasing: M4 Gain Regulated cascode DC biasing: supposing M2=M4: M4 M2 M3 M1 operating in strong inversion conduction M2 M1 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Practical Cascode OpAmps Fully differential + folded + cascode topology example: cascoding not needed here... optimized DC biasing M4 M3 M7 M6 M8 M1 M11 M10 M14 M5 low-impedance nodes M9 M2 M12 M15 Design of Analog and Mixed Integrated Circuits and Systems dual cascoding required! M13 M16 F. Serra Graells 65 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 1 The Mono-Transistor Amplifier 2 Differential Topologies 3 Common Mode Feedback 4 Folded Amplifiers 5 Cascode Topologies 6 Gain Enhancement Techniques Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 66 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Principle Basis CMOS OpAmp general linear model: input transconductance output resistance Enhancement by increasing MOSFET input transconductance? Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 67 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Principle Basis CMOS OpAmp general linear model: -20dB/dec Frequency input transconductance output resistance Gain improvement: Enhancement by increasing MOSFET input transconductance? Accurate feedback functions Lower equivalent input noise Speed enhancement (GBW) Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 68 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Partial Positive Feedback Basic differential transconductor: M1 M2 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 69 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain 70 /74 Partial Positive Feedback Basic differential transconductor: Introducing local positive feedback: Folded structure Cross-coupled pair M1 Partial feedback design by sizing ratio M2 keeping same large signal range cross-coupled devices 1 M4 : 1 : 1/N 1/N : 1 M3 M7 M8 M5 low-impedance nodes M1 : 1 M6 M2 still a single stage transconductor... Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Partial Positive Feedback Small signal transconductance: 1 M4 : 1 : 1/N 1/N : 1 M3 M7 M8 M5 M1 : 1 M6 M2 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 71 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Partial Positive Feedback Small signal transconductance: 1 M4 : 1 : 1/N 1/N : 1 M3 M7 M8 M5 M1 Half-circuit analysis: : 1 M6 Perfect symmetry (no mismatching) Infinite tail sink resistance Purely differential input M2 common-mode = virtual ground Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 72 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Partial Positive Feedback Small signal transconductance: 1 M4 : 1 : 1/N 1/N : 1 M3 M7 M8 M5 M1 Half-circuit analysis: : 1 M6 Perfect symmetry (no mismatching) Infinite tail sink resistance Purely differential input M2 Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 73 /74 2. Single Stage OpAmps Mono Differential CMFB Folded Cascode Gain Practical Gain Enhanced OpAmp Single-ended + folded + cross-coupled example: M4 M3 M7 M1 M9 M8 M5 M6 Larger gain and GBW Compatible with folding and cascoding M2 M10 Local positive feedback vs global negative feedback: Prone to instability It can generate hysteresis Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells 74 /74
