Lab 5 Common Emitter Amplifier Discussion The emitter amplifier with emitter degeneration is displayed in fig. 5.1. The choice of values for resistors RC , RE , R1 , and R2 constitutes the design of the amplifier. The amplifier as drawn is for a.c. signals. The a.c. signal vi is coupled to the amplifier by the input capacitance Ci and the output appears after capacitor Co . The design of the amplifier is not an exact process in the sense that we will be able exactly to choose the right values of the components and obtain exactly the response we want. On the other hand, using the input and output characteristic curves from lab 4 we shall be able to make reasonable first choices for the values of the resistors. Before we go into that design process let us redraw the amplifier as in fig. 5.2 using the h parameters. This will enable us to see the importance of the different components. First to be noted in the equivalent circuit of fig. 5.2 is that this is an a.c. circuit so the bias network R1 −R2 , as well as the capacitors have been dropped. Also notice that the input signal vi and the output signal v0 are measured relative to ground and that the emitter is not at ground potential. The response function of the amplifier is called amplification and is defined by A = v0/vi (1) Using Kirchoff’s laws we obtain the following relations; about loop o : ic RC + vo = 0 (2a) about loop i: ibhie + hre vce + ie RE = vi emitter node: ib + hf e ib = ie collector node: ic + io = hf eib (2b) (2c) (2d) Using equations 2 we can write for A A = −hf e RC /(hre vce /ib + hie + (1 + hf e)RE ) (3) This expression for A can be substantially simplified once we realize tha hf e is a big number and usually hre and hie are small. To the extent that hf e RE >> hie + hre vce/ib the amplification reduces to A = −RC /RE (4) The negative sign is important because it tells us that there is a 180◦ phase shift between the input and output signals. We can now start the design analysis. This will consist in giving us the correct resistances so that the circuit has the desired quiescent point. The quiescent point is the steady state operaton of the amplifier when no input signal is applied. We choose the q. point so the amplifier operates in a reasonably linear portion of the I-V characteristic of the output circuit. Attached are graphs of a typical transistor which will be used for illustration. From graph G1 we choose IC = 4 mA for the quiescent collector current. Suppose we decide that the supply voltage should be +15V, and we want the amplification A = 10. The choise of VC is usually VCC /2 because then the output swings symetrically about VC with the least chance of clipping vo . We determine the values of RC and RE by use of Kirchoff’s law in the output circuit. VCC = IC RC + VCE + IE RE = VCE + IC (RC + RE ) and emitter currents are equal) (5) so the load line equation is IC = (VCC − VCE )/(RCC + RE ) ( assuming collector (6) Notice that in deriving the load line equation we assumed IE is nearly equal to IC . For VC = VCC /2 we get for the quiescent current ICQ ICQ = VCC /(2ARE ) (7) Hence now we can determine the desired values of the output circuit resistors. Output Circuit Design (A) Choose A = 10, ICQ = 4 mA,VCC = +15V, VC = +7.5V (B) from equation (7) we obtain RE = 188 Ω (C) from equation (4) RC = 1880 Ω (D) from equation (6) we obtain the IC intercept when VCE = 0. This enables us to draw the load line since the the intercept on the VCE axis occurs when VCE = VCC and then IC = 0. (E) Hunting for resistor in the lab turns up two resistors, RE = 176Ω and RC = 1794Ω. These are close enough to the design values so that we can proceed to the bias network design. Bias Network Design (A) We want the quiescent value of VE to be VEQ = ICQ ∗RE = 4mA∗176Ω = 0.7V (B) In general for a silicon transistor the base-emitter voltage difference is on the order of 0.6V ( a forward bias pn junction) . So VB = 1.3V . Actually, we can make a better estimate of VB by using the IC vs VBE curve that we measured for the Ebers-Moll model. Investigating graph G2, fig. 5.G2, we see that for a collector current of 4 mA we need VBE = 0.64V . Thus we must ensure that VBE = VEQ + 0.64V = 1.34V (C) If the output impedance of the bias network were very small compared to the input impedance of the transistor looking into the base then we could simply choose R1 , R2 from the voltage divider equation. It turns out that the input impedance of the the transistor can be quite large and is on the order of hf e RE . You can obtain this by analysing fig. 5.2. Let us suppose that the input impedance of the transistor is in fact Rin = hf e RE . The equivalent impedance of the bias network is obtained from Thevenin’s theorem, Req = R1 ||R2 ( parallel combination). The equivalent circuits are in fig.5.3a and fig.5.3b. A sensible choice for Req = Rin/10. Since hf e is about 200 from fig.5.G1 we get Rin = 35KΩ so choose Req = 3.5KΩ. The value of VB in fig.3b is then VB = Veq Rin /(Rin + Req ) (8) So then Veq = 1.47V (D) Knowing Veq and Req we calculate that R1 = 35.7KΩ, R2 = 3.9KΩ. Hunting about the lab we find resistors that give us R2 = 3901Ω and R1 = 30.40K + 5.873K = 36.3KΩ. (Here we added two resistors to get the desired value of R1. The circuit in fig. 5.1 was assembled with these components and the quiescent point values are shown in table 1. Table 1- Quiescent point values item design actual VCC +15V +14.99V VC 7.5 V 7.67 V VE 0.7 V 0.723V IB 23.7µA RC 1880Ω 1794Ω RE 188Ω 176Ω R1 35.7KΩ 36.3KΩ R2 3900Ω 3901Ω Procedure (1) Build your amplifier according to your design results. Make a table like Table 1. You can determine IB by placing a small resistor in place of the conductor from points A to B in fig. 5.1 and measuring the potential drop across it. (2) Choose Co , Ci of about 0.15µF . Place an a.c. signal across vi and measure the amplification A = vo /vi. You will need to reduce the sine wave generator using a voltage divider because the sine wave signal is too large on its own. Choose three frequencies that span the range of the sine wave generator and measure the amplification at these frequencies. Consider in your observations both the absolute value of A and the phase difference between vi and vo . (3) The amplifier we built is called the common emitter amplifier with emitter degeneration. Despite this rather pejorative name it has very good properties. You can see from eqn. 4 that the amplification depends mainly on the ratio of two external resistors. These resistances do not change much when the temperature changes. In addition the amplifier has a farily flat frequency response and constant phase shift. This ensure that the output signal will be a reasonably faithful replica of the input signal except for a change in magnitude and an overall change in sign. The amplifier is a linear device. Recall from Fourier analysis that if the Fourier components of the input signal get treated differently by the network then the ouput shape will be different from the input shape. In contrast, the transistor h parameters are sensitively dependent on temperature. If you were to design an amplifier that depends on the exact values of the h parameters you would have a bad design. In our design we have used the h parameters in only a qualitative way, namely is parameter x much bigger or smaller than parameter y. If you must have the largest possible amplification and do not care about the linearity of the amplifier you place a bypass capacitor across resistor RE , that is in parallel, as in fig.5.4. Choose a value of CE of about 0.22µF (This does not affect the quiescent point. Why?) With the bypass capacitor in place we see from fig. 5.2 that the impedance bewteen E and G is now frequency dependent. In fact, at high enough frequencies the impedance ZEG approaches zero and RE is essentially by passed (for signals !). From eqn. (3) the amplification is then A = −hf e RC /hie (9). (4) Choose two frequencies of the sine wave generator such that the output signal does not get clipped. Observe the amplification and phase shift at both these frequencies and record their values. Figure 1: Measured amplification for 123AP npn transistor vs theory. data (circles), theory(x’s and triangles)