Chunlian Jin 1 , Roger A. Dougal
2
, Shengyi Liu 3
University of South Carolina, Columbia, SC, 29208 *
Abstract –We describe a concept for circuit protection and fault current limitation in DC power systems based on the use of solid-state power switches. The approach could be useful in the increasingly widespread application of DC power distribution networks. During normal operation the power switch is always “on”. During faults, the gate of the solid-state switch is pulse modulated to prevent the circuit current from exceeding a predetermined limit. This lowers the demand on the solid-state switches to withstand and interrupt the fault current and thus makes it possible to use commercially available solid-state switches. The described architecture enables loads in non-faulted parts of the system to ride through the fault current-limiting process unperturbed.
Simulations demonstrate the effectiveness of the strategy and a low power prototype validated the simulation model. The interactions between the protection switches and the upstream converters were studied, and the design equations for the circuit parameters are derived. Simulations and experiments demonstrate that the protection circuit provides a fast and potentially maintenance-free protection solution for high power-density DC systems. This technology is especially significant for applications related to spacecraft and shipboard DC power systems.
A
D
I
0 i
I f
I max
L1
S l
S t
T l
T t
V
D1
V
DC
= amplitude of triangle carrier cycle
= full prospective short circuit current
= current through Load1
= rising edge slope
= falling edge slope time
= forward voltage drop of diode D1
= load bus voltage
I
n many industrial and commercial electric systems, in spacecraft power systems and More Electric Aircraft power systems, and in future all-electric ships, major parts of the power distribution system may carry direct currents [1] . This emerging trend towards DC distribution is impelled by changing circumstances on both the source and load sides of the network. Electronic loads and variable speed drives on motors prefer to consume DC power [2] . For distributed generation and energy storage, many technologies already produce either dc
(electrochemical) or variable frequency ac (flywheel and high- or variable-speed generators) which requires frequency changing and hence a dc link [3, 4, 5] . Putting two dc links into a system (one at the point of the power source, one at the point of load) and trying to produce a high-quality (low harmonic) AC only to feed a rectifier is
1
2
PhD Student, Dept. of Electrical Engineering, 301 S. Main St Columbia, SC, 29208.
3
Professor, Dept. of Electrical Engineering, 301 S. Main St Columbia, SC, 29208.
Associate Research Professor, Dept. of Electrical Engineering, 301 S. Main St Columbia, SC, 29208.
1
American Institute of Aeronautics and Astronautics

difficult, illogical except for the practical considerations of existing circuit protection devices, and wasteful of energy in the duplicative inversion and rectification steps [6] . Essentially every use of power except induction motors now requires conversion of the ac power to dc. Therefore, there is a strong impetus to distribute dc power, consolidating the rectification process into one stage, and reducing the number of cables out to the point of use.
As mentioned in [2], one of the main challenges in DC distribution systems is protection against faults. It is challenging because 1) interrupting a high DC current (>10 kA) at any speed is extremely difficult, and 2) high- speed interruption is imperative for protecting system resources (cable, the faulted load, the protection circuit itself, and continuity of power to critical non-faulted circuits). The difficulty of interrupting DC currents as compared to
AC currents is partly explained by Fig.1, which shows that a) the current is limited by the circuit impedance, not just its resistance and b) the AC current frequently crosses zero, even during fault conditions, which aids recovery of the interrupting switch. In contrast, the current in a faulted DC system a) rises to a higher value limited only by the circuit resistance, b) without crossing through zero. . Thus the current delivered into a DC fault is both potentially larger and without zero crossings. In the power system of an all-electric ship, considering the high available power and the proximity of loads to generation, the full prospective fault current can reach tens or even hundreds of kA [7] .
Also, many critical loads, such as radar, weapon systems, and the Combat Information Center, are adversely affected by, and sensitive to, any voltage sag that might be caused by slow isolation of a fault, with potentially catastrophic consequences. Fast protection for these circuits is extremely important in order to minimize the damage as well as to enable other loads served from the same load center to ride through the protection process unperturbed.
(a) Fault current in AC system (b) Fault current in DC system
Fig. 1 Contrast of fault currents in AC and DC systems
Traditional arcing-contact mechanical circuit breakers are not suitable for protection of high-power DC systems.
First, in DC applications, no natural current zero-crossing exists. While arcs can be interrupted at relatively low voltages, it is difficult to do so at kilovolt levels. Second, mechanical circuit breakers take at least milliseconds to interrupt current, depending on the separation speed of the contacts [8] . Mechanical circuit breakers may thus cause voltage distortions and sags that persist for more than 100 ms, which is unacceptable for some of the aforementioned sensitive loads [9] . To quickly isolate faulted loads and keep the rest of the system from being disturbed, solid-state protection circuits are promising because they have a potential for fast actuation and are potentially maintenancefree.
Some low power solid-state DC circuit breakers have been built using power MOSFET, such as the AMPHION
[10] solid-state circuit breaker series rated up to 30V/20A. For high power applications, Virginia Tech has developed an emitter turn-off (ETO) thyristor that can interrupt a 5 kA DC current in 4 microseconds [11] . These products and research results demonstrate that solid-state circuit breakers are feasible and progressing towards applications in high power DC systems. In our research, on the one hand, we are attempting to expand the application of solid-state circuit breakers into very high power-density applications, such as shipboard power systems with tens of KA full prospective fault current [12] . On the other hand, we also intend to extend this research to low-power applications, because full prospective fault current is tens of times higher than the maximum operating current; our design can significantly decrease the required rating of solid-state devices by limiting the fault current.
The protection strategy described here is realized by controlling the gate of the solid-state switches, using pulse width modulation (PWM), to limit the fault current. Paralleled multiple loads, supplied by one converter in a DC distribution architecture, are protected with the proposed protection circuit, so that the loads in non-faulted parts of the system can ride through the fault current-limiting process unperturbed.
The proposed protection strategy makes commercially available solid-state switches useable in high-power-density mission-critical shipboard power systems.
As an additional effect, the strategy restricts any inrush current caused by the startup of large downstream loads
2
American Institute of Aeronautics and Astronautics

(such as motors or capacitive loads,) in a DC distribution system. Therefore, the implementation of the proposed protection strategy also makes the overall system more reliable.
The protection strategy has been simulated in the Virtual Test Bed (VTB) simulation environment [13] . VTB has unique capabilities to model and simulate. It is a software environment for design, analysis, and virtual prototyping of large-scale multi-disciplinary dynamic systems. In the following sections, the details of the protection strategy including circuit architecture and control method are first introduced. Then, simulation results which demonstrate the functionality of the protection strategy are presented and discussed. Afterward, the choice of circuit parameters are discussed and verified with simulation results. Finally, the simulation results are validated through low power experiments.
THE DC DISTRIBUTION SYSTEM ARCHITECTURE AND THE PROTECTION STRATEGY
For convenience, we discuss two protection circuit topologies corresponding to two typical load conditions. The first condition is a converter powering a single load. In this case, the current-limiting technique is integrated into the converter control, such as the current mode control for buck converters. The second condition is a converter supplying multiple loads, shown in Fig. 2 (a) [1] as loads L1 to L25. In this situation, the protection circuitry shown in Fig.2 (b) is used to replace each of the circuit breakers. The capacitor shown in Fig.2 (b), is necessary to transiently support the load bus voltage. If the length of the power distribution cable is short enough, the converter output filter can serve the purpose, and no additional capacitor is necessary. However, if a long cable is used to get power out to the load then the additional capacitor is necessary. The distributed parameters of the power cable may affect the value of the additional capacitor. The solid-state switch is the main device for current-limiting and fault current interruption. The inductor limits the rate of rise of the fault current, and the freewheeling diode limits di/dt on the inductor when the solid-state switch is turned off.
Portion of a Zone
Port Bus
SSCM
SWB1 SWB2
L1
SSCM
MCB L5
L6
PM1
G1 R1 PM2 G2 R2
SSIM Vital
Load
L10
L11
L15
L16
SSIM Vital
Load
L20
L21
SSIM Loads
SSCM L25
Starboard Bus
PM: Prime Mover R: Rectifier G: Generator SWB: Switchboard
SSCM: DC/DC Converter SSIM: DC/AC Inverter MCB: Main Circuit Breaker
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Fig.2 (a) A portion of shipboard power system with protection circuit
Fig.3 illustrates a portion of a shipboard DC distribution system. The DC power source represents a mediumlevel voltage DC bus. The solid-state switch CS and diode D compose a buck converter, with L0 and C0 as the output filter, that supplies regulated voltage to a load center through a 50m power cable C1 . The current through L0 and the voltage across C0 are measured by the current sensor CSR and voltage sensor VSR , respectively, and are used by Buck Controller for control purposes. Two circuits from the load center are shown, having solid-state protection switches S1 and S2 and their accessory components ( C1 , D1 , L1 , D2 , and L2 ) which are used to protect the circuitry and loads Load1 and Load2 . Inductor L1 limits the rate at which the fault current rises when a fault occurs; L1 may comprise either a discrete device or the cable impedance, and it obviously has some adverse effect on transient load voltage regulation.. D1 functions as a freewheeling diode to reduce di/dt on the inductor when switch S1 is turned off. The functions of D2 and L2 are similar to those of D1 and L1 . C1 provides local support of the bus voltage oscillations during switching of the protection switches during a fault. Short Circuit represents a ground fault at the indicated position in the network.
Fig.3 A portion of a shipboard DC distribution system
As shown in Fig.3, each solid-state switch is operated to limit fault current through its control. Normally, the protection switch is always in the closed (on) state. Fig.4 shows the control diagram for the solid-state protection switches S1 and S2 when in the current limiting mode.
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i
L 1
I
+ max
-
K
E
A
D
PWM:
A
A
E
Gate
Ctrl
Fig.4 Control circuit block diagram for protection switch
The current flowing through the inductance L1 is represented by i
L 1
. From this value we subtract I max
, which is the lower of the maximum thermally-acceptable current in the solid-state switch or cable, or the maximum current allowed to flow into the load, depending on the preference of the supervisory controller. The difference between i
L 1 and I max
is multiplied by a gain K . The result becomes the reference signal for the PWM circuit that generates the gate signal for the solid-state switch. The operating principle of the PWM block is as follows:
When E ≤ 0 , D = 1 ;
When 0 < E < A , D =
A − E
;
When E D = 0 ,
A
≥ A ,
Where D is the duty cycle of the PWM circuit, E is the amplified difference between the measured current and the current limit, and A is the magnitude of the PWM carrier signal. The above equations can be better interpreted by looking at Fig.5. The saw tooth waveform is the carrier used in the PWM block.
E
T on
T 2 T
Fig.5 Illustration of protection switch control
When a short circuit occurs, the solid-state protection switch will be turned on and off by the control circuit and the current will be restricted to around I max
.
From Fig.4, when i
L 1
> I max
,
D = 1 −
K ( i
L 1
−
A
I max
)
(1)
The average current through L1 is i
L 1
= DI
0
(2)
I
0 is the full prospective value of the fault current. By substituting D into (2), we obtain i
L 1
− I max
= ( 1 − i
L 1
I
0
)
A
K
(3)
During a fault, I
0 is much greater than i
L 1
, so i
L 1
I
0
≈ 0 , then i
L 1
− I max
≈
A
K
(4)
If A is 1 and gain K is 100 in the control loop, then the average value of i
L 1 is about the same as I max
.
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Simulations have been carried out in the VTB environment to demonstrate the effectiveness of the proposed protection strategy, using the same system as shown in Fig 3. Load1 is short-circuited at 0.1
s , the short circuit impedance is 0.001
is I max
= 20 A
Ω
, and the fault ends at 0.15
. Fig.6 shows the current through L s . The current limit level of the load protection switch S1
1
, which is the same as the current through the fault. Fault current is restricted to around I max
. Fig.7 details the current ripple in Fig.6 during the fault. As shown in Fig.8, the leading edge of the current ripple is formed when the protection switch S1 is closed to the fault through inductor L1 . The slope of the leading edge is proportional to the load bus voltage. The trailing edge of the current ripple is formed when S1 is opened and the current in L1 is freewheeled through diode D1 . When I
L1
drops below I again, and the next ripple cycle begins. max
, S1 is closed
To demonstrate the impact of the protection strategy on the non-faulted parts of the system, the buck converter output voltage and load bus voltage are shown in Fig.9 and Fig.10, respectively. Fig.9 reveals that the output voltage of the buck converter remains unaffected at 800 V . Fig.10 establishes that the load bus voltage is kept at 800 V with no more than 1% ripple. The ripple detail is given in Fig.11.
The voltage across protection switch S1 during the fault is depicted in Fig.12. This voltage is within the range of the load bus voltage. Fig.13 shows the current through buck converter output inductor L
0
, which drops to about half its initial level after Load1 is short-circuited. It should be noted that, although the fault current is at I max
and is now larger than the current in Load1 was before the fault occurred, the buck converter output current is actually smaller than the pre-fault current. This phenomenon is explained in the discussion section below.
Fig.6 Current through L1
Fig.7 Details of current ripple in Fig.5 during fault
6
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Fig.8 The current through protection switch S1 during fault
Fig.9 Output voltage of buck converter
Fig.10 Load side bus voltage
Fig.11 Details of voltage ripple in Fig.9
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American Institute of Aeronautics and Astronautics

Fig.12 voltage across protection switch S1
Fig.13 Output current of buck converter
The remainder of this section discusses several issues: the characteristics of current and voltage waveforms during the current-limiting process of the protection switch; the value of inductor L
1
and capacitor C
1
in the protection circuit design; and the effect of the protection on non-faulted parts of the system.
The current ripple through the protection switch shown in Fig.7 has a peak-to-peak value of about 0.8
A , and a trailing edge much longer than its leading edge. This characteristic can be explained through the following analysis.
The ripple period T r in Fig.7 can be determined by:
T r
= T l in which
+ T t
T l is the length of the leading edge, and T t is the length of the trailing edge.
(5)
We define S t that:
as the trailing edge slope of the ripple current, and S l
is the leading edge slope. Thus, it is evident
T l =
S t
T t
S l
From inductor L
1
, we have the relation:
L
1 di
L 1 dt
=
1
=
L 1
During the leading edge,
L S l
= V
DC
− i R fault
≈ V
DC
(6)
(7)
(8) in which V
DC is the load bus voltage, and R fault
is the fault resistance.
During the trailing edge,
L S t
= i
L 1
(
R
L 1
+ R fault
)
+ V
D 1
≈ I max
(
R
L 1
+ R fault
)
+ V
D 1
(9) where R
L1
is the resistance of inductor L
1
, and V
D1
Thus, we get
is the forward voltage drop of diode D
1
.
T l =
S t =
T t
S l
I max
(
R
L 1
+ R
V
DC fault
)
+ V
D 1 ≈ 0 (10) and ripple current period T r
≈ T t
.
When S1 is closed to the short circuit fault, the current through inductor determined by the delay in the control circuit T dctrl
L
1
rises quickly to exceed I
plus the switch turn-off time T off max
, which in turn causes the control circuit to immediately open S1 . Therefore, the length of the ripple current’s leading edge T l
, i.e.,
is
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American Institute of Aeronautics and Astronautics

T l
= T dctrl
+ T off
Then we can find the ripple current peak value using
V
DC
L 1 L
1
T l
In the simulation, L
1
=1mH, V
DC
= 800 V and T l
=10 -6 s; therefore, we have
∆ i
L 1
=0.8A.
(11)
(12)
This calculation agrees with the simulation result shown in Fig.7.
Eq. (12) can be used to calculate the inductor value to limit the ripple current within a certain range.
We have mentioned that capacitor C1 supports the load bus voltage during a fault. The load bus voltage is shown in Fig.10 with ripple amplitude less than 1% of the constant voltage. If there is no C1 , the load bus voltage fluctuates with a peak-to-peak value of over 1500V while the protection switch S1 switches, an event that certainly impacts the performance of paralleled loads. Therefore, C1 is a necessary part of the protection circuit. Fig.14 shows how the maximum voltage oscillations of the load bus vary in accordance with different capacitances for C1, and different lengths of Cable1 . The solid line curve is for a 100m Cable1, while the dash-dot line curve is for a 50m
Cable1 . From Fig.14, it is evident that in order to obtain the same voltage regulation requirement, a longer cable needs a bigger capacitance. Because a lumped RL model of the cable was used in the simulations, it should be noticed that the distributed capacitance of the cable may vary this conclusion.
0.12
0.1
0.08
0.06
0.04
0.18
0.16
0.14
50m cable
100m cable
0.02
0
10
0
10
1
10
2
C1 (uF)
Fig.14 Maximum load bus voltage oscillations vary with the value of C1 changes
Examining the load bus voltage and the buck converter output current reveals that the current-limiting process of the protection switch does not disturb the non-faulted parts of the system. As shown in Fig.10, the voltage on the load bus is only slightly affected by switching of the protection switch S1, due to the contribution of capacitor C1 .
Therefore, the other load at the same bus is unperturbed. The equivalent current drawn by the fault through S1 , seen from the buck converter side, is actually quite small, as expressed in Fig.13. After a fault occurs, the current through
L
0
decreases to about half of the pre-fault level. In other words, the buck converter only supplies power to Load2.
This is because when S1 is switching, the equivalent current on the left side of the switch I f
can be calculated as:
I f
=
T l
T t
I
L 1
≈
T
T t l I max
(13) since T l
represents the time that S1 is closed and T t
represents the time that S1 is open.
The current-limiting technique in the control of the protection switch makes the system a constant current source for resistive faults. Therefore, according to Eq. (10), when R fault
is low, the amount of energy flowing into the fault is not very great. Conversely, it is important to note that in the case of a higher R fault
, the energy flowing into the fault will also be high. For safety, a function can be added to the control circuit of the protection switch to turn off the switch after it has been in the current-limiting mode for a certain time, thus terminating energy deposition into the fault.
In light of these facts, we can say that with proper parameter design in the protection circuit, the protection circuit only negligibly impacts other system parts. At the same time, the current-limiting capability of the protection switch can also limit the inrush current caused by transients such as the startup of motor loads or downstream converters. This capability helps to reduce the requirements for upstream power sources during the system integration process and benefits system stability and reliability.
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A low-power test circuit was built to validate the simulation results, according to the schematic shown in Fig.15.
The top part is the main circuit, which is supplied by a 30V DC power source. A capacitor is used to reduce the load bus voltage oscillation. A MOSFET is the solid-state switch, rated at 60V/12A, and capable of switching at up to
1 MHz. The rest of the circuit consists of the freewheeling diode, the inductor, and two paralleled resistive loads just as in the simulation test bench. The bottom part is the logic circuit to generate the gate control signal for the
MOSFET.
L1
100 uH
Cable
Q1
MTP2955V
R4
Vin +30V
82 ohm, 20W
C
100 uF
Sg D1
DIODE
Current sensor
Vi
R14
77 ohm, 20W
VCC +5v
Vi
Rf
Rf1
100 kohm
200 kohm
VCC +5V
A 4 times
3
+
2
-
LTC1150CN8
6
LM385-2.5/TO
IL1
VCC +5V
R16
100 kohms
U1
R17
1 Kohms
R19
100 kohms
A 100 times
2 -
3 +
R18
1 Kohms
VCC +5V
6
LTC1150CN8
R20
1 kohms
3
U4A
1
2
CD4093B
R21
100 kohms
C1
100 pF
-->>Vout1
7
6
+
-
VCC +5V
1
U3A R22
500 ohm
LM339
Fig.15 Experiment circuit schematic
Fig.16 shows the triangle carrier used for PWM, which is 62.5 kHz. A bolted short-circuit fault is triggered manually just after the inductor L1 . In Fig.17, the top wave is the gate control signal of the MOSFET, the bottom wave is the current through the faulted load branch, which is restricted to about 0.9A; the normal load current is
0.17A, and the full prospective fault current is 8A. Fig.18 shows the MOSFET gate control signal and the load bus voltage oscillations, which are around 20%. This level results primarily from the comparably large resistor we included as cable impedance.
The experiments validate the practicability of the proposed strategy and the experimental results match well with the results predicted by simulation-derived equations.
Fig.16 PWM triangle carrier
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Fig.17 MOSFET gate control signal (top) and the short circuit fault current (bottom)
Fig.18 MOSFET gate control signal (top) and load bus voltage (bottom)
By integrating the pulse-by-pulse current-limiting technique with a current rate limiting inductance into the DC power distribution system fault currents can be limited within a preset range. This is highly significant for a high power-density shipboard power system, in which the full prospective fault current level is beyond the interruption capability of commercially available solid-state switches. The presented protection circuit architecture is useful for reducing or eliminating the impact on other circuits when protection switches operate in current-limiting as well as fault-isolating processes. The effect of the protection circuit was verified with simulations and experiments. The parameter design in the protection circuit architecture was also discussed. Future work will address the implications of the rate-limiting inductance on load voltage regulation, the effects of distributed cable parameters, and considerations of system stability.
[1] John G. Ciezki and Robert W. Ashton, “Selection and stability issues associated with a Navy shipboard DC zonal electric distribution system,” IEEE Trans. on Power Delivery, vol.15, no. 2, April 2000, pp. 665-669.
[2] Mesut E. Baran, and Nikhil R. Mahajan, “DC distribution for industrial systems: opportunities and challenges,”
IEEE Trans. on Industry Applications, vol.39, no. 6, Dec. 2003, pp. 1596-1601.
[3] M. Brenna, E. Tironi, G. Ubezio, “Proposal of a local DC distribution network with distributed energy resources,” 11th International Conference on Harmonics and Quality of Power, Sept. 2004 pp. 397 - 402.
[4] O. Wasynczuk, E. A. Walters, H. J. Hegner, “Simulation of a zonal electric distribution system for shipboard applications”Energy IECEC-97. Proceedings of the 32nd Intersociety Energy Conversion Engineering
Conference, vol.1, July-Aug. 1997, pp.268 – 273.
[5] B. K. Johnson and R. H. Lasseter, “An industrial power distribution system featuring UPS properties,” IEEE
Industry Application Society Annual Meeting, Oct. 1993, pp. 759-765.
[6] J. A. Momoh, S. S. Kaddah, W. Salawu, “Security assessment of DC zonal naval-ship power system,”
LESCOPE '01. Large Engineering Systems Conference on Power Engineering, July 2001, pp. 206 – 212.
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American Institute of Aeronautics and Astronautics

[7] C. Booth, G. Dudgeon, J. R. McDonald, A. Kinson, J. Hill, “Protection of modern marine power systems: challenges and solutions,” IEE Eighth International Conference on Developments in Power System Protection, vol.2, April 2004 pp.825 – 828.
[8] Brenda Kovacevic, “Application Note 5 - Solid State Circuit Breakers,” MICREL® http://www.micrel.com/_PDF/App-Notes/an-5.pdf
[9] C. Meyer, M. Hoing, R.W. De Doncker, “Novel solid-state circuit breaker based on active thyristor topologies,”
IEEE 35th Power Electronics Specialists Conference, PESC 2004, vol.4, pp.2559-2564.
[10] AMETEK Aerospace and Defense., “AMPHION http://www.ametekaerospace.com/download/newpdfs/020100.pdf
TM solid-state circuit breakers.”
[11] Qin Huang, Xigen Zhou, Zhenxue Xu, “Solid-state DC circuit breakers,” United States Patent, Patent No.: US
6,952,335 B2, Date of Patent: Oct. 4, 2005.
[12] C. Booth, G. Dudgeon, J. R. McDonald, A. Kinson, J. Hill, “Protection of modern marine power systems: challenges and solutions,” IEE Eighth International Conference on Developments in Power System Protection, vol.2, April 2004 pp.825 – 828.
[13] R.A. Dougal, S. Liu, L. Gao, M. Blackwelder, “Virtual Test Bed for Advanced Power Sources,” Journal of
Power Sources, vol.110, no.2, pp.285-294.
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