Filters for Active Front End Motor Drives
Anirudh Acharya, Shankar Murthy, Vinod John
Dept. of Electrical Engineering
Indian Institute of Science
Bengaluru, India 560012
Abstract—Present day IGBT based power adjustable speed
drives have fast turn-ON and turn-OFF times results in high
dv/dt being applied to the motor terminals. The high dv/dt
switching waveforms along with travelling wave effects of long
cables stress motor insulation, cause high ground currents and
affects the motor bearings. These issues are exacerbated in
PWM Active Front End (AFE) rectifier based motor drives
when compared to one using a diode rectifier. This paper briefly
outlines problem associated with IGBT technology based ASD
with AFE rectifier using long cables. The common mode voltage
due to such motor drive with AFE rectifier is analysed. An
integrated approach for filter design is discussed wherein the
adverse effects of both AFE rectifier and the drive inverter
are addressed on both common and differential mode basis.
The proposed topology address the problems of common mode
voltage, common mode current and voltage doubling due to ASD.
The design procedure for this proposed filter topology is discussed
with experimental results that validate the effectiveness of the
filter.
Index Terms—Active front end converter, Common mode
voltage, dv/dt filter, Common mode filter.
I. I NTRODUCTION
IGBT technology based Adjustable Speed Drives (ASD)
using Active Front End (AFE) converter is widely used today.
Advantages of using IGBT based power converter are as
following,
• High switching frequency.
• Smaller turn-ON and turn-OFF times, this reduces
switching losses.
• Advance PWM techniques can be used for control.
Some of the applications that require long cable between
the motor and the power converter. In this case it has been
observed that the voltage at the motor terminal doubles during
switching transients as compared to voltage at inverter end [1].
Also the high dv/dt at the inverter end due to faster turn-ON
and turn-OFF times leads to problems such as [1]–[12],
• Increased ground currents apart from voltage doubling at
motor terminal.
• Bearing damage and insulation failure at load end.
• EMI/EMC concerns.
The DC bus energized using three phase diode bridge
rectifiers injects lower order harmonics into grid. When this is
not desirable along with the need for regenerative capabilities,
AFE converter is a suitable alternative [13], [14].
ISRO-IISc Space Technology Cell project: ISTC244.
T.Saboo
DDH, CMF / QCMG
AVN - VSSC
Indian Space Research Organization
Trivandrum, India
Though AFE converters eliminates lower order harmonics, it
inject high frequency electrical noise. Also, the high dv/dt excites the capacitive coupling which leads to increased ground
currents. The problem becomes predominant as the converters
are usually switched in the range of few tens of kilo hertz. The
electrical noise produced by such AFE converter combines
with the electrical noise due to PWM inverter and appear at
the load. This aggravates the problems at the motor end. Zero
sequence injected carrier based PWM techniques (CSVPWM)
are quite often used in AFE operation as DC bus utilization is
better [15]. Such PWM techniques make it difficult to arrive
at suitable topology for using higher order filter with AFE
converter due to presence of third harmonic component [16].
The standards such as CISPR 22 and IEC 61000 specify
the limits on the current injection into the ground by power
converter for commercial and domestic applications. NEMA
MG-1, part 31 recommends the maximum allowable dv/dt
that can be applied at the motor terminal for safe operation.
To meet these regulations different solutions are adopted to
mitigate the ill effects.
The passive filters are most widely adopted to address
these issues [17]–[23]. One of the filter configuration which
eliminates the voltage doubling at motor terminal and reduces
the common mode current without substantially increasing the
size and cost is dv/dt filter. If the filter required is only to
address the voltage doubling at motor terminal then resonant
frequency of the filter can be above the switching frequency.
With such a filter the size of the circuit components reduces.
Damping of such filter is quite difficult, instead the output is
clamped to the desired DC bus voltage. Clamping filters are
proposed in literature [18], [19]. The filter topology presented
in [18] does not address the common mode component, this
shortcoming was overcome in subsequent design proposed in
[19] by connecting the neutral of the filter to DC bus midpoint (O). However design procedure and implications are not
discussed.
Capacitors are introduced between DC bus positive rail to
ground and negative rail to ground which eliminates common
mode voltage due to AFE converter [24], [25]. This method
cannot be used directly with AFE converter ASD as the
ground current would now carry the third harmonic current on
common mode basis due to CSVPWM and switching current
components. The explicit design procedure for selection of
filter component are not discussed. Reduced common mode
voltage PWM techniques are used to minimize the effect but
this also constraints the line to line output performance [26].
The filter discussed in [27] address the elimination of high
frequency leakage current with AFE converter. Therefore it
becomes necessary to address the filter design considering the
type of drive. So that at the entire filter can be embedded as
a part of the ASD.
This paper briefly outlines problem associated with IGBT
technology based ASD with Active Front End (AFE) converter
using long cable and different mitigation techniques used
to address the issues. The common mode voltage due to
such converter with AFE converter is discussed in detail. An
integrated approach for filter design is discussed wherein the
adverse effects of both AFE converter and the inverter is
addressed. The proposed topology is as shown in Fig. 1, which
address the problems of common mode voltage, common
mode current and voltage doubling due to ASD. The design
procedure for this proposed filter topology is discussed with
experimental results that validate the effectiveness of the filter.
Section II discusses adverse effects of long cable ASD and
its mitigation techniques. Section III expains the common
mode voltage and current, also emphasizes the effect of common mode voltage due to AFE converter on load. Section IV
outlines the design objectives of the proposed filter. Section V
covers the working principle and design of the proposed motor
side filter. Section VI describes the common mode circuit and
design of proposed common mode DC bus filter. Section V
discuss the experimental results.
II. F ILTER D ESIGN O BJECTIVES
The design of ASD has to account the electrical noises
introduced by modern PWM converters. This demands end
to end solutions, wherein the electrical noises are minimized
or eliminated with suitable filter topology as an integral part
of the ASD system. The filter has to address both common
mode and differential mode components. The design procedure
needs to be independent of the load, but in most cases the
load has to be considered to effectively mitigate the problem.
Further to address deleterious effects of CMV the presence
of AFE converter has to be taken into account and retain the
electrical noises generated within the system. This adds to
the complexity of designing the filter. The filter design here
address two aspects,
• Elimination of voltage doubling at motor terminal and
minimizing CMC.
• To eliminate the CMV effects of AFE converter on the
load and restrict the electrical switching noise within the
ASD system.
4) Easily scalable for high power drives without increasing
the cost and size of the filter significantly.
To meet the aforementioned constraint a dv/dt filter is used.
The filter addresses both common mode and differential mode
noise with slight modification of topology. The dv/dt filter
design, the dv/dt requirement, resonating frequency selection,
peak current in filter and semiconductor, resulting power loss
is used to select the filter component, explained in section V.
B. Design Objectives for Common Mode DC Bus Filter
To address the CMV due to AFE converter capacitors are
introduced between DC bus positive rail to ground and negative rail to ground which eliminates common mode voltage
[25], [24]. The proposed filter achieves filtering of the high
frequency CMV while preventing the low frequency third
harmonic currents from flowing into the ground.
The proposed DC bus common mode filter is as shown in
Fig. 1, mid-point M is connected to LCL filter neutral N which
is connected to ground through capacitor CMg . The key design
aspects for the proposed common mode filter is,
1) To eliminate the CMV propagation to load side due to
AFE operation, thereby eliminating the increase in CMC
current.
2) To circulate the switching and lower order harmonic
current within the system allowing advance PWM techniques to be adopted for AFE operation.
The DC bus common mode filter is explained along with the
methods used to select the filter components in section VI.
TABLE I
D ESIGNED dv/dt FILTER VALUES
Sl.No.
F ILTER PARAMETER
PER UNIT
ACTUAL
1
Resonant frequency fres
800
40kHz
2
Resonant current ires
0.5
7A
3
Filter inductance Lf
0.0083
0.5mH
4
Filter Capacitance Cf
0.0002
33nF
5
Snubber capacitance Cs
0.54
100µF
6
Snubber Resistor Rs
2.31
40Ω
7
Switching frequency fsw
40
2kHz
TABLE II
D ESIGNED COMMON MODE DC BUS FILTER VALUES
S L .N O .
PARAMETER
P ER U NIT
A CTUAL
1
DC bus voltage Vdc
2.92
700V
A. Design Objectives for Motor Filter
2
Switching frequency (AFE) fsw
200
10kHz
The proposed dv/dt filter (LC resonant clamp filter) topology is as shown in the Fig. 1 at inverter output. The key aspects
of this design are,
1) To eliminate the voltage doubling at the motor terminal
by varying the dv/dt of applied voltage.
2) Reduce the size and cost of the filter such that it can be
integrated with the power circuit of the converter.
3) Minimization of CMC.
3
Frequency (LCL filter)fres
20
1kHz
4
CM Resonant Frequency fcom
28
1.4kHz
5
Filter Inductance L1
0.0455
2.5mH
6
Filter Inductance L2
0.0455
2.5mH
7
Filter Capacitance Clf
0.1
20µF
8
DC Bus Filter Cy1 = Cy2
0.05
10µF
9
Filter Capacitor CMg
0.0005
100nF
ISRO-IISC STC SYMPOSIUM
3
Fig. 1. Schematics of an active front end motor drive with integrated LCL and DC bus common mode filter for grid and dv/dt filter at inverters terminal
for motor.
Fig. 2. Waveforms showing (a) ch1: Line to line voltage (VRY ) at the
inverter end and ch2: motor end voltage VU V showing doubling at motor
terminal, and ch3: the resulting line current (IR ) without any filter. (b) ch1:
Pole voltage (VRO ), ch3: filter capacitor voltage (VCf ), ch4: motor terminal
to ground voltage (VUg ) and ch1: common mode current on the motor side.
Scale: voltage-500V/div, current-5A/div, time-5µs.
Fig. 3. Measured DC bus voltage, line current and common mode voltage
waveforms at startup of the AFE rectifier for Vdc =700V with an inductive
grid side filter and no common mode filter. Scale: voltage-500V/div, current5A/div and time-500ms/div.
III. E XPERIMENTAL R ESULTS
A three phase, 10kVA, 415V back-to-back connected power
converter prototype is built in the laboratory to demonstrate the
effectiveness of the filter. The base values are Pbase = 10kV A,
Vbase = 240V and fbase = 50Hz. The inverter is switched at
2.5kHz and the AFE rectifier is switched at 10kHz. A 100m
long PVC coated four core cable is used to demonstrate the
voltage doubling at motor terminal. The load is a three phase,
415V, 10kW, 50Hz star connected induction motor which is
controlled using V/F scheme. The front end is controlled using
vector control method [15]. Altera cyclone II FPGA platform
is used for implementation of control algorithm.
In Fig. 2(a) comparison between the applied inverter voltage
and motor terminal is made along with the line current in
the absence of dv/dt filter. The motor terminal voltage rises
beyond two times as compared to applied voltage. Also, the
effect of line to line parasitic capacitor is seen on the line
current during this transient. Fig. 2(b) shows the applied
inverter voltage, the dv/dt filter capacitor voltage, motor
terminal to ground voltage along with the ground current with
the motor side filter connected. The pole voltage VRO has
Fig. 5.
Measured waveforms showing (a) ch1: Common mode voltage
VOg (50V/div), ch2: Voltage across capacitor CMg (200V/div), ch4: ground
current Icom1 (2A/div) for CSVPWM at Vdc =300V with LCL line side filter
with floating N and with mid-point M connected to ground (b) ch1: Common
mode voltage VOg (50V/div), ch2: voltage across capacitor CMg (50V/div),
ch3: current circulating within the system Icomc (5A/div)and ch4: ground
current Icom1 (200mA/div) for CSVPWM, at Vdc =300V with the complete
filter configuration.
a very sharp rising edge that is altered by the dv/dt filter
evident from VCf . The voltage doubling at the motor terminal
is eliminated and the ground currents are minimized.
The DC bus is boosted from a pre-charged value of 600V
to 700V using AFE rectifier. Fig. 3 shows the boosting action
of DC bus along with the converter current side current and
Fig. 4. Measured CMV and CMC waveforms at the motor terminal due to long cable for the circuit configurations: (a) Using diode bridge as front end and
no filter, (b) ASD using PWM rectifier as front end and only LCL grid side filter, (c) ASD using PWM rectifier as front end along with DC bus common
mode filter and not motor side dv/dt filter, and (d) ASD using PWM rectifier as front end along with DC bus common mode filter and dv/dtf ilter. Scale:
voltage-250V/div, current-0.5A/div, time-100µs).
common mode voltage appearing between mid-point of the DC
bus to ground VOg . The CMV due to diode bridge rectifier and
AFE rectifier is clearly marked. It is clear that the CMV due
to AFE rectifier is predominant and needs to be restrained
from appearing at the load terminals. The common mode
current injection to ground gets significant during AFE rectifier
operation as compared to three phase diode bridge rectifier.
When the DC bus Y-capacitors connected to positive and
negative rail is grounded, switching current and harmonic
current flow in to ground as shown in Fig. 5(a) for CSVPWM.
To illustrate the current injection to ground, AFE converter
operation is carried out at 300V DC bus without load in
order to keep the common mode resonant component with
in limits. Both switching and third harmonic current flow
into ground (Icom1 ) is seen in case of CSVPWM. Also, the
voltage between N ′ to ground (VNg ) is high when the neutral
connection of the LCL filter is left floating.
The proposed topology is obtained by connecting mid-point
M to neutral of LCL filter N ′ . The Fig. 5(b) shows CMV VOg ,
voltage across capacitor CMg , Icomc and ground current Icom1
for CSVPWM. The potential at M with respect to ground is
reduced, using CMg significantly higher than parasitic capacitance. Compared to VOg without any filter (Fig. 3) the voltage
after DC bus filter is significantly attenuated. For CSVPWM
with DC bus filter, the frequency of VOg is now three times
fundamental frequency and magnitude varies slowly for AFE
operation resulting in quieter DC bus. This illustrates the
effectiveness of the DC bus common mode filter.
The CMV and CMC appearing at the motor neutral with
three diode bridge rectifier based ASD and AFE converter
based ASD is shown in Fig. 4(a) and Fig. 4(b). To illustrate
the adverse effect of CMV the DC bus is boosted to 400V
to keep the currents and voltage at motor terminals within
safe limits. The CMC voltage due to AFE converter rides on
the CMV due to inverter, this leads to increased frequency of
occurrence of CMC. This is as anticipated from the simulation
results shown in section II.
Fig. 4(c) shows the CMV and CMC at motor neutral
terminal to ground with the DC bus common mode filter
connected but the motor filter is removed. This effectively
shows the elimination of CMV due to AFE converter, but still
the inverter CMV has high dv/dt. This reduces the frequency
TABLE III
T HE GROUND CURRENT, INVERTER OUTPUT VOLTAGE dv/dt, VOLTAGE
BETWEEN NEUTRAL POINT M TO GROUND VMg WITH AND WITHOUT
dv/dt FILTER AND CM BUS FILTER .
Vdc (V)
Filter
Parameter
No filter
with filter
700
dv/dt
Peak Ground Current (A)
Output dv/dt (V/µs)
7
3500
0.4
100
300
CM
Peak Ground Current (A)
Peak Voltage VMg (V)
2.5
150
0.2
20
of occurrence of CMC current but still retains high magnitude
due to high dv/dt of CMV produced by inverter. By adding
the dv/dt filter the CMC magnitude is reduced apart from
eliminating voltage doubling at motor terminal as shown in
Fig. 4(d).
IV. E FFECT OF F ILTERING
Most sensitive measuring equipments and power supplies to
control cards are referenced to the ground. The noise generated
due to AFE based ASD hinders the normal operation of these
equipments, due to increased electrical conducted and radiated
noise as result of high dv/dt, and can affect the accuracy and
reliability of measurement. The cost to equipment that are that
are immune to conducted and radiated noises increases due
to the added necessity to shield each sensor and measurement
channel, addition of isolated ground and to filter power supply
leads. The proposed filter topology diverts the noise away from
the referenced ground by providing circulating path within the
motor drive converter itself. Also, the reduced dv/dt at the
inverter output decreases the radiated high frequency noise.
Table. III shows the magnitude of currents before and after
filter. The peak currents from the motor due to PWM operation
reduces from 7A spikes to about 0.4A leading to improved
compatibility of the proposed motor drive with neighbouring
equipment.
V. C ONCLUSION
The overall filter topology and the design procedure is outlined for a AFE rectifier based ASD. The need for designing
the filter from an overall drive system perspective is briefly
outlined. A design methodology to exploit the advantage of
LCL filter using dv/dt filter for differential mode circuit is
proposed. Effective and simple design procedure for dv/dt
filter is proposed. Analysis of DC bus filter is discussed based
on common mode circuit. The common mode DC bus filter
restraints the high frequency CMV due to AFE converter from
effecting the load.
The proposed topology keeps the switching components
along with third harmonics components due to advanced PWM
technique within the drive system and achieves filtered DC bus
on common mode basis. The LC resonant clamp filter on the
motor side decreases the dv/dt of output voltage which further
minimizes the adverse effects of CMV due to inverter apart
from eliminating the voltage doubling at motor terminal. The
reduced CMC minimizes the risk of motor failure when an
AFE rectifier is used in ASD.
ACKNOWLEDGMENT
The authors thank ISRO-IISc Space Technology Cell
(Project No. ISTC244) for the financial support to carry out
this research project.
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