pn junction under Forward bias condition Positive of bias applied to the p-side → Forward bias A current flows in external circuit from n to p ID p-side ⟹ e- enter the n-side from the external circuit h+ enter the p-side to from external circuit more bound charges are neutralized in both sides Wdepl ID voltage across DR decreases by V the applied reverse bias e- e- eWdepl I I V V(x) Potential barrier across DR decreases (Vo-V); IS h+ h+ h+ width of the depletion region (DR) decrease Barrier = n-side IS V ID increase Vo Vo - V I = ID-IS -xp xn x Diffusion of majority carriers increases ⟹ ⟹ more and more of these carriers can cross the decreased barrier to pass to the other side: h+ are injected across the junction to n-side in the n-side they are minority pn > pno; excess minority carrier (holes) excess is highest at edge of DR Decreases as we move away from the edge. e- are injected across the junction to p-side in the p-side they are minority np > npo; excess minority carrier (electrons) excess is highest at edge of DR Decreases as we move away from the edge. Holes ppo = NA Carrier Concentration Potential barrier across DR decreases Electrons nno = ND p region npo = ni2/NA n region pno = ni2/ND Depletio n region -xp 0 xn x Details of injected minority carriers p n, n p Steady state → excess minority carriers remain constant as shown, p region n region This distribution gives a diffusion current, pn(xn) Law of the junction: Excess concentration Depletio n region 𝑉 𝑝𝑛 𝑥𝑛 = 𝑝𝑛0 exp( ) 𝑉𝑇 pn(x) holes in n region np(-xp) 𝑉 𝑛𝑝 −𝑥𝑝 = 𝑛𝑝0 exp( ) electrons in p region pno np(x) Thermal equilibrium value 𝑉𝑇 npo -xp Minority carriers concentrations: 𝑥−𝑥 𝑛 𝑝𝑛 𝑥 = 𝑝𝑛0 + 𝑝𝑛 𝑥𝑛 − 𝑝𝑛0 exp(− 𝑛𝑝 𝑥 = 𝑛𝑝0 + 𝑛𝑝 −𝑥𝑝 − 𝑛𝑝0 exp( 𝐿𝑝 𝑥+𝑥 𝑝 𝐿𝑛 ) holes in the n region ) electrons in the p region 0 xn x Lp ≡ diffusion length of holes in the n region Ln ≡ diffusion length of electrons in the p region They are related to the excess minority carrier lifetime: p for holes in the n region 𝐿𝑝 = 𝜏𝑝 ∼ 1 → 10000 𝑛𝑠 n for electrons in the p region 𝐿𝑛 = 𝐷𝑝 𝜏𝑝 → 𝐿𝑝 ∼ 1 → 100𝜇𝑚 𝐷𝑛 𝜏𝑛 Current voltage relationship Holes in the n region: p n, n p The hole concentration: 𝑥−𝑥 𝑛 𝑝𝑛 𝑥 = 𝑝𝑛0 + 𝑝𝑛 𝑥𝑛 − 𝑝𝑛0 exp(− ) 𝐽𝑝 𝑥 = 𝑞 𝐷𝑝 𝐿𝑝 n region 𝐿𝑝 Hole diffusion current: 𝐽𝑝 𝑥 = −𝑞𝐷𝑝 p region pn(xn) Excess concentration Depletio n region 𝑑𝑝 𝑛 (𝑥) 𝑑𝑥 𝑝𝑛𝑜 𝑒 𝑉 pn(x) 𝑉𝑇 −1 𝑒 − 𝑥 −𝑥 𝑛 𝐿𝑝 np(-xp) pno np(x) Jp decays exponentially with x; Thermal equilibrium value npo Total current should be constant everywhere in the pn junction -xp 0 xn x J = Jelec + Jhole Majority carriers electrons supplied by external circuit to n region will keep total current constant Total current Electrons in the p region: Very similar expressions are obtained for electrons in the p region Majority carrier drift current Jp(x) Jn(x) -xp 0 xn Minority carrier diffusion current Holes diffusion current in the n-side + Electrons diffusion current in the p-side = in same direction They are added to give the total current: 𝐼 = 𝐴 𝐽𝑝 + 𝐽𝑛 𝐼= 𝐴𝑞𝑛𝑖2 𝑞𝐷𝑝 𝑝𝑛𝑜 𝑞𝐷𝑛 𝑛𝑝𝑜 𝑉 = 𝐴( + )𝑒 𝐿𝑝 𝐿𝑛 𝐷𝑝 𝐷𝑛 + 𝐿𝑝 𝑁𝐷 𝐿𝑛 𝑁𝐴 𝐼𝑆 = IS IS ≡ IS(T) saturation current; 𝐴𝑞𝑛𝑖2 𝑒𝑉 Scale current → strong dependence on temperature IS doubles in value for every 5o rise in temperature, − 1 = 𝐼𝑆 𝑒 𝑉 𝐷𝑝 𝐷𝑛 + 𝐿𝑝 𝑁𝐷 𝐿𝑛 𝑁𝐴 A (junction area) → Scale current 𝑛𝑖2 𝑉𝑇 𝑉𝑇 −1 𝑉𝑇 −1 Diffusion capacitance In Forward Bias region: Amount of excess minority carrier charges p n, n p It changes with applied bias → capacitance Hole distribution changes with forward applied bias V Qp= qA× shaded area under pn(x) profile. 𝑄𝑝 = 𝑞𝐴 ∞ 𝑥𝑛 𝑝𝑛 𝑥 𝑑𝑥 = 𝑞𝐴 𝑝𝑛 𝑥𝑛 − 𝑝𝑛𝑜 . 𝐿𝑝 𝑄𝑝 = 𝑞𝐴𝑝𝑛𝑜 𝐿𝑝 𝑒 𝑉 𝑉𝑇 −1 = 𝐿2𝑝 𝐼 𝐷𝑝 𝑝 = 𝜏𝑝 𝐼𝑝 np(-xp) pno np(x) Similarly: npo 𝑄𝑛 = 𝜏𝑛 𝐼𝑛 -xp The total charge is: 𝑄 = 𝑄𝑛 + 𝑄𝑝 = 𝜏𝑛 𝐼𝑛 + 𝜏𝑝 𝐼𝑝 = 𝜏 𝑇 𝐼; 0 xn 𝜏 𝑇 ≡ mean transit time Case NA >> ND, most practical devices one sided pn junction 𝐼𝑝 ≫ 𝐼𝑛 ⟹ 𝐼 = 𝐼𝑝 + 𝐼𝑛 ≅ 𝐼𝑝 𝑄𝑝 ≫ 𝑄𝑛 ⟹ 𝑄 = 𝑄𝑝 + 𝑄𝑛 ≅ 𝑄𝑝 ⟹ 𝜏 𝑇 ≅ 𝜏𝑝 𝐶𝑑 = 𝑑𝑄 𝑑𝑉 = 𝜏𝑇 𝑉𝑇 𝐼 I is the diode current at the bias point, Cd is proportional to the current I At forward bias: Cj ≈ 2 Cjo x