Sedra/Smith Microelectronic Circuits 6/E Chapter 2: Operational

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Sedra/Smith
Microelectronic Circuits 6/E
Chapter 2: Operational Amplifiers
S. C. Lin, EE National Chin-Yi University of Technology
1
【Outline】
2.1 The Ideal OP Amp
2.2 The Inverting Configuration
2.3 The Noninverting Configuration
2.4 Difference Amplifiers
2.5 Integrators and Differentiators
2.6 DC Imperfections
2.7 Effect of Finite Open-Loop Gain and Bandwidth on
Circuit Performance
2.8 Large-Signal Operation of Op Amp
S. C. Lin, EE National Chin-Yi University of Technology
2
2-1 The ideal op amp
VCC
VCC
− VCC
− VCC
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3
Inverting
input
Noninverting
input
−
+
Differential
input stage
Intermediate
Amplifier
stages
Low Z out
Output
stages
Output
Figure 1. Block diagram of an operational amplifier
The properties associated with an ideal Amplifier are:
1. infinite voltage gain ( Av → ∞ )
2. Infinite input impedance ( Z in → ∞ )
3. Zero output impedance( Z out → 0 )
4. Output voltage Vout = 0 when input voltages V1 = V2
5. Infinite bandwidth ( no delay of the signal through the amplifier)
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4
2.1.2 Function and Characteristics of the ideal Op Amp
v1 −+
v2
+
−
i1 = 0
+
−
i2 = 0
(virtual short circuit: vi = 0, I i = 0, Rin = ∞)
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5
Some Specifications
1. Open loop gain ( Aol ): Usually several thousand.
2. Input offset voltage ( Vos ): Small, usually a few millivolts.
3. Input offset current ( I os ): Usually between a few and several
hundred nanoamps.
I B1
IB2
I os = I B1 − I B 2
4. Input resistance ( Rin ):Typically greater than one megohm, but
it can be as high as several hundred megohms.
5. Output resistance (Rout ): Usually less than a few hundred ohms.
6. Slew rate ( S ): The maximum rate of output voltage change
given in volts per microsecond.
Ad
7. CMRR =
Acm
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6
2.1.3 Differential and Common-Mode Signal
he difference input signal vid : ρ
vid = v2 − v1
The Common-mode input signal vicm :
vicm
v2 + v1 )
(
=
2
vid
⎧
⎪⎪ v1 = vicm − 2
⇒⎨
⎪v = v + vid
icm
⎪⎩ 2
2
v1
v2
≡
vicm
S. C. Lin, EE National Chin-Yi University of Technology
− v /2
+ id
− v /2
+ id
7
2.2 The inverting configuration
Rf
R1
if
v1
i1
+
vo
−
vi
vi − v1 vi − 0 vi
=
=
i1 =
R1
R1
R1
vo = v1 + i f R f = v1 − i1 R f
Rf
R1
i1
vi
−
v1
v2
+
vo
v2 − v1 = = 0
A
(virtual short circuit:
vi = 0, I i = 0, Rin = ∞)
vi
= 0 − Rf
R1
if
+
− A v −v
( 2 1)
+
vo
−
Rf
vo
G= =−
vi
R1
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8
2.2.2 Effect of Finite Open-Loop Gain
Rf
R1
i1
vi
⎛ vo ⎞
⎛ vo ⎞
vi − ⎜ − ⎟ vi + ⎜ ⎟
⎝ A⎠ =
⎝ A⎠
i1 =
R1
R1
0
−
vo
A
+
vo
v
− v = − o −i R
1 f
o
vo
+VCC
G = R f / R1
vi
−VCC
G
−VCC
VCC
G
A
vo ⎛ vi + ( vo / A ) ⎞
= − −⎜
⎟ Rf
A ⎝
R1
⎠
− R f / R1
vo
(2.5)
G≡ =
vi 1 + (1 + R f / R1 ) / A
when A → ∞, G → − R f / R1
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9
Example2.2: Assuming the op amp to be ideal, derive an expression
for closed-loop gain vo / vi =?
⎛ vi R2 ⎞
vx
vx = v1 − i2 R2 = 0 − ⎜
⎟
R
R2 x
4
⎝ R1 ⎠
i2
= −vi R2 / R1
R3 i i4
3
R1
vi
i1
v1
+
−
Solution
−vo −vo
v1 =
=
= 0 (virtual short)
A
∞
vi − v1 vi
i1 = −
=
R1
R1
vi
i2 = i1 =
R1
0 − vx
R2
i3 =
vi
=
R3
R1 R3
vi
R2
i4 = i2 + i3 = +
vi
R1 R1 R3
v0 = vx − i4 R4
⎛ vi
⎞
vi
R2
vi ⎟ R4
= − R2 − ⎜ +
R1
⎝ R1 R1 R3 ⎠
v0
R2 ⎛ R4 R4 ⎞
= − ⎜1 +
+ ⎟ ▲
vi
R1 ⎝ R2 R3 ⎠
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2.2.4 An Important Application − The Weighted Summer
v1
v2
vn
i1
R1
Rf
R2
if
i2 Rn
in
+
vo
−
vn
vo
v1
v2
i1 = , i2 = , I n =
, If =
R1
R2
Rn
Rf
⎛ v1 v2
vo
vn ⎞
= −⎜ +
+"+ ⎟
I f = −( I1 + I 2 + " + I 3 ) ⇒
Rf
Rn ⎠
⎝ R1 R2
Rf
Rf ⎞
⎛ Rf
(2.7)
vo = − ⎜
v1 +
v2 + " +
vn ⎟
R2
Rn ⎠
⎝ R1
If R1 = R2 = " = Rn = R f Then vo = −(v1 + v2 + " + vn )
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2.3 The Noninverting Configuration
Rf
R1
if
i1
vi
+
vo
−
−VCC
G
+VCC
VCC
G
vi
−VCC
G = R f / R1
vi
vo − vi
i1 = , i f =
R1
Rf
v
v −v
i1 = i f ⇒ i = o i
R1
Rf
⇒ vo = (1 +
Rf
R1
)vi
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2.3.3 Effect of Finite Open-Loop Gain
v− = vi − (vo / A)
vo − [ vi − (vo / A) ] vo − vi + ( vo / A )
vi − (vo / A)
i1 =
,if =
=
,
R1
Rf
Rf
vi − (vo / A) vo − vi + ( vo / A )
i1 = i f ⇒
=
R1
Rf
vi A( R1 + R f ) = vo ⎡⎣(1 + A) R1 + R f ⎤⎦
1 + ( R f / R1 )
vo
G≡ =
(2.11)
1 + ( R f / R1 )
vi
1+
A
when A → ∞, G → 1 + ( R f / R1 )
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2.3.4 The Voltage Follower
vo
+VCC
+
vo
−
−VCC
VCC
−VCC
vi
(G) = 1
vo = vi , Rin = ∞, Rout = 0
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2.4 Difference Amplifiers
vi1 = vicm − vid / 2
− v /2
+ id
vicm
− v /2
+ id
vid = vi1 − vi 2
vicm = ( vi1 + vi 2 ) / 2
vi 2 = vicm + vid / 2
vo = Ad vid + Acm vicm
Acm vicm
= Ad vid + Ad vid
Ad vid
⎛ Acm vicm ⎞
⎛
vicm ⎞
1
= Ad vid ⎜1 +
⎟ = Ad vid ⎜ 1 +
⎟
A
v
v
CMRR
d id ⎠
id ⎠
⎝
⎝
Ad
Ad
CMRR =
, CMRR dB = 20 log
(2.14)
Acm
Acm
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15
2.4.1 A Single Op-Amp Difference Amplifier
R2
vi1
vi 2
R1
R3
R4
(1)Assume vi1 = 0,
⎛ R2 ⎞
then vO ' = v+ ⎜1 + ⎟
R1 ⎠
⎝
⎛ R2 ⎞
R4
=
vi 2 ⎜1 + ⎟
R3 + R4 ⎝
R1 ⎠
+
vo
−
(2)Assume vi 2 = 0,
⎛ R2 ⎞
then vO '' = vi1 ⎜ − ⎟
⎝ R1 ⎠
vo = vO '+ vO ''
⎛ R2 ⎞
⎛ R2 ⎞
R4
=
vi 2 ⎜1 + ⎟ + vi1 ⎜ − ⎟
R3 + R4 ⎝
R1 ⎠
⎝ R1 ⎠
If R1 = R3 = Ra ,
R2 = R4 = Rb
Rb
Rb
then vo =
( vi 2 − vi1 ) = vid
Ra
Ra
Rb
Ad =
Ra
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(2.17)
16
A common-mode signal applied at the input
i2
i1
R2
R1
vo
R3
+ vicm
−
R4
⎛ R4 ⎞
⎜
⎟ vicm
R
+
R
4 ⎠
⎝ 3
⎤
1 ⎡
R4
i1 = i2 = ⎢vicm −
vicm ⎥
R1 ⎣
R3 + R4
⎦
1 R3
=
vicm
R1 R3 + R4
R4
vo = vicm
− i2 R2
R3 + R4
R4
R2 R3
=
vicm −
vicm
R3 + R4
R1 R3 + R4
R4 ⎛ R2 R3 ⎞
=
⎜1 −
⎟ vicm
R3 + R4 ⎝ R1 R4 ⎠
vo
R4 ⎛ R2 R3 ⎞
Acm =
=
⎜1 −
⎟,
vicm R3 + R4 ⎝ R1 R4 ⎠
(2.19)
If R1 = R3 , R2 = R4 . ⇒ Acm = 0
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i2
R2
i1 R
1
vid
vo
R1
i1
Rid
R2
vid
Rid ≡
ii
vid = Ri i1 + R1i1
Rid = 2 R1
(2.20)
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2.4.2 A Superior Circuit-The Instrumentation Amplifier
R1
v1
R1f
(v1 − v2 ) / R1
0A
+ R1
v1 − v2
−
R2
(v1 − v2 ) / R1
R2
−
0V
+
R1v
R4
R3
+
⎛ 2 R2 ⎞
(v1 − v2 ) ⎜ 1 +
⎟
R
1 ⎠
⎝
vo
−
(v1 − v2 ) / R1
0A
v2
vo1
+
0V
−
R3
R4
vo 2
R4 ⎛ 2 R2 ⎞
vo = ⎜1 +
⎟ (v2 − v1 )
R3 ⎝
R1 ⎠
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2.5 Integrators and Differentiators
Z2
Z1
+
Vi
−
+
Vo
−
Vo
Z2
=−
Vi
Z1
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2.5.2 Inverting Integrator
+ vC −
R
i1
i1
vi
C
+
vo
−
1 t
vC (t ) = VC + ∫ i1 (t )
C 0
1 t
1 t
vo (t ) = −vC (t ) = −VC − ∫ i1 (t ) = −VC −
vi (t )
∫
0
0
C
RC
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We can be described alternatively in the frequency domain
1
by subtituting Z1 ( s) = R, and
= Y ( s ) = sC
Z 2 (s)
vo ( s )
1
=−
v1 ( s )
sRC
Vo
(dB)
Vi
vo ( jω )
1
⇒
=−
v1 ( jω )
jω RC
−20dB/decade
ω
vo
1
=
= t , ∠vo / v1 = +90o
v1 ω RC ω
ω
1
RC
The unity gain frequency ωt as
1
ωt =
RC
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Z1 ( s ) = R
1
RF
=
Z 2 (s) =
1
+ sC 1 + sRF C
RF
C
RF
R1
+
vi (t )
−
+
vo (t )
−
RF
vo ( s )
RF / R
1 + sRF C
=−
=−
v1 ( s )
R
1 + sRF C
1
the Corner frequency ω as
,
RF C
the dc gain as RF / R
Fig2.42 The Miller integrator with a large resistance RF connected
in parallel with C in order to provide negative feedback and
hence finite gain at dc
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Example 2.4
For the circuit in Fig.2.23, (a) derive the transfer function. vo ( s ) / vi ( s )
Solution:
C2
(a)
R2
R1
+
vi
−
+
vo
−
1
1/ R2 ) + sC2
(
vo ( s )
z1 ( s )
=−
=−
vi ( s )
z1 ( s )
R1
R2 / R1
=−
1 + sC2 R2
▲
1
ω0 =
C2 R2
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(b) find the dc gain
R2
The dc gain K = −
▲
R1
(c) Evaluate 3-dB frequency
1
the 3-dB frequency ω0 =
▲
C2 R2
(d) design the circuit to obtain a dc gain of 40 dB,
a 3-dB frequency of 1 kHz, and input resistance of 1 kΩ.
Solution:
In order to obtain a dc gain of 40 dB, we select R 2 /R1 = 100.
For an input resistance of 1 kΩ, we select R1 = 1 kΩ, and thus
R 2 = 100kΩ, for a 3-dB frequency f 0 = 1kHz, we select C2 from
1
1
1
ω0 =
⇒ C2 =
=
= 1.59nF. ▲
3
3
C2 R2
ω0 R2 2π × 1× 10 × 100 × 10
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2.5.3 The Op-Amp Differentiator
R
C
iC
vi
iR
+
vo
−
dvi
vo
dQ
Q = Cvi , iC =
⇒ iC = C
,
IR =
dt
dt
R
dvi
vo
dvi
−iR = iC ⇒ C
=−
⇒ vo = − RC
dt
R
dt
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The frequency domain transfer function of the differentiator circuit
1
can be found by subtituting Z1 ( s ) =
, and Z 2 ( s ) = R
sC
vo ( s )
vo ( jω )
= − sRC ⇒
= − jω RC
v1 ( s )
v1 ( jω )
Vo / Vi (dB)
vo
ω
= ω RC = ,
v1
ωt
+20dB/decade
ω
1/ RC
∠vo / v1 = −90o
the unity gain frequency ωt as
1
ωt =
RC
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▲2.6 DC Imperfections
2.6.1 Offset Voltage
V+
Rf
R1
Vo
+ V
− os
Offset-free op amp
V−
⎛ R2 ⎞
Vo = Vos ⎜1 + ⎟
R1 ⎠
⎝
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R2
C
R1
+
vi (t )
−
+
vo (t )
−
R2
−+
Vos
+
Vo = Vos
−
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2.6.2 Input Bais and Offset Currents
−
I B1
+
IB2
I B1 + I B 2
IB =
2
I OS = I B1 − I B 2
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I B1
R1
0
R2
−
I B1
+
Vo = I B1 R2
I B2
VO = I B1 R2 I B R2
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31
R2
I B 2 R3
R1
R1
IB2
R3
I B1 − I B 2
−
R3
R1
I B1
+
Vo
I B2
− I B 2 R3
VO = − I B 2 R3 + R2 ( I B1 − I B 2 R3 / R1 )
Consider first case I B = I B1 = I B 2 , which results in
VO = I B ⎡⎣ R2 − R3 (1 + R2 / R1 ) ⎤⎦
Thus we can reduce VO to zero by selecting R3 such that
R2
R1 R2
R3 =
=
= R1 // R2
(1 + R2 / R1 ) R1 + R2
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32
2.7 Effect of Finite Open-Loop Gain and Bandwidth on
Circuit Performance
2.7.1 Frequency Dependence of the Open-loop Gain
A (dB )
A( s ) =
A0
100
3dB
80
−6dB/Octave
or
−20dB/decade
60
40
20
0
fb
ft
10
102
103
104
105
A0
A0
=
1 + ( s / ωb ) 1 + ( jω / ωb )
A0ωb
⇒ A( jω) jω
A0ωb
⇒ A( jω) =
ω
unity gain frequency ωt = A0ωb
ωt
ωt
ft
∴ A( jω) =
⇒ A( jω) =
=
jω
ω
f
106
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2.7.2 Frequency Response of Closed-loop Amplifiers
The inverting amplifier transfer function
vo
=
vi
=
− R f / R1
− R f / R1
vo ( s )
=
(2.5) ⇒
vi ( s )
⎡⎣1 + ( R f / R1 ) ⎤⎦
⎡⎣1 + ( R f / R1 ) ⎤⎦
1+
1+
A( s )
A0 / [1 + ( s / ωb ) ]
− R f / R1
⎡⎣1 + ( R f / R1 ) ⎤⎦ [1 + ( s / ωb ) ]
1+
A0
− R f / R1
=
1+
1 + ( R f / R1 )
A0
+
( s / ωb ) ⎡⎣1 + ( R f / R1 ) ⎤⎦
, where A0 1 +
Rf
R1
A0
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34
vo
=
vi
− R f / R1
⎛ 1 + ( R f / R1 ) ⎞
1+ s⎜
⎟
ω
A
0 b
⎝
⎠
⇒ ω3dB
A0ωb
ωt
ωt
, ωb =
=
=
1 + ( R f / R1 ) 1 + ( R f / R1 )
A0
Similarly, the noninverting amplifier transfer function:
vo
=
vi
1 + ( R f / R1 )
1+ ( R
(
1+
f
/ R1 )
)
A( s )
1 + ( R f / R1 )
vo ( s )
ωt
=
⇒ ω3dB =
s
vi ( s ) 1 +
1 + ( R f / R1 )
⎛
⎞
ωt
⎟
⎜
⎜ 1 + ( R f / R1 ) ⎟
⎝
⎠
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35
2.8 Large-Signal Operation of Op Amp
Example 2.7: Consider the noninverting amplifier circuit shown in Fig.
below. The op amp is specified to have output saturation voltages of
±13V, And output current limits of ±20mA.
R2 = 9kΩ
R1 = 1kΩ
i1
VP
0
Sol:
iF
G = 1+
io
vi
vo
iL
RL
(a) Find VP =1V and RL=1kΩ,
specify the signal resulting at
the output of the amplifier.
R2
=10
R1
10V
iL =
= 10mA
1kΩ
the feedback current will be
10V
iF =
= 1mA
(9+1)kΩ
the total output current io is 11mA,
well under its limit of 20 mA. ▲
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36
(b) Find VP =1.5V and RL=1kΩ, specify the signal resulting at the output
of the amplifier.
Sol: V p is increased to 1.5V , Vo will saturate at ± 13V
13V
13V
= 13mA,
iF =
=1.3mA
1kΩ
(9+1)kΩ
io = 14.3 mA, well under its limit of 20 mA. ▲
iL =
vo
15V
+Vcc
13V
−Vcc
−13V
−15V
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37
(c) Find RL=1kΩ, what is the maximum value of VP for which an
undistorted sine-wave output is obtained?
Sol: The maximum value of VP for undistoted sine-wave output 1.3V.
The output will be a 13-V peak sine-wave.
The op-amp output current at peak will be 14.3mA.
(d) Find Vp=1V, what is the lowest value of RL for which an
undistorted sine-wave output is obtained?
Sol: V p = 1V ,
io (max) = 20mA=
10V
10V
+
RL min 9kΩ+1kΩ
RL min =526Ω.
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38
vi
2.8.3 Slew Rate
V
+
vo
−
vi
t
(b)
vo
Slop = SR
dvo
SR =
dt
V
(c )
max
Vo
1
=
Vi 1 + s / ωt
vo (t ) = V∞ − (V∞ − Vinitial ) e− t / RC
= V (1 − e − ωt t ),
where V∞ = V ,Vinitial = 0
t
vo
Slop = ωt V ≤ SR
V
t
(d )
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39
2.8.4 Full-Power Bandwidth
Output when op amp
is slew-rate limited
vi = Vˆi sin ωt
Theoretical
Output
dvi
= ωVˆi cos ωt (Follower)
dt
SR = ωM Vomax
SR
(Full- power bandwidth)
fM =
2π Vomax
The Maximum amplitude of the undistorted
output sinusoild is given by
⎛ ωM
Vo = Vomax ⎜
⎝ ω
⎞
⎟,
⎠
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S. C. Lin, EE National Chin-Yi University of Technology
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