ECEN474: (Analog) VLSI Circuit Design
Fall 2012
Lecture 10: Differential Amplifiers
Sam Palermo
Analog & Mixed-Signal Center
Texas A&M University
Announcements & Agenda
• HW3 due Friday Oct 19
• Reading
• Razavi Chapter 4
• Single-ended and differential signals
• Differential pair
• Differential amplifiers
2
Single-Ended & Differential Signals
• A single-ended signal is measured with respect to a fixed
potential (ground)
• A differential signal is measured between two equal and
opposite signals which swing around a fixed potential
(common-mode level)
• You can decompose differential signals into a differential
mode (difference) and a common-mode (average
Single-Ended Signal
Differential Signal
+
out
−
out
VDM = V − V
VCM
Vout+ + Vout−
=
2
3
Single-Ended & Differential Amplifiers
• Differential signaling
advantages
• Common-mode noise
rejection
• Higher (ideally double)
potential output swing
• Simpler biasing
• Improved linearity
Max Output Swing
VDD − (VGS − VTn )
• Main disadvantage is area,
which is roughly double
• Although, to get the same
performance in single-ended
designs, we often have to
increase the area
dramatically
Max Output Swing
2(VDD − (VGS − VTn ))
4
Common-Mode Level Sensitivity
• A design which uses two single-ended amplifiers to realize a
differential amplifier is very sensitive to the common-mode
input level
• The transistors’ bias current and transconductance can vary
dramatically with the common-mode input
• Impacts small-signal gain
• Changes the output common-mode, which impacts the maximum
output swing
5
Differential Pair
ADM =
Vout1 − Vout 2
= − g m RD
Vin1 − Vin 2
where g m = g m1 = g m 2 and RD = RD1 = RD 2
I 
VO ,CM = VDD −  SS  RD
 2 
• An improved differential amplifier topology utilizes a “tail”
current source to keep the transistor bias current ideally
constant over the common-mode input range
• Allows for a constant small-signal gain and output commonmode level
• Note, you still have to have keep the input pair and tail current
source transistors in saturation
6
Differential Pair Input-Output Characteristics
• For large-signal differential inputs, the maximum output
levels are well defined and ideally independent of the input
common-mode
• For small-signal differential inputs, the small-signal gain is
maximum at low-input signal levels
• As the differential input level increases, the circuit becomes more
nonlinear and the gain decreases
7
Differential Pair I-V Characteristics
Input Voltage Difference : Vin1 − Vin 2 = VGS 1 − VGS 2 = (VGS 1 − VT ) − (VGS 2 − VT )
Vin1 − Vin 2 =
2 I D1
2I D 2
−
W
W
µ nCox
µ nCox
L
L
Squaring both sides and using I D1 + I D 2 = I SS
(Vin1 − Vin 2 )2 =
2
W
µ nCox
L
(I
SS
− 2 I D1 I D 2 )
1
W
2
µ nCox (Vin1 − Vin 2 ) − I SS = −2 I D1I D 2
2
L
Squaring both sides and using 4 I D1I D 2 = (I D1 + I D 2 ) − (I D1 − I D 2 ) = I ss2 − (I D1 − I D 2 )
2
( I D1 − I D 2 )
2
2
2
2
1
W
W
4
2
= −  µ nCox  (Vin1 − Vin 2 ) + I SS µ nCox (Vin1 − Vin 2 )
4
L
L
W
1
4 I ss
2
I D1 − I D 2 = µ nCox (Vin1 − Vin 2 )
− (Vin1 − Vin 2 )
W
L
2
µ nCox
L
8
Differential Pair I-V Characteristics
W
1
4 I ss
2
I D1 − I D 2 = µ nCox (Vin1 − Vin 2 )
− (Vin1 − Vin 2 )
W
L
2
µ nCox
L
∆Vin1 =
2 I ss
W
µ nCox
L
• The differential current is an odd function
of the differential input voltage which
increases linearly for small inputs
• For large differential input voltages, the
output differential current compresses due
to the sqrt term
• The differential output current maxes out
when all the current flows through one
transistor at ∆Vin1
9
Differential Pair I-V Characteristics
For the maximum current range consider the case when all current flows through M1
I D1 − I D 2 = I D1 − 0 = I SS ⇒ I D1 = I SS
For I D 2 = 0, ideally VGS 2 = VT
∆Vin = VGS 1 − VGS 2 = VGS 1 − VT = ∆Vin1
At this ∆Vin1 , M1 must support all of I SS
Maximum Differential Input : ∆Vin1 = VGS 1 − VT =
2 I SS
W
µ nCox
L
We can relate this to the zero differential input overdrive
Zero Differential Input Overdrive : (VGS − VT )1, 2 =
I SS
µ nCox
W
L
=
∆Vin1
2
• The differential output current will saturate if
the differential input voltage exceeds sqrt(2)
times the equilibrium input overdrive voltage
10
Differential Pair Transconductance
W
4 I ss
1
2
I D1 − I D 2 = µ nCox (Vin1 − Vin 2 )
− (Vin1 − Vin 2 )
W
L
2
µ nCox
L
Define ∆I D = I D1 − I D 2 and ∆Vin = Vin1 − Vin 2
4 I ss
− 2∆Vin2
W
C
µ
n
ox
W
∂∆I D 1
L
Gm =
= µ nCox
4 I ss
L
∂∆Vin 2
− ∆Vin2
W
µ nCox
L
The small - signal transconductance at ∆Vin = 0 is
Gm = µ nCox
W
I ss
L
Considering the load resistors RD , the small - signal gain is
Av = Gm RD = µ nCox
W
I ss RD
L
• The differential pair transconductance and gain is maximum near zero
input differential voltage
11
Differential Pair Small-Signal Analysis
Method 1 - Superposition
Find Vout(Vin1)
Note that g m1 = g m 2 = g m and RD1 = RD 2 = RD
VX − g m1RD1
g R
=
=− m D
Vin1 1 + g m1
2
gm2
• The X output from Vin1 is modeled as a
degenerated CS amplifier
12
Differential Pair Small-Signal Analysis
Method 1 - Superposition
Find Vout(Vin1)
Note that g m1 = g m 2 = g m and RD1 = RD 2 = RD
VY g m 2 RD1 g m RD
=
=
Vin1 1 + g m 2
2
g m1
• The Y output from Vin1 is modeled as a
Thevenin equivalent driving a CG amplifier
13
Differential Pair Small-Signal Analysis
Method 1 - Superposition
To find the total Vout V
in1
Vout V = (VX − VY ) V
in1
in1




g
R
g
R
−
 − g m RD g m RD 
m1 D1
−
=
− m 2 D1 Vin1 = 
Vin1 = − g m RDVin1
g
g

2 
 2
m1
m2 
+
+
1
1

gm2
g m1 

From the circuit symmetry,Vout Vin 2 = −Vout Vin1
Vout V
in 2
= (VX − VY ) V
Differential Gain :
in 2
= g m RDVin 2
(VX − VY )tot
Vin1 − Vin 2
=
− g m RD (Vin1 − Vin 2 )
= − g m RD
Vin1 − Vin 2
14
Differential Pair Small-Signal Analysis
Method 2 – Half Circuit
• The symmetric differential pair can be modeled as a
Thevenin equivalent to observe how the tail node P
changes with the differential input signal
• If RT1=RT2 and the input is a truly differential signal, node
P remains constant
• This allows the tail node to be treated as a “virtual ground”
15
Differential Pair Small-Signal Analysis
Method 2 – Half Circuit
• Applying the virtual ground concept allows modeling as
two “half circuits”
VX
= − g m RD
Vin1
VY
= − g m RD
(− Vin1 )
Differential Gain :
2g R V
VX − VY
= − m D in1 = − g m RD
2Vin1
Vin1 − (− Vin1 )
16
Differential Pair Common-Mode Response
• Ideally, a differential amplifier completely rejects
common-mode signals, i.e. Av,CM=0
• In reality, the finite tail current source impedance results
in a finite common-mode gain
Av ,CM =
Vout
Vin ,CM
R 
2gm  D 
 2  = − g m RD
=−
1 + 2 g m RSS
1 + 2 g m RSS
17
Differential Pair with Diode Loads
Assuming γ = 0
Av = −
Av ≈ −
g m1
g m3
g m1
g
≈ − m1
g o1 + g m 3 + g o 3
g m3
µ nCox 
W
W
µ nCox  
 I SS
 L 1
 L 1
=−
=−
W 
W 
C
µ

µ pCox   I SS
p ox 
L

3
L
 3
• While the gain of this amplifier is relatively small,
it is somewhat predictable, as it is defined by the
ratio of the transistor sizes and the n/p mobility
18
Differential Pair w/ Current-Source Loads
Assuming γ = 0
Av = −
g m1
g o1 + g o 3
• While the gain of this amplifier is higher, it is somewhat
unpredictable, as it is defined by the transistor output
resistance, which changes dramatically with process
variations
19
Differential Pair w/
Diode & Parallel Current-Source Loads
Assuming γ = 0
Av = −
Av ≈ −
g m1
g
≈ − m1
g o1 + g m 3 + g o 3 + g o 5
g m3
g m1
g m3
µ nCox 
W
 I SS
L
 1
=−
W
µ pCox   (1 − α )I SS
 L 3
where α is the current percentage that the current source "steals" from the diode load
• Adding a parallel current source to a diode connected load
allows for increase gain which is still somewhat predictable
20
Cascode Differential Pair
Assuming γ = 0
Av = − g m1 ((ro 3 + ro1 + g m 3ro1ro 3 ) (ro 5 + ro 7 + g m 5 ro 7 ro 5 ))
Av ≈ − g m1 (g m 3ro1ro 3 g m 5 ro 7 ro 5 )
• Using a cascode differential
pair and cascode currentsource loads allows for a
considerable increase in gain
• However, a relatively large
power supply may be required
to supply the necessary voltage
“headroom” to keep all the
transistors in saturation
21
Next Time
• Differential Pair Frequency Response
• Noise
22