A Pseudo-CCM Buck Converter
With Freewheel Switching Control
Zongqi HU
Dongsheng MA
Dept. of Electrical & Computer Engineering
University of Arizona
Tucson, Arizona 85721, USA
zongqih@ece.arizona.edu
Dept. of Electrical & Computer Engineering
University of Arizona
Tucson, Arizona 85721, USA
ma@ece.arizona.edu
Abstract—this paper presents a new switching buck converter
operating in pseudo-CCM mode with freewheel switching
control. Compared with conventional buck converters, it can
handle large current stress with small current ripple. In
addition, because there is only one low-frequency single pole in
power-stage transfer function, large loop-gain bandwidth and
thus fast transient response become easily achievable by
proper compensation technique. Simulation results verify these
features in frequency and time domains respectively. The
design provides a good solution to high-current fast-transient
power supplies.
I.
large switching noises are generated and then coupled into the
substrate of IC system, severely degrading the performance and
reliability. Hence, it will be very desirable if a new type of
converter can be invented, which not only handles large current
stress, but also has large loop-gain bandwidth. This paper
investigates one possible solution of using freewheel switching
technique and pseudo-continuous conduction operation to meet this
demand.
II.
BANDWIDTH
S1
INTRODUCTION
Development of VLSI microprocessor technology poses new
challenges for the power supplies. With the supply voltage scaling
down from 5V to 3.3V, 2.5V and even 0.8V in the future [1], the
current that the microprocessors draw increases from 13A to
30~50A due to ever-increasing system complexity and operating
frequency [2]. High output current and fast transient response
power supplies are on great demands by next-generation
microprocessors.
Switch mode power converter, or switching converter in short,
is well known for high efficiency and flexible voltage conversion.
Most of today’s voltage regulation modules adopt buck converter
topology. By operating in continuous conduction mode (CCM), a
conventional buck converter can deliver large current to the load.
However, for voltage-programming case, due to the existence of the
complex poles in the loop gain transfer function, it is very difficult
to design the compensation network to achieve a wide loop-gain
bandwidth and thus fast response [3]. Even if the converter in
current-programming mode has two separated real poles in transfer
function, which makes a wide loop-gain bandwidth possible, special
current sensing circuit is required and ramp compensation has to be
done to avoid sub-harmonic oscillation [5]. This makes the
converter very sensitive to current sensing signal, which normally
carries switching noise. The corresponding circuit design could be
very complicated. (Thus, our discussion in this paper will focus on
the voltage-programming converters). If the converter operates in
discontinuous conduction mode (DCM), the loop gain exhibits a
first-order behavior, which makes the design of the compensation
network much easier [4]. Unfortunately, DCM operation can only
provide limited power to the load. If heavy load current is required,
the peak of the inductor current has to be very high, which
introduces large current ripples. For integrated implementations,
Vg
L
C
S2
R
Vo
Power
Stage
R1
CMP
Q
R
Q
S
-
Va
EA
A(s)
+
+
bVo
Vref
R2
Va
Control Loop
Clock
(from OSC)
Ramp
(from OSC)
Fig. 1 A conventional buck switching converter
Fig. 1 depicts a conventional buck switching converter. Based
on the level of inductor current, the converter has two operation
modes, CCM and DCM. If the load is heavy (R is small), the
inductor current is always above zero and the operation is in CCM,
as shown in Fig. 2(a); and if the load is light (R is large), the
inductor current will fall to zero at one instant and the converter
operates in DCM, as shown in Fig. 2(b). In CCM, one switching
cycle Ts is divided into two parts: D1Ts and D2Ts (D1+D2=1). The
inductor current increases linearly in D1Ts when S1 is on and S2 is
off, and drops linearly in D2Ts when S1 is off and S2 is on. While in
DCM, one switching cycle is composed of three parts: D1Ts, D2Ts
and D3Ts (D1+D2+D3=1). The inductor current waveform in D1Ts
and D2Ts is similar to that in CCM, but it stays at zero during D3Ts,
when both S1 and S2 are off. To supply the same heavy loads such
as microprocessors, CCM increases the inductor’s DC current level
IO (Fig. 2(a)), while keeping relatively small current ripple ∆I such
that the output ripple voltage is small. However, in DCM, smaller
value of inductor has to be chosen for the same heavy load. As
This research is supported by National Science Foundation I/UCRC
Center for Telecommunication Connection One.
0-7803-8834-8/05/$20.00 ©2005 IEEE.
CONCERNS ON CURRENT RIPPLE AND LOOP-GAIN
3083
results, the peak inductor current Ipk and current ripple ∆I will be
very large, which generates large switching noise and ripple
voltages at the output.
D2Ts
∆I
Io
Io
∆I
(b)
I pk
(a)
I pk
D1Ts
D1Ts
in parallel with the inductor. During D1Ts, S1 is turned on and S2
and S3 are off. The inductor current increases with a slope of (Vg–
Vo)/L. In D2Ts, S1 is turned off and S2 is turned on. The inductor
current drops with a slope of – Vo/L, until it hits a certain level of Idc.
Then the converter enters D3Ts, when S3 is turned on while S1 and
S2 are off. The inductor current will stay at the constant Idc, since
the switch S3 shorts the inductor L at this moment. The operation of
freewheel switching buck converter is similar to a DCM one in a
conventional converter. But the inductor current stays at a constant
Idc in stage 3 instead of falling to zero, which gives the converter the
ability to output larger current while keeping the current ripple
lower. As shown in Fig. 6, by adjusting the Idc and the duration of
D3Ts, this scheme can achieve similar current handling ability as a
CCM one does, and its current ripple is much smaller than the
DCM’s. This operation mode was named as Pseudo-CCM (PCCM)
in [6].
D2Ts D3Ts
S3
Fig. 2 Inductor current of a switching converter in (a) CCM, and (b) DCM
S1
In frequency domain, characteristics of CCM converters also
differ from those of DCM ones. For a CCM buck converter, the
transfer function of the power stage has a pair of low-frequency
complex poles [3]. While in DCM, it has only one low-frequency
pole [4]. So for CCM, dominant-pole compensation is normally
used to stabilize the system, as shown in Fig. 3, sacrificing the
bandwidth of the overall loop gain. As a result, a sluggish response
is usually found in transient performance. Thus, trade-off exists
between current handling ability and loop-gain bandwidth in
conventional switching converters.
Overall
L
Vg
S2
Current
Sensor
C
R
Vo
R1
Buffer
Va
CMP
-
Digital
Logic
bVo
EA
-
A(s)
+
R2
+
Va
Clock
(from OSC)
Error Amplifier
Ramp
(from OSC)
Fig. 4 The proposed converter with freewheel switching
Power Stage
Ga in(dB)
D1Ts D2Ts D3Ts
fs
f(HZ)
S1
P ha se
Bandwidth
Error Amplifier fs
S2
f(HZ)
-90o
Phase
Margin
S3
-180 o
Overall
Power Stage
-270o
IL
I dc
Fig. 3 Dominant-pole compensation in a CCM buck converter
III.
THE PROPOSED CONVERTER WITH FREEWHEEL
Fig. 5 Timing diagram of the converter with freewheel switching
3084
∆I pk CCM
∆I pk PCCM
I pk CCM
∆I pk DCM
I pk PCCM
A freewheel switching technique is proposed in [6, 7] to
effectively reduce the peak inductor current in single-inductor
multiple-output (SIMO) switching converters. Due to the timemultiplexing between the sub-converters, the improvement in
transient performance is not obvious. However, if the technique is
applied in single-output converters, both current handling capability
and transient response can be significantly enhanced. This
motivates us to propose a new switching converter with freewheel
switching control, as depicted in Fig. 4. The converter’s timing
diagram is illustrated in Fig. 5. Different from a conventional buck
converter, an additional switch S3, the freewheeling switch, is added
I pk DCM
SWITCHING CONTROL
Io
I dc
Fig. 6 Inductor current waveforms in the three different operation modes
In frequency domain, DCM operation is very attractive, since
the converter exhibits a single-pole behavior instead of complexpoles in CCM [4]. This can be intuitively explained by the phase
plane shown in Fig. 7. During D3Ts, the inductor current becomes
zero. Only the output voltage information can be transferred to the
next switching cycle. No current information is available. Thus, the
order of the system is reduced to 1. The smaller close loop in Fig. 7
is the phase plane for PCCM converter. During D3Ts, the inductor
current settles at a constant Idc. Since no small ac signal is carried in
the inductor current in this period, similarly, the transfer function of
PCCM converter should also be first-order at low frequency, which
will be verified by our simulations later. Therefore, the bandwidth
of the loop gain can be easily extended for fast response.
The addition of the switch S3 increases silicon area in
fabrication. However, by adjusting the D3Ts and Idc level, the size of
the power transistor can be minimized. For example, in the designs
of [6, 7], the size of S3 is only 1/20 of that of S1 in Fig. 4. The
increase of the entire silicon area is less than 3.5%.
Dominant-pole compensation is used for both. In Fig. 9, three poles
are found: one single pole from the error amplifier and a pair of
complex poles from the power stage. The quadratic property of
conventional buck converter in CCM can be identified and the
complex poles are located where a sharp drop occurs in the phase
panel. In Fig. 10, only two single poles are found: one from the
error amplifier and the other due to the power stage. The result
shows that the PCCM is a single pole power converter. Hence, polezero cancellation can be used to extend the bandwidth. The idea is
illustrated in Fig. 11. In this method, the bandwidth is limited by
the switching frequency, which can thus be much wider than the
one by dominant-pole compensation. Fig. 12 shows the loop gain of
PCCM converter using pole-zero compensation. Compared to the
results in Fig. 10, the loop-gain bandwidth is extended by around 20
times.
Fig. 8 Output voltages and inductor currents of three converters in steady state.
Fig. 7 Phase planes of DCM and PCCM converters
IV.
SIMULATION RESULTS
Table 1 Design specifications of the three converters
DCM
CCM
PCCM
Filter capacitor C (µF)
50
20
20
Inductor L (µH)
10
20
20
Load R (Ω)
Switching frequency fs
(kHz)
Input voltage Vg (V)
6
6
6
100
100
100
10
10
10
Output voltage VO (V)
6
6
6
Voltage reference Vref (V)
2
2
2
Scaling factor b
1/3
1/3
1/3
Fig. 9 Loop gain of CCM buck converter with dominant-pole compensation
A PCCM buck converter with freewheel switching is designed.
For comparison, one DCM and one CCM buck converter are also
designed with the same specifications shown in Table 1. Note that,
in order to provide the same load current, the value of the inductor
in DCM case has to be smaller.
First, the steady state performances are simulated. Fig. 8 shows
the output voltages and the inductor currents in the three operation
modes. With the same load, current ripple in DCM case is twice as
much as the others, with the largest output ripple voltage.
The loop gains of the CCM and PCCM converters are then
simulated, respectively. The simulation method can be found in [8].
3085
Fig. 10 Loop gain of PCCM buck converter with dominant-pole compensation
[3]
Overall
Error Amplifier
[4]
Ga in(dB)
Power Stage
[5]
fs
f(HZ)
Bandwidth
P ha se
[6]
fs
Power Stage
f(HZ)
[7]
-90 o
-180o
Phase
Margin
Overall
Error Amplifier
[8]
W-H. Ki, “Signal flow graph in loop gain analysis of dc-dc PWM
CCM siwtching converters”, IEEE Trans. On Ckts & Sys. I, No.6,
pp.644-654, June 1998.
J. Sun, D. M. Mitchell, M. F. Greuel, P. T. Krein, and R. M. Bass,
“ Modeling of PWM converters in discontinous conduction mode – a
reexamination,” IEEE, PESC’98 Record, vol.1, pp. 615-622, 1998.
W-H. Ki, “Analysis of subharmonic oscillation of fixed-frequency
current-programming switch mode power converters”, IEEE Trans.
On Ckts & Sys. I, Vol. 45, Issue: 1, pp. 104 – 108, Jan. 1998
D. Ma, W-H. Ki, C. Y. Tsui, “A pseudo-CCM/DCM SIMO switching
converter with freewheel switching,” in IEEE Int. Solid-State Circuits
Conf.(ISSCC), pp. 390-391, Feb 2002.
D. Ma, W-H. Ki, C. Y. Tsui, “A pseudo-CCM/DCM SIMO switching
converter with freewheel switching,” in IEEE Journal of Solid-State
Circuits, vol. 38, No. 6, pp. 1007-1014, June 2003.
D. Ma, et al, “A CAD simulator based on loop gain measurement for
switching converters”, ISCAS’04, Volume 5, pp. 23-26, May, 2004.
Fig.11 Pole-zero cancellation of PCCM buck converter
Fig. 13 Start-up transient of CCM buck converter
Fig. 12 Loop gain of PCCM buck converter with pole-zero compensation
The start-up transient responses of CCM buck converter and
PCCM buck converter with dominant-pole and pole-zero
compensation are shown in Fig. 13, 14 and 15, respectively. The
results coincide well with our frequency-domain analysis. The
damping behavior in Fig. 13 clearly shows the three-pole
characteristics of CCM converter. Compared with Fig. 14, the
PCCM converter in Fig. 15 settles very fast due to largely extended
bandwidth.
V.
CONCLUSION
A pseudo CCM buck converter with freewheel switching
control is proposed in this paper. The new converter inherits the
advantages of both CCM and DCM converters: it can handle large
current stress while maintaining low current ripple and switching
noise; the power stage only introduces one single low-frequency
pole. Pole-zero compensation can thus be used to extend the
bandwidth. Simulation results successfully verify the merits of the
proposed design.
Fig. 14 Start-up transient of PCCM buck converter with dominant-pole compensation
REFERENCES
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[2]
International Technology Roadmap for Semiconductors, 2003
Edition, http://public.itrs.net/.
M. T. Zhang, M. M. Jovanovic, and F. C. Lee, “Design consign
considerations for low-voltage on-board DC/DC modules for next
generations of data processing circuits,” IEEE Trans. Power
Electron., vol. 11, Mar. 1996.
Fig. 15 Start-up transient of PCCM buck converter with pole-zero compensation
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