Silicon Carbide GTO Thyristor
Loss Model for
HVDC Application
Why SiC?
• Low resistance – reduced drift region widths due to high band
gap ⇒ hence less on state resistance
• High switching frequency – the high velocity saturation and
thinner drift region ⇒ the device switches faster.
• Smaller heat sinks – thermal conductivity of silicon carbide is
three times greater than silicon and hence better heat dissipation.
This results in reduced thermal management system.
• High radiation tolerance and minimal shielding – the electrical
characteristics of silicon carbide device do not vary with
temperature.
Why SiC?
• Higher breakdown voltages- due to the high electric breakdown field
(five times that of silicon), silicon carbide can block higher voltages.
• Higher junction operating temperature range
• Silicon carbide bipolar devices have excellent reverse recovery
characteristics. With the less recovery current, switching losses and EMI
are reduced and hence less need for snubbers.
• High temp operation capability and lower switching losses ⇒ high
frequency operation (more than 20 kHz at > 1 MW) ⇒ less filtering;
smaller passive components; saves space
How far is SiC from commercialization?
• Material availability and quality issues
-micropipes
•
SiC technology
-polytype crystal growth(6H,4H-SiC)
-SiC-SiO2 interface
- ion implantation
Micropipe defect
• Cost of the material.
• Also, the increase in rating of auxiliary components and
effective packaging techniques are important
Outline
SiC MATERIAL
SiC GTO Thyristor
HVDC System
Results
Conclusion
Gate Turn Off Thyristor (GTO)
- Three-terminal, four-layer structured device
- Turn off capability feature
- No commutation circuit - unlike conventional thyristors
A
- Most suitable for high-current, high-speed switching
iA
+
applications, and DC switching applications
V ak
-
G
iG
K
GTO symbol
GTO Turn On
Static Characteristics
IK =αpnpIA +αnpnIK +IL
I A = IG + I K
α pnp I G + I L 
IK =
1 − α pnp − α npn



αpnp , αnpn
-common base current gains
IK - cathode current
IG - gate current
IL - leakage current
GTO Turn On
Static Characteristics
Ik =
IL
1 − (αpnp + αnpn)
αnpn + αpnp = 1
• SiC npn transistors have superior
blocking voltage capability
Open Base Breakdown Characteristics Vs Current Gains
npn and pnp[1]
• Both the transistors go into saturation region
• The device goes into latch-up similar to the thyristor
[1] J. B. Fedison, “High Voltage Silicon Carbide Junction Rectifiers and GTO Thyristors,” Thesis Submitted to RPI New York, May 2001
GTO Turn Off
β off
=
α top
α top
+ α bottom − 1
• Turn off gain is controlled by the gate signal
• Because of a large current gain of bottom transistor, the top transistor
can be controlled with a small gate signal
• Wider range of control on the turn off gain is
achieved for small current gains of bottom transistor
Structure
•
Asymmetrical, complementary
structure
• Partial ionization of p-type
impurities – low conduction
capability
• Reduced drift layer thickness
compared to silicon
• P+ buffer layer –increase the
turn off gain by decreasing
the injection efficiency of npn
transistor
G
A
P+
P1
n1
anode n-base
J3
drift layer
J2
n+
K
cathode
J1
Complementary asymmetric SiC GTO thyristor structure
Structure (cont.)
• npnp configuration
• Heavily doped N+ substrate
• Junction J2 is formed by N-base
and P- drift region
• 1.5 the depletion width to
accommodate the open base
transistor voltage BVceo blocking
capability of GTO.
Loss Model Equations
Conduction losses
Pon − state = J ⋅ ( E g / q ) + J ⋅ ( 3π / 8 ) ⋅ ( kT / q ) ⋅ exp( 3V B / 2 L a E c )
V B = ε ( N a + N d ) ⋅ E c2 ( 2 q ⋅ N a ⋅ N d )
L a = ( D a ⋅ τ a ) 0 .5
τa =τn +τ
Da = 2 ⋅ Dn ⋅ D p ( Dn + D p )
p
D n = (kT q ) ⋅ µ n
D p = (kT q ) ⋅ µ p
Then final expression for conduction losses can be given as,
Pon − state = J ⋅ ( E g / q) + J ⋅ (3π / 8).(kT / q). exp( D)
D = (ε ( N a + N d ) ⋅ Ebd ⋅ 1.5) /(2 ⋅ q ⋅ N a ⋅ N d ⋅ ( KT / q ) ( µ n ⋅ µ p ) ⋅ τ a /( µ n + µ p )
This equation is dependent on doping densities, mobilities, temperature,
applied voltage, and current.
Loss Model
• Si GTO thyristor losses are more
⇒ difference in the on-state
specific resistance.
Conduction Losses
700
600
R sp =
4 BV 2
ε s µ n Ec3
• Electric field for Si is lower ⇒
hence specific resistance is more
Power (w)
500
400
Si
300
S iC
200
100
0
300
• For a given operating current,
conduction losses vary with the
second term in the equation,
which is a function of the
on-state specific resistance
350
400
450
500
Temperature(k)
550
600
Conduction losses for V= 5000 V and J=100 A/cm2
Pon − state = J ⋅ ( E g / q ) + J ⋅ ( 3π / 8 ) ⋅ ( kT / q ) ⋅ exp( 3V B / 2 L a E c )
Loss Model
Switching losses
E off = 1 / 2 ⋅ (ε s ⋅ E cV/( 1 − α npn ) V/V B + Jα npn, max ⋅ τ a
E on = 1 / 3 ⋅ ε s ⋅ E cV V/V B + J 2 ⋅ ( 3 τ a ⋅ V B 2 )/(ε s ⋅ µ n ⋅ E c 3 ) + (E g / 2 q) ⋅ Jτ a
The switching power losses can be calculated using the total energy loss
equation as,
Pswitching = ( Eon + Eoff ) ⋅ f s
Loss Model
•
Smaller ambipolar diffusion length
⇒ smaller lifetimes & low
mobilities of electrons and holes
Switching Losses
1000
800
P owe r(w)
SiC GTO has lower switching losses
• Reduced drift width ⇒less stored
charge ⇒faster switching
600
Si
400
200
0
300
The total power loss in the device is given as,
SiC
350
450
Temperature(k)
500
550
V= 5000V, J=200A/cm2, fs= 1kHz.
Total losses = Conduction losses + Switching losses
Ptotal = Pconduction+ Pswitching
400
600
Simulation Data
Parameter
4H-SiC
Si
(Eg), Energy gap (eV)
3.2
1.1
εr, relative permittivity
9.7
11.7
τp, hole lifetime (s)
575e-09
575e-09
Ec, critical electric field (V/cm)
2.3 e06
0.3 e06
τn, electron lifetime (s)
1150e-09
1150e-09
µn, electron mobility(cm-3/V·s)
800
1360
µp, hole mobility(cm-3/V·s)
120
453
Vsat, saturation velocity(cm/s)
2e07
1e07
Simulations
•
The mobilities and lifetimes of holes and electrons are assumed to be
constant.
•
The device is doped for a desired breakdown voltage.
VB = ε(Na + Nd ) ⋅ Ec2 (2q ⋅ Na ⋅ Nd )
•
SiC GTO is rated at 20 kV, Si GTO is rated at 5000V and for
comparison, Si devices are assumed to be connected in series for
voltage rating.
•
The frequency of operation is 1kHz.
•
The temperature range is 300 K – 600 K. It should be noted that the
silicon GTO cannot withstand more than 423 K, however, the model is
tested for comparison purposes.
•
The devices are subjected to a current density range of 100 A/cm2 –
500 A/cm2.
Simulations- Individual Device Simulation
220
200
180
J= 1 0 0 A /cm 2
T= 300 K
Power (w)
160
140
120
100
Si
800
S iC
600
400
0 .5
Volts, V
1
V o ltag e(V )
1 .5
2
4
x 10
Pcond (W)
Pcond (W)
Psw (W)
Psw (W)
Ptotal (W)
Ptotal (W)
Si
SiC
Si
Sic
Si
SiC
5000
400
538
118
12.5
518.5
550.5
10000
800
538
236
52.5
1037
590
15000
1200
538
354
165
1555.5
702.5
20000
1600
538
472
437.5
2074
975.5
Simulations- Individual Device Simulation
800
700
V=1 0 0 0 0 V
J = 3 0 0 A /c m
2
P owe r(W)
600
500
400
Si
300
200
100
300
S iC
350
Temp (K)
400
450
500
T e m p e r a tu r e ( K )
Ptot(w)
550
Ptot(w)
SiC
Si
300
1762
3516
400
1694.5
3282
500
1725
3394
600
1794.5
3299
600
Simulations- Individual Device Simulation
1400
1200
T e m p = 3 0 0 K, J = 5 0 0 A/C m 2
P owe r(W)
1000
800
Si
600
400
S iC
200
0 .5
Volts, V
1
Vo lta g e (V)
1 .5
2
4
x 10
Pcond (W)
Pcond (W)
Psw (W)
Psw (W)
Ptotal (W)
Ptotal (W)
Si
SiC
Si
Sic
Si
SiC
5000
2000.5
2151.5
1271.5
96.5
3272
2785.5
10000
4001
2151.5
2543
264
6544
2953.5
15000
6001.5
2151.5
3814.5
787
9816
3476
20000
8002
2151.4
5086
2100
13058
4789
Mobility Model
700
600
Mobility of e lectrons
The temperature dependent mobility
model would affect the device model because the diffusion length,
which is a function of lifetime, and
mobility of electron and holes will
vary with temperature.
800
Si
500
400
S iC
300
200
100
300
350
400
450
Tempe ra ture (k)
500
550
600
550
600
350
La = ( D a ⋅ τ a ) 0 .5
Da = 2 ⋅ Dn ⋅ Dp (Dn + Dp )
Mobility of holes (cm 2/V·s )
300
250
Si
200
150
100
SiC
D n = (kT
q )⋅ µ n
Dp = (kT q) ⋅ µ p
50
0
300
350
400
450
Temperature(k)
500
Mobility
• Mobility is defined as the average velocity of free
carriers in a semiconductor due to an applied
electric field.
• Mobility affects the flow of electrons and hence
current.
• Scattering of electrons causes reduction in
mobility
- bulk mobility is calculated neglecting the
scattering at surface and has higher value
Mobility - Dependence factors
800
Temperature dependence
600
Mobility reduces with increase in
temperature due to lattice vibrations
Mobility of e lectrons
-
700
Si
500
400
SiC
300
- Low doping for high breakdown makes
temperature dependence an important factor
200
100
300
400
350
450
Temperature(k)
500
550
600
350
γ
300
Mobility of holes (cm 2/V·s )
µ =
µ o *  T 
 To 
250
Si
200
150
µo value at room temperature To
100
γ constant and varies from -1.8 to -2.5 for n-type
and p-type SiC materials.
50
0
300
SiC
350
400
450
Temperature(k)
500
550
600
Mobility - Dependence factors
Doping concentration
-Mobility decreases with increase in excess
charge carriers due to coulombic scattering.
-At high doping levels the mobility becomes
independent of doping.
µo = µ min +
Hole mobility vs. doping concentration
µ max − µ min
α
 ND + NA 
1+ 

 Nref 
-Mobility also decreases with increase in
injection levels
Electron mobility vs. doping concentration
Mobility - Dependence factors
Electric field
-Mobility decreases with increase in
electric field.
-The average mobility is the ratio of drift
velocity to the electric field at low doping
levels.
- drift velocity saturates at higher electric
fields and is known as saturated drift
velocity.
µ
E


1

(E ) = µ 
1 + µE

vs

1
β
β






Average mobility for holes and electrons
Mobility Model
Caughey-Thomas Mobility Model
µo = µ min+
µ max− µ min
α
 ND + NA 
1+ 

 Nref 
µ=µ
 T 

o * 
 To 
γ


1

µ E (E ) = µ 
 1 + µE

vs

NA+ND
µmax , µmin
Nref
α
1
β
β






the total doping concentration,
minimum and maximum mobilities
doping concentration calculated empirically
curve fitting parameter, measure of how quickly the mobility changes
from µmin to µmax.
µo
value at room temperature To
γ
constant and varies from -1.8 to -2.5 for n-type and p-type SiC materials.
E
applied electric field,
saturation velocity,
Vs
β
constant
• The device model has low doping concentration for high breakdown voltage and is rated for
20kV.
• Hence the mobility model dependency is dominated by temperature variation.
Mobility Model Data
Si
4H-SiC
Minimum electron mobility, µminn [cm2/V·s]
65
50
Maximum electron mobility, µmaxn [cm2/V·s]
1360
950
Minimum hole mobility, µminp [cm2/V·s]
50
10
Maximum hole mobility, µmaxp [cm2/V·s]
505
180
Electron ionization coefficient, αn
0.91
0.76
Hole ionization coefficient, αp
0.63
0.56
Reference electron concentration, Nrefn [cm-3]
8.5e16
2.2e17
Reference hole concentration, Nrefp [cm-3]
6.3e16
2.35e17
Lifetime
• Lifetime is measure of duration of a charge carrier before it
recombines for equilibrium conditions.
• Recombination can occur in several ways when electrons
drop from valence band to conduction band :
- surface trap recombination
- recombination center
• There are several different recombination processes:
- Shockley-Read-Hall recombination
- Auger recombination
Lifetime control
Methods of control:
- Thermal diffusion of impurities
High temperature diffusion at 800-900 oC
causes homogenous distribution of
impurities. These impurities reduce
lifetime. Gold and platinum common
dopants
-Creation of lattice damage
Bombardment of high energy particles
create lattice damage. These damages act as
recombination centers for carriers, thereby
reducing the lifetime.
Effect of lifetime on device operation
•
•
•
•
Higher lifetime results in high value of
current density.
Frequency of operation increases as
lifetime decreases, and hence the
current.
So the DOA (device
operating area) decreases.
Switching-on time decreases with
increase in lifetime, since the device can
reach the on-state current faster.
Switching-off time increases as it takes
more time to sweep out charge carriers.
•
Lifetime can be improved by increasing
the doping levels of the respective
layers of the p-n junction. However the
breakdown voltage will be
compromised.
•
At low level injection the lifetime does
not vary much with temperature.
Diffusion Length
•Diffusion length is the characteristic distance between the point at which the charge
carrier enters the minority region and the point at which it is captured.
• Switching performance of a device is based on the diffusion length.
•Conduction losses are also determined by Ld.
ex: conductivity of the drift region depends on Ld and hence the on-state losses.
•Hence it can be concluded that there is always a trade-off between
switching frequency and on-state losses determined by mobility and lifetime
of electrons
La = ( Da ⋅ τ a ) 0.5
Da = 2 ⋅ Dn ⋅ Dp (Dn + Dp )
Simulations: Device simulation for J = 200 A/cm2, V = 5000V
T (K)
Pcond (W)
Pcond (W)
Psw (W)
Psw (W)
Ptotal (W)
Ptotal (W)
Si
SiC
Si
Sic
Si
SiC
300
2491.5
1375.5
383.5
29.5
2875
2785.5
400
5194.4
2476.5
527.5
37.5
5722
2953.5
500
9093.5
4704
713.5
48
9807
3476
600
1.381e
9184
910
63
1.409e
4789
Simulations: Device simulation for J = 400 A/cm2, V = 10000V
T (K)
Pcond (W)
Pcond (W)
Psw (W)
Psw (W)
Ptotal (W)
Ptotal (W)
Si
SiC
Si
Sic
Si
SiC
300
9966
3193
2792
172
1.27E+04
3366
400
2.08E+04
5699
4020
188.5
2.48E+04
5856.5
500
3.37E+04
1.02E+04
5550
221.5
4.19E+04
1.05E+04
600
5.24E+04
1.88E+04
7137
265.5
5.98E+04
1.91E+04
Simulations- Switching Losses
Switching Losses of SiC GTO Thyristor
Na = 7.1e 14, Nd= 1e 17, BV= 20 kV, Fs = 1kHz
250
700
S iC GTO
200
P off
S iC G TO
600
P on,P off (W)
P on,P off (W)
Na = 9.5e 14, Nd= 1e 17, BV= 15 kV, F s = 1kHz , J = 200
A/ 2
800
150
Te m p Incre a s ing (K)
100
500
400
P off
300
Incre a s ing Te m p(K)
200
50
Te m p Incre a s ing (K)
P on
100
Incre a s ing T e m p(K)
P on
0
0.5
1
Volta ge (V)
2
1.5
x 10
0
0.5
0.6
0.7
0.8
0.9
4
1
Volta ge (V)
1.1
1.2
1.3
• The switch on losses are dominant at low voltage and low temperature
• Drastic increase in switch off losses at high voltage ratings
• Constant increase in switch on losses with increase in temperature while
the switch off losses were decreasing ⇒ effect of mobility
1.4
1.5
x 10
4
Inference
• Conduction losses dominate because, at lower switching frequency the
switching losses are low, and the main power loss is a function of onstate resistance.
• It is found that the conduction losses of silicon GTO thyristor are at
least twice more than silicon carbide device.
• The switching losses of silicon carbide GTO thyristor are at least 12
times less than the silicon device.
• The device operating area (DOA) limits can be improved due to
reduced losses ⇒ the maximum frequency can be increased for a given
current density and operating voltage
• This difference in losses shows that SiC devices have high efficiency
compared to silicon.
• The number of SiC devices per converter leg required is less, due to the
higher voltage rating of the device.
Outline
SiC MATERIAL
SiC GTO Thyristor
HVDC System
Results
Conclusion
HVDC System
•
The configuration chosen for the study
is a monopolar configuration.
dcVltg
•
The transmission system is based
on voltage source converter technology.
Converter at both the ends is a voltage
source converter also known as forced
commutated converter.
Rg3
The system model is designed to
emulate the ac characteristics.
Rg5
Rg1
A
B
C
A
100.0 [MVA]
#1
13.8
#2
62.5
500
.0
B
C
2
6
4
Rg4
•
5
3
1
Rg6
Rg2
HVDC System -VSC Technology
dc line
AC
AC
C1
C2
-Y
Y-
VSC 1
VSC 2
Basic configuration of VSC transmission
X
I
Vac
Phasor diagram
P = Vvsc ⋅ Vac ⋅ sin δ X
(Vvsc - Vac)
Vvsc
Equivalent circuit of VSC transmission
Q = (Vvsc ⋅ cosδ − Vac ) ⋅Vvsc X
HVDC System
Control system
The active power transfer in a system is given as,
P = V1 ⋅V2 ⋅ sin δ X
V1, V2 - ac voltage magnitudes at the sending end
and receiving end respectively.
Xinductive reactance of the dc cable
δ angle between the sending and receiving end voltages.
HVDC System
Overview of the Control System
RePh
shft
Power Controller
SePh
dc Voltage
controller
dc set voltage
Vref
shfti
Qref
Reactive
power
controller
mr
PWM
P
Qmeas
Pdc(ref)
dcvltgi
PWM
mi
Receiving end
Voltage
controller
Vac
dc line
Transformer Y-
System
impedance
VSC 1
AC
VSC 2
AC Filter
AC
Sending end (Rectifier)
P = Vs ⋅Vr ⋅ sin(δ s − δ r ) X
Receiving end (Inverter)
HVDC System
System Simulations
• The system model and the various control systems were
implemented using PSCAD/EMTDC software.
• PSCAD/EMTDC is a simulation tool for analyzing power
systems. PSCAD is the graphical user interface and
EMTDC is the simulation engine.
• The software also has an excellent feature of interfacing
MATLAB/SIMULINK.
• The system model has been developed from an example of
the PSCAD and modified for the specifications.
HVDC System - Simulation Specifications
-System ratings: 120 kV dc link, up to 75 MW power delivered
to the receiving end
-Device ratings: SiC - 20kV/ 5kV, 200 A/cm2 , Si – 5kV, 200 A/cm2 400 A/cm2
- No of devices: For a rating of 120kV, 1000 A, which is the maximum
voltage and current there are several possible arrangements based on the device
rating.
SiC devices: 5 parallel strings of 6 devices in series (for 20kV, 200A device).
5 parallel strings of 24 devices in series (for 5kV, 200A device).
Si devices:
3 parallel strings of 24 devices in series (for 5kV, 400A device).
5 parallel strings of 24 devices in series (for 5kV, 200A device).
-The voltage and current profiles are obtained from the single GTO device
valve of one phase leg in the converter.
-The model is tested for a temperature range of 27o C – 200 o C.
Outline
SiC MATERIAL
SiC GTO Thyristor
HVDC System
Results
Conclusion
Results – Current and Voltage Profiles
Diode Current (A)
T o t a l lo s s
1 .0 k
0 .9 k
0 .8 k
0 .7 k
0 .6 k
0 .5 k
0 .4 k
0 .3 k
0 .2 k
0 .1 k
0 .0
- 0 .1 k
1 4 0 .0 0 k
Ig t o R 1
V g to R 1
Device Voltage (V)
1 2 0 .0 0 k
1 0 0 .0 0 k
8 0 .0 0 k
6 0 .0 0 k
4 0 .0 0 k
2 0 .0 0 k
0 .0 0
Diode Current (A)
1 .5 k
0 .0 2 0
0 .0 1 0
0 .0 0 0
0 .0 3 0
T o t a l lo s s
0 .0 5 0
0 .0 4 0
0 .0 6 0
.
.
.
0 .0 2 0 0
.
.
.
Ig t o R 1
1 .0 k
0 .5 k
1 4 0 .0 0 k
V g to R 1
Device Voltage (V)
1 2 0 .0 0 k
1 0 0 .0 0 k
8 0 .0 0 k
6 0 .0 0 k
4 0 .0 0 k
2 0 .0 0 k
0 .0 0
0 .0 0 4 0
0 .0 0 6 0
0 .0 0 8 0
0 .0 1 0 0
0 .0 1 2 0
0 .0 1 4 0
0 .0 1 6 0
0 .0 1 8 0
Results – Power Loss Profiles
T o t a l lo s s
SiC GTO
Power Loss
Power Density (W/Sq.cm)
3 5 .0 k
T o t a l lo s s
Ig t o R 1
3 0 .0 k
2 5 .0 k
2 0 .0 k
1 5 .0 k
1 0 .0 k
5 .0 k
0 .0
1 4 0 .0 0 k
V g to R 1
Device Voltage (V)
1 2 0 .0 0 k
1 0 0 .0 0 k
8 0 .0 0 k
6 0 .0 0 k
4 0 .0 0 k
2 0 .0 0 k
0 .0 0
0 .0 1 0
0 .0 0 0
0 .0 3 0
0 .0 2 0
0 .0 4 0
0 .0 5 0
.
.
.
0 .0 4 0
0 .0 5 0
.
.
.
Loss Profile for SiC GTO (423 K)
T o ta l lo s s
4 0 .0 0 k
3 0 .0 0 k
2 0 .0 0 k
1 0 .0 0 k
0 .0 0
- 1 0 .0 0 k
- 2 0 .0 0 k
1 4 0 .0 0 k
V g to R 1
1 2 0 .0 0 k
Device Voltage (V)
Si GTO
Power Loss
Power Density (W/Sq.cm)
5 0 .0 0 k
T o ta l lo s s
1 0 0 .0 0 k
8 0 .0 0 k
6 0 .0 0 k
4 0 .0 0 k
2 0 .0 0 k
0 .0 0
0 .0 0 0
0 .0 1 0
0 .0 2 0
0 .0 3 0
Loss Profile for Si GTO (423 K)
GTO Efficiency Calculation
•
The GTO efficiency is calculated based on the power loss profile obtained
for different operating conditions.
•
It is the instantaneous loss as a function of the instantaneous current,
which depends on the modulation index and the switching angles
generated by the PWM.
•
The average loss over few cycles of the fundamental is calculated to find
the cyclic power loss (average power loss for each cycle of the output
voltage).
•
The maximum and minimum power loss for a single device, over a few
cycles is measured from the plots, and the corresponding converter
controlled switches efficiency is calculated.
Cyclic Power Loss Plots
1400
1300
1100
0
2
4
6
8
10
T=423K
4
6
8
Power los s (W.S q.cm)
0
2
4
6
8
10
3500
0
700
0
10
4
6
8
Cyclic Power Loss Plots for Si 5kV, 200 A/cm2GTO
10
4
6
8
10
T=473K
4500
4000
3500
3000
1600
2
2
5000
T=423K
1800
4000
2000
8
2000
4500
2200
6
2200
5000
2400
4
2400
5500
2600
2
2600
T=473K
6000
2800
800
250
0
10
Power los s (W/S q.cm)
3000
1800
2
6500
3200
900
300
900
800
0
1000
Power los s (W/S q.cm)
250
1100
350
1000
300
T=373K
1200
400
1200
350
T=300K
450
Power los s (W/S q.cm)
400
T=373K
Power los s (W/S q.cm)
P ower los s (W/S q.cm)
P ower los s (W/S q.cm)
T=300K
1300
500
1500
Power los s (W/S q.cm)
450
1400
0
2
4
6
8
10
2500
0
2
4
6
Cyclic Power Loss Plots for SiC 20 kV, 200 A/cm2 GTO
8
10
GTO Efficiency Calculation
• Minimum efficiency = (dc power – Ploss(max))/dc power
Ploss(max) = Pmax •(No. of devices in the converter)
• Maximum efficiency = (dc power- Ploss(min))/dc power
Ploss(min)= Pmin •(No. of devices in the converter)
• No. of devices = (No. of devices for voltage sharing)•(No. of
devices for current dividing)•6.
GTO Efficiency Plots
Maximum and minimum efficiencies of converters
using Si GTO rated at 5 kV, 200 A/cm2 and SiC GTO rated at 20 kV, 200 A/cm2.
C o n v e rte r’s C o n tro lle d S w itc h e s E ffic ie n c y P lo t
100
E ff(m a x ,S iC
99
E ff(m a x ,S i
E ff(m in ,S iC
Efficiency%
98
97
E ff(m in ,S i)
96
95
94
93
92
20
40
60
80
140
120
100
T e m p e ra tu re (C )
Efficiency of Si GTO Converter’s Controlled Switches
160
180
200
Efficiency of SiC GTO Converter’s Controlled Switches
Temp (K)
Pmax
Pmin
Max.eff %
Min.eff %
Temp (K)
Pmax
Pmin
Max.eff %
Min.eff %
300
433.3
262.7
99.68
99.48
300
475.2
300.6
99.9
99.85
373
1443.1
873.7
98.75
98.26
373
1245.6
771.8
99.76
99.62
423
3041.2
1842.4
97.78
96.35
423
2402.1
1472.8
99.55
99.77
473
6301.9
3818.9
95.41
92.43
473
4506.9
2749.3
99.17
98.64
GTO Efficiency Plots
Maximum and minimum efficiencies of converters
using Si GTO rated at 5 kV, 400 A/cm2 and SiC GTO rated at 20 kV, 200 A/cm2.
C o n ve rte r’s C o n tro lle d S w itc h e s E ffic ie n c y P lo t
100
E ff(m a x,S iC )
99
E ff(m a x,S i)
E ff(m in ,S iC )
98
Efficie ncy%
97
96
E ff(m in ,S i)
95
94
93
92
20
40
60
80
100
120
T e m p e ra tu re (C )
140
160
180
200
Temp (K)
Pmax
Pmin
Max.eff %
Min.eff %
300
737.6
445.1
99.67
99.46
373
2386.2
1442.8
98.96
98.28
423
5102.65
3088.3
97.77
96.32
473
10548
6388.4
95.4
92.43
GTO Efficiency Plots
Maximum and minimum efficiencies of converters
using Si GTO rated at 5 kV, 200 A/cm2 and SiC GTO rated at 5 kV, 200 A/cm2.
C o n v e rte r’s C o n tro lle d S w itc h e s E ffic ie n c y P lo t
100
E ff(m a x , S iC )
E ff(m in ,S iC )
9 9 .5
99
E ff(m a x , S i)
Efficie ncy%
9 8 .5
98
E ff(m in ,S i)
9 7 .5
97
9 6 .5
96
20
60
40
100
80
T e m p e ra tu re (C )
120
140
160
Temp (K)
Pmax
Pmin
Max.eff %
Min.eff %
300
57.5
40.05
99.9519
99.93
373
58.5
40.5
99.9514
99.929
423
59.6
41.1
99.9507
99.928
System Cost Savings
System Cost Calculation:
•Difference in losses,
dl = (P(loss, Si) •(No. of devices)) – (P(loss, SiC) •(No. of devices))
•The converter operates for 365 days and 24 hours
Losses/year = dl•365•24
•Assuming a rate of 0.04 kW.hr,
Savings = (losses/year)•(0.04) /yr.
System Cost Savings
The maximum and minimum cost savings using a SiC-based converter with 20
kV, 200 A/cm2 GTOs instead of 5 kV, 200 A/cm2 and 5 kV, 400 A/cm2 Si GTOs
.
No. of
devices
dl
Losses/yr
(Losses/yr) · 0.04
Max.savings
814.824 kW
7,137,858.24
7137858.24 kW
kW
285,514.32
285514.32 $$
Min. savings
490.14 kW
4,293,626.4
4293626.4 kW
kW
171,745.05
171745.05 $$
Max.savings
806.824 KW
7,066,082.3
7066082.3 kW
kW
282,643.29
282643.29 $$
Min. savings
484.365
4,243,042.656
4243042.656
169,721.71
169721.71 $$
Si 200 A/cm2
Si -720
SiC-180
Si-432
SiC-180
Si 400 A/cm2
SiC Converter’s Controlled Switches Cost Savings compared to Si-based Converter
Conclusion
•
Since the losses of SiC GTO are less
- the range of efficiency for SiC converter is higher.
- operating cost of SiC converter is less.
- reduced thermal management requirements.
- device operating area (DOA) limits can be increased.
- improved dynamic characteristics ⇒ less switching losses.
- the ratio of number of devices in a SiC converter compared to a Si
converter is less ⇒ higher voltage rating than their Si counterparts ⇒ one
can afford to pay more for a SiC GTO.
• Currently GTO ratings are much lower, and their cost and losses are more
than the Si thyristor. However, can be improved using SiC GTO thyristor.
• Hence, SiC close to commercialization can replace Si GTO thyrsitor.
Co-Author of Publications
1.
B. Ozpineci, L. M. Tolbert, S. K. Islam, M. Chinthavali, "Comparison
of Wide Bandgap Semiconductors for Power Applications,"
10th European Conference on Power Electronics and Applications EPE 2003, September 2-4, 2003, Toulouse, France.
2.
B. Ozpineci, L. M. Tolbert, S. K. Islam, M. Chinthavali, "Wide
Bandgap Semiconductors for Utility Applications,"
IASTED International Conference on Power and Energy Systems (PES
2003), February 24-26, 2003, Palm Springs, California, pp. 317-321.