Tutorial 3 – Digital Logic Structures

1. Warm-up:
◦ Write out the truth tables for AND, OR having 2-bt
inputs and XOR using 3-bit input
◦ Hint for XOR: use the property of associativity; A ⊕
B ⊕ C = A ⊕ (B ⊕ C )

Answer for XOR:
◦ Fast way: odd number of 1’s gives a 1 as output.
A
B
C
Z
0
0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
1
1

2. A two-input AND and a two-input OR are
both examples of two-input logic functions.
How many different two-input logic functions
are possible?


2. A two-input AND and a two-input OR are
both examples of two-input logic functions.
How many different two-input logic functions
are possible?
Answer: A two-input logic function has 22=4
input/output combinations, therefore there
are 24 = 16 possible different output sets and
consequently 16 possible logic functions.


“16 possible output sets when two inputs are
involved”
E.g. OR op:
A
B
Output
0
0
0
0
1
1
1
0
1
1
1
1


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3. a) Replace the
missing blue circles in
the shown circuit with
either a wire or no wire
to give the output C a
logical value of 1.
b) Describe a set of
inputs that give the
output C a logical value
of 0. I.e. write out the
truth table.
c) What type of gate
does this circuit
represent?


Answer:
Therefore it represents a
NOR gate
A
B
C
0
0
1
0
1
0
1
0
0
1
1
0

4. For the
transistor-level
circuit in the
following Figure, fill
in the truth table.
What is Z in terms
of A and B?
A
B
C
D
Z

Answer - truth table:
◦ Therefore Z = A AND B
A
B
C
D
Z
0
0
1
1
0
0
1
1
0
0
1
0
0
1
0
1
1
0
0
1




The previous exercise gave an example of
circuit equivalence known as DeMorgan’s law:
E.g.
NOT(NOT(A) OR NOT(B)) = A AND B
NOT(NOT(A) AND NOT(B)) = A OR B

6. What is the flaw in the following circuit?
Analyse it by working through the truth table
and seeing which inputs show up the flaw.

Answer: the circuit will short-circuit for
certain inputs.
A
B
Output
0
0
1
0
1
1 (short circuit!)
1
0
1 (short circuit!)
1
1
0

7. This transistorlevel circuit
implements the
logic equation Y =
NOT(A AND (B OR
C)). Label the
inputs to all the
transistors:

Answer:
◦ Build the truth
table first!
B
A
C
Y
A
B
C
◦ 8. Given the following
truth table, generate the
gate-level logic circuit,
using the
implementation
algorithm referred to in
Section 3.3.4 of the
text-book (or following
the example diagram in
your notes: Week3f4up.pdf slide titled
“Logical Completeness”)
A
B
C
Z
0
0
0
1
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
1
1
0
◦ 8. Answer:


9. How many lines will a 5-input decoder
have?
10. How many output lines will a 16-input
multiplexer have? How many select lines will
this multiplexer have?

9. How many lines will a 5-input decoder
have?
◦ Answer: 25 combinations = 32 output lines

10. How many output lines will a 16-input
multiplexer have? How many select lines will
this multiplexer have?
16 output lines (since 16 inputs)
log2(16) = 4 select lines (to describe 16 choices)



11. Implement the following functions using
AND, OR, and NOT logic gates. The inputs are
A, B, and F.
a) F has the value 1 only if A has the value 0
and B has the value 1.
b) F has the value 1 only if A has the value 1
and B has the value 0.

Answers:
 Build the truth tables first!


a)
b)
A
B
F
0
0
0
0
1
1
1
0
0
1
1
0
A
B
F
0
0
0
0
1
0
1
0
1
1
1
0

c) Use your answers from (a) and (b) to
implement a 1-bit adder. The truth table for
the 1-bit adder is given below.
A
B
Sum
0
0
0
0
1
1
1
0
1
1
1
0


c) Answer:
12. Is it possible to create a 4-bit adder (a
circuit that will correctly add two 4-bit
quantities) using only four copies of the logic
diagram from (c)? If not, what information is
missing?


12. Is it possible to create a 4-bit adder (a
circuit that will correctly add two 4-bit
quantities) using only four copies of the logic
diagram from (c)? If not, what information is
missing?
Answer: No, the carries are missing - review
the Full Adder and 4-bit Adder examples in
your lecture notes.