p-n junctions

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p-n junctions

Intuitive description.

– What are p-n junctions?

p n junctions are formed by starting with a Si wafer (or ’substrate’) of a given type (say: B-doped p -type, to fix the ideas) and ‘diffusing’ or ‘implanting’ impurities of opposite type (say: n -type,as from a gas source of P – such as phosphine – or implanting As ions) in a region of the wafer. At the edge of the diffused (or implanted) area there will be a ‘junction’ in which the p -type and the n -type semiconductor will be in direct contact. Refer to the Streetman-Banerjee text,section 5.1,for a description of semiconductor processing.

We will review this topic later on,before dealing with metal-oxide-semiconducor (MOS) fied-effect transisitors

(FET).

– What happens to the junction at equilibrium?

Consider the idealized situation in which we take an n -type Si crystal and a p -type Si crystal and bring them together,while keeping them ‘grounded’,that is,attached to ‘contacts’ at zero voltage. At first,the conduction and valence band edges will line up,while the Fermi level will exhibit a discontinuity at the junction.

But now electrons are free to diffuse from the n -region to the p -region,‘pushed’ by the diffusion term D n

∇ n in the DDE. Similarly,holes will be free to diffuse to the n region. As these diffusion processes happen,the concentration of extra electrons in the p -region will build up,as well as the density of extra holes in the n region. These charges will grow until they will build an electric field which will balance and stop the diffusive flow of carriers. Statistical mechanics demands that at equilibrium the Fermi level of the system is unique and constant. Therefore,the band-edges will ‘bend’ acquiring a spatial dependence. This is illustrated in the left frame of the figure on page 97. Note:

1. Deep in the n -type region to the right and in the p -type region to the left the semiconductor remains almost neutral: The contacts have provided the carriers ‘lost’ during the diffusion mentioned above,so that n

=

N

D in the ‘quasi-neutral n region and p

=

N

A

2. There is a central region which is ‘depleted’ of carriers: Electrons have left the region

0 ≤ x

≤ x have left the region

− x p 0

≤ x <

0

,so that for x p 0 in the quasi-neutral

≤ x

≤ x n 0 p we have region.

np < n

2 i n 0 ,holes

. This is called the

‘transition region’ or,more often,the ‘depletion region’ of the junction. Its total width is W

= x n 0

+ x p 0 .

ECE344 Fall 2009 95

3. The voltage ‘barrier’ built by the difusion of carriers upon putting the n and p regions in contact with each other is called the ‘built-in’ potential, V bi

(denoted by eV 0 in the textbook). Streetman and Banerjee present one possible way to calculate it. But an alternative,easier approach is based on the observation that

V bi will be given by the difference between the equilibrium Fermi levels in the the two regions:

V bi

=

E

F n

0

E

F p

0

=

E i

+ k

B

T ln

N n

D i

E i

+ k

B

T ln

N n

A i

= k

B

T ln

N

D n

N

A

2 i

(123)

.

Note that since the hole concentration in the p region, p p

,is equal to N

A

,and the hole concentration in the n region, p n is equal to n

2 i

/N

D

,the equation above can be rewritten as:

V bi

= k

B

T ln p p p n

, (124) or p p p n

= e eVbi/

( kBT

)

= n n

, n p

(125) where the last step is based on the fact that at equilibrium p p n p

= p n n n

.

Note : V

‘potential energy’,measured in joules. If measured in eV,its expression will be

( k

B bi

T /e defined above is a

) ln(

N

D

N

A

/n

2 i

)

, which is V 0 in the text.

ECE344 Fall 2009 96

ECE344 Fall 2009 97

– What happens to a biased junction?

Let’s now apply a bias V a to the junction. We consider V a positive when positive bias is applied to the p -region,as illustrated in the figure. If V a

>

0

( forward bias ),the field in the depletion region will be reduced,so that it will not balance anymore the diffusion current of electrons flowing to the left. Thus,electron supplied from the contact at the extreme right will replenish those electrons entering the p -type region. This will result in a current density J 3 . Having entered the p region,electrons will eventually recombine with holes.

The contact at left will provide the holes necessary for this recombination process,giving rise to a component

J 4 of the total current density. A similar sequence of events will happen to holes: Some will diffuse to the n region (yielding the component J 1 of the current density) recombining there with electrons provided by a current density J 2 from the right-contact.

If,instead,we apply a negative V a

( reverse bias ),the field in the depletion region will increase and the associated drift current will be larger than the diffusion current. However,the flow of electrons from the p region will be negligibly small,since there are very few electrons in p -doped Si. Similarly for holes in the n region. Therefore,the reverse current will be very small. This shows that p n junctions behave like diodes, rectifying the current flow.

Let’s now get back to the equilibrium condition and start to analyze the junction quantitatively.

Equilibrium.

Let’s consider the band-bending and carrier densities at equilibrium.

– Poisson equation.

First,the Poisson equation describing the band bending in the depletion region is: d

2

φ

( x

) dx

2

= − e s

( p

− n

+

N

D

N

A

)

.

(126)

ECE344 Fall 2009 98

This is a nonlinear equation since the carrier densities, p and n ,depend on the potential φ

( x

) itself: n

( x

) = n i exp

EF,n 0

Ei,n 0+ kBT eφ

( x

) p

( x

) = n i exp

Ei,p 0

EF,n 0 kBT

− eφ

( x

)

= n n e eφ ( x ) / ( kBT )

= p p e

− eφ

( x

)

/

( kBT

)

, (127) where n n and p p are the electron and hole densities in the quasi-neutral n and p regions,respectively.

– Depletion approximation.

We can simplify Poisson equation,Eq. (126),by employing the ‘depletion approximation’: Let’s assume that the electric field vanishes outside the depletion region and let’s also ignore the charge due to free carriers in the depletion region x p 0

0 ≤ x

≤ x n

0 and N

A

>> p for

− x p

0 so that:

≤ x

≤ x n 0 (indeed we will have N

+

D

>> n for

≤ x <

0

,since we have depletion of free carriers in these regions), d

2

φ dx

(

2 x

)

= − eN s

D for

0 ≤ x

≤ x n 0 , (128) d

2

φ

( x

) dx

2 so that,using the boundary conditions

= eN s

A for

− x p

0

≤ x <

0

, (129) dφ dx x

= − xp 0

= dφ dx x

= xn 0

= 0

,

(expressing the fact that the electric field vanishes at the edges of the depletion region) and φ

( − x p 0

φ

( x

= x n

0

) =

φ n

0

) =

φ p 0

,expressing the fact that at the edges of the depletion region the carrier concentration

,

ECE344 Fall 2009 99

approaches the concentration in the quasi-neutral regions,we have:

φ

( x

) =

 − eND

2 s

( x

− x n

0

)

2

+

φ n

0

(0 ≤ x

≤ x n

0

) eNA

2 s

( x

+ x p

0

)

2

+

φ p

0

( − x p

0

≤ x

≤ 0)

.

Note that the maximum electric field occurs at x

= 0

:

F max

= eN

A x p

0 s

= eN

D x n

0 s

, where the last equality follows from charge neutrality which requires

N

A x p 0

=

N

D x n 0 .

– Depletion width.

To calculate the width of the depletion region,note that

V bi

= eφ n

0

− eφ p

0 .

Moreover,the continuity of the potential at x

= 0 implies,from Eq. (130):

0 =

φ

(0

) −

φ

(0

+

) =

φ p

0

φ n

0

+ eN

A

2 s x

2 p

0

+ eN

D

2 s x

2 n

0 .

Using now the charge-neutrality condition,Eq. (132),this becomes

0 =

φ p 0

φ n 0

+ eN

A

2 s

N

N

2

D

2

A x

2 n 0

+ eN

D

2 s x

2 n 0 .

ECE344 Fall 2009

(130)

(131)

(132)

(133)

(134)

(135)

100

Inserting into this equation the expression for φ p 0 have:

V bi

= k

B

T ln

N

A

N

D n

2 i

φ

= n 0

2 e from Eq. (133) and using

2 s

N

N

D

A

(

N

A

+

N

D

) x

2 n 0

V

, bi from Eq. (123),we

(136) so that: x n

0

=

2 s

N

A

V bi e

2

N

D

(

N

A

+

N

D

)

1 / 2

.

(137)

Similarly: cm

− 3 and N

D

= 10

19 cm

− 3 x p 0

= e

2

N

2

,we can ignore N

A

A s

N

(

N

D

A

V bi

+

N

D

) with respect to

1 / 2

N

D

.

– Asymmetric junction.

In the simpler case of a very highly asymmetric junction (for example: N

A

(138)

= 10

15 in Eqns. (137) and (138) above,so that: x p

0

2 s

V bi e

2

N

A

1 / 2

, x n

0

2 s

N e

2

A

V

N

2

D bi

1

/

2

<< x p

0 .

(139)

So,the heavily-doped n -region exhibits essentially no depletion. This is a general property: The larger the concentration of free carriers,the smaller the voltage which can drop in the region. In the limit of a metal,we know that no electric field can be sustained,because any voltage drop will be effectively screened by the large concentration of free carriers.

Off equilibrium: The Shockley’s diode equation.

Let’s apply a bias V a to the junction. We shall first consider the ideal case of no generation/recombination in the depletion region (ideal diode). We shall later consider deviations from this ideal condition.

Note: Since the applied bias V a is almost exclusively measured in Volt,it is convenient to indicate by V bi the built-in voltage,also measured in V,so that the built-in potential and the external bias can be simply added.

Thus,in the following V bi indicates the built-in ‘voltage’,measured in V.

ECE344 Fall 2009 101

– Ideal diode : Let’s first consider the ‘ideal diode’; that is: An ideal junction in which there are no generationrecombination processes in depletion region. In addition,let’s make the following simplifying assumptions:

1. The concentrations of free carriers injected into the quasi-neutral regions are small enough so that we can neglect their charge compared to the charge of the majority carriers when solving Poisson equation (low-level injection).

2. The concentration of free carriers everywhere is small enough so that we can use Maxwell-Boltzmann statistics (that is,the highT limit) instead of the full Fermi-Dirac statistics.

3. The quasi-neutral regions are infinitely long.

4. Finally,there’s no electric field in the quasi-neutral regions,so that only diffusion controls the current-flow in these regions.

Also,the calculation of all of the components of the current density J 1 through J 4 in the figure (right frame at page 97) is difficult. However,we know that J 2

=

J 1 and J 3

=

J 4 ,so we need to calculate only the diffusion currents in the quasi-neutral regions J 1 and J 3 . Moreover,it will be convenient to compute J 1 (that is,the hole current J p before it starts decreasing (due to recombination with electrons in the n region) at x

= x n 0 and J 3

=

J n at x

= − x p 0 (for the same reason).

First of all,we can follow again the same procedure we have followed above to obtain the width of the depletion region simply replacing the built-in potential V bi

V bi

V a

,obtaining: with its value modified by the applied bias,

1

/

2 x n 0

=

2 e

2 s

N

N

D

A

(

V

(

N bi

A

V a

+

N

D

)

)

.

(140)

Similarly:

1 / 2 x p 0

=

2 s

N

D

(

V bi e

2

N

A

(

N

A

V a

)

+

N

D

)

, (141)

Thus,the depletion region shrinks under forward bias ( V a

>

0

) but grows under reverse bias ( V a

<

0

).

From Eq. (127) and from the right frame of the figure at page 97 we see that for the concentrations of the free minority carriers which spill-over (electrons spilling over into the p regions and holes spilling over into the

ECE344 Fall 2009 102

n region) we have (using assumption 2 above):

 n

( x

= − x p 0

) = n n 0 e

− e

(

Vbi

Va

)

/

( kBT

)

= n p 0 e eVa/

( kBT

) p

( x

= x n 0

) = p n 0 e eVa/

( kBT

)

, so that the excess carriers at the edges of the depletion region are:

 δn

( − x p 0

) = n p 0 e eVa/

( kBT

)

− 1

δp

( x n 0

) = p n 0 e eVa/

( kBT

)

− 1

,

(142)

(143)

Using now assumption 4,the current in the quasi-neutral regions will be:

 J p

= − eD p dp dx

( x > x n 0

)

J n

= eD n dn dx

( x <

− x p

0

)

.

(144)

The continuity equations for the hole current in the quasi-neutral n region (the component J 1 in the figure for x > x n

0 ) and for the electron current in the quasi-neutral p region will be:

∂pn

∂t

= − 1 e

∂Jp

∂x

− pn

− pn 0

τp

( x > x n 0

)

(145)

∂np

∂t

= 1 e

∂Jn

∂x

− np − np 0

τn

( x <

− x p

0

)

, where τ p and τ n are the (recombination) lifetimes of the minority holes and electrons in the quasi-neutral

ECE344 Fall 2009 103

regions. Combining Eq. (144) and Eq. (145) we get:

 ∂pn

∂t

=

D p

2 pn

∂x

2

− pn

− pn 0

τp

∂np

∂t

=

D n

2 np

∂x

2

− np − np 0

τn

( x > x n

0

)

( x <

− x p

0

)

.

(146)

At steady state,the general solutions are:

 p n

( x

) = p n 0

+

A e

− x/Lp +

B e x/Lp n p

( x

) = n p 0

+

C e

− x/Ln +

D e x/Ln

( x > x n 0

)

( x <

− x p 0

)

,

(147) where L p

= (

D p

τ p

)

1

/

2 and L n

= (

D n

τ n

)

1

/

2 are the hole and electron diffusion lengths in the quasineutral regions and A , B , C ,and D are integration constants to be determined by the boundary conditions.

The first of these boundary conditions is determined by the concentrations of the minority carriers far away in the quasi-neutral regions: p n

( x

→ ∞ ) = p n

0 and n p

( x

→ −∞ ) = n p

0 ,which implies B

=

C

= 0

Another boundary condition results from the requirement that values of p n and n p at the edges of the depletion region match the values p n

( x

= x n

0

) and n p

( x

= − x p

0

) given by Eq. (143) above,so that:

.

 p n

( x

) = p n

0

+ p n

0 e eVa/ ( kBT )

− 1 e

− ( x − xn 0) /Lp ( x > x n

0

)

(148) n p

( x

) = n p

0

+ n p

0 e eVa/ ( kBT )

− 1 e

( x + xp 0) /Ln ( x <

− x p

0

)

.

ECE344 Fall 2009 104

Finally,by Eq. (144):

J p

( x

) = eDppn 0

Lp e eVa/

( kBT

)

− 1 e

− ( x

− xn 0) /Lp ( x > x n 0

)

(149)

J n

( x

) = eDnnp 0

Ln e eVa/

( kBT

)

− 1 e

( x

+ xp 0) /Ln ( x <

− x p 0

)

.

It is important to note that these current densities vary with x because,for example,as J p

( x

) decreases as x increases,the hole current it represents ( J 1 in the figure at page 97) is transformed – via recombination processes – into an electron current ( J 2 in that figure). So,the total current will be independent of x . This constant value can be obtained thanks to our assumption that there’s no generation/recombination in the depletion region. In this case we can evaluate the currents in Eq. (149) at a position in which they have not yet started to ‘decay’ due to recombination,so J p at x

= x n 0 current will be: and J n at x

= − x p 0 . Therefore the total

J total

=

J p

( x n 0

) +

J n

( − x p 0

) = eD p p

L p n 0

+ eD n n p 0

L n e eVa/ ( kBT )

− 1 =

J s e eVa/ ( kBT )

(150)

− 1 where J s is the ‘saturation current density’ (the maximum current density we have under reverse bias,that is,for V a

→ −∞

). Equation (150) is known as ‘Shockley’ (or ‘diode’) equation . The figure in the next page illustrates the qualitative behavior of J total as a function of applied bias V a

.

ECE344 Fall 2009 105

I

V a

ECE344 Fall 2009 106

A few considerations about Shockley’s equation:

1. Under very large reverse bias ( V a

→ −∞ ) we see that J total

→ −

J s

,the ‘saturated reverse current’.

This current is due only to the drift of those few minority carriers (holes in the n -region,electrons in the p -region) which are thermally generated. We can increase the reverse current by increasing the density of minority carriers by – for example – iluminating the sample. This is a ‘photo-diode’.

2. Under forward bias the current is dominated by the diffusion component.

It’s easy to see: The drift component does not change much with bias.

This is because this component is limited by how many minority carriers ( p n 0 heighth e

(

V bi

V a and n p 0 ) are available to drift and these do not depend on bias. On the contrary, the diffusion current is limited by how many majority carriers ( p p

0 and n

)

. And this depends exponentially on the applied bias.

n

0 ) can surmount the barriers of

3. In an asymmetric junction the total current is dominated by the most heavily-doped side of the junction. For example,in a junction with N

A

>> N

D

,we will have n p

0 << p n

0 ,so that

J total

J p

( x n 0

) = eD p p n 0

L p e eVa/ ( kBT )

− 1

.

(151)

4. There is an equivalent way to calculate the current.

Consider the hole current at the edge of the n depletion region, J p

( x

= x n 0

)

. This current must be large enough to maintain a steady-state hole population in the quasi-neutral n -region as holes recombine. From the first of equations (148) we have that the total hole charge in the n -region is

Q p

= eAp n

0 e eVa/ ( kBT )

− 1

∞ xn 0 dxe

− ( x − xn 0) /Lp = eAL p p n

0 e eVa/ ( kBT )

− 1

.

(152)

Since holes ‘disappear’ via recombination every τ p seconds,the rate at which the hole charge disappear will be:

Q p

τ p

= eA

L p

τ p p n

0 e eVa/

( kBT

)

− 1 = eA

D p

L p p n

0 e eVa/

( kBT

)

− 1

, (153)

ECE344 Fall 2009 107

having used the fact that L p

/τ p

=

D p

τ p

/τ p

=

D p

/τ p

=

D p

/ D p

τ p

=

D p

/L p

. Therefore,in order to replenish this charge,we must have:

J p

( x n 0

) =

Q p

Aτ p

= e

D p

L p p n 0 e eVa/ ( kBT )

− 1

, (154) which is the same result we have obtained before (the first of Eqns. (149)) from the diffusion current. This method of calculating the current is called ‘charge control method’.

– Junction breakdown.

From what we have seen so far we may conclude that under reverse bias the current will approach asymptotically the value

J s as we apply an ever increasing voltage. However,this is not what happens: The Shockley equation (150) describes correctly the behavior of the diode only as far as V a

>

V

BD

,some critical

‘breakdown voltage’ V

BD

. As soon as the reverse bias exceeds this value the current increases dramatically.

This is due to effects which we have not yet considered and which go beyond the simple assumptions we have made so far:

1.

Avalanche Breakdown.

We have assumed that electrons and holes can be described by the DDEs,so that they always remain at

(or near) thermal equilibrium. But we have seen before (pages 75-77 of the Lecture Notes,Part 1) that under a high electric field charge carriers can gain kinetic energy in excess of the thermal value

(3

/

2) k

B

T .

Whenever carriers gain from the field an amount of kinetic energy exceeding the vaue of the gap of the semiconductor, E g

,‘impact ionization’ can occur: This is a process by which a conduction carrier (say,an electron in the CB,just to fix the ideas) ‘hits’ (via the Coulomb force) another electron in the valence band.

In this collision process energy is transfered from the conduction electron to the valence electron. The latter is excited into the CB,leaving a hole in the VB. The net effect is that the original electron loses an amount

E g of kinetic energy generating an electron-hole pair. Actually,for such a process to occur,it is not enough to have an intial electron with energy equal to E g

,since momentum conservation also holds and this implies that for each semiconductor there exists a minumum ‘threshold’ kinetic energy which impact ionization cannot occur.

E th

> E g below

ECE344 Fall 2009 108

ECE344 Fall 2009 109

The top frames of the figure on the previous page show the inization rate (that is,the number of ionizations per unit time) obtained by various quantum-mechanical calculations for electrons and holes in Si. A common approximation made for the ionization rate,

1

/τ ii

,as a function of electron or hole kinetic energy, E ,in the

CB and VB,repectively,is the so-called Keldysh formula:

τ

1 ii

(

E

)

=

τ

I

B

(

E th

)

E

E th

E th p

, (155) for E > E th

,vanishing otherwise. The constant B is a dimensionless parameter and

1

(

E th

) is the scattering rate at the threshold energy. The energy E th is the minimum energy (dictated by energy and momentum conservation) a carrier must have in order to be able to generate electron-hole pairs. Clearly,

E th

E th

> E g by energy conservation. But,as we said above,momentum conservation may require that be much higher,since the recoil carriers and the generated carriers will have to share the available momentum and so cannot in general have vanishing energy. The coefficient p at the exponent takes the value of 2 for semiconductors with direct gap. In general,it takes values as high as 6 (as determined by complicated calculations). Lower values for p imply a ‘soft threshold’ (carriers will ionize with slowly increasing probability as E grows beyond E th

). Large values of p imply a ‘hard threshold’: Ionization will occur almost immediately as the energy of the carrier crosses the threshold energy. Phonon-assisted processes (in which one or more phonons are emitted or absorbed during the ionization process) can soften the threshold,relaxing the restrictions posed by momentum conservation... As you see,the situation is particularly complicated...

The bottom frame of the figures on page 109,instead,show the ‘ionization coefficient’ α as a function of the electric field in a homogeneous situation (that is: infinitely long crystal with position-independent electric field). This parameter is most often of interest in the breakdown of p n junctions. It is defined as the number of pairs generated per unit length,so that it also represents the rate at which the current density increases (per unit length): Considering for now only electrons: dJ n dx

=

α n

J n

.

(156)

ECE344 Fall 2009 110

Since each electron at energy E generates electron-hole pairs at a rate

1

/τ ii

(

E

)

,if f

(

E

) is the electron distribution function,then:

α n

=

1 dE ρ

(

E

) f

(

E

)

, (157) nv d

τ ii

(

E

) where n is the electron density and v d is the drift velocity. It can be seen (perhaps not too trivially) that the functional dependence of τ ii as given by Eq. (155) does not affect α n too much. On the contrary,the shape of the distribution function f

(

E

) as a function of the field dramatically affects α n

. Therefore,the whole game consists in estimating how f changes with F .

Shockley had the basic idea that only those electrons which manage to be accelerated to E losing energy to phonons will contribute to the ionization process. Let’s define by P ph

(

E th

, E

) without dE the probability per unit time that an electron of kinetic energy E will scatter (via phonon collisions) into a state at energy

1

/τ ph

E . Then,the probability that an electron scatters (into any other energy state) per unit time is

(

E

) = dE P ph

(

E , E

)

. If P no − ph

( t

) is the probability that the electrons has not scattered up to time t ,the probability that it will not have scattered up to t

+ dt will be:

P no

− ph

( t

+ dt

) =

P no

− ph

( t

) 1 − dt dE P ph

(

E , E

)

.

(158)

Solving this equation for a time interval

[ t 1 , t 2

]

,we get

P no − ph

= exp − t 1 t 2 dt dE P ph

(

E , E

) = exp − t 1 t 2 dt

τ ph

(

E

)

.

(159)

(Note that E and E are functions of time due to their acceleration in the field,so the integration is not trivial). Now,the probability that an electron will not scatter with phonons while being accelerated from energy E

= 0 to E

=

E th can be obtained from Eq. (159) by using the chain-rule (let’s consider only the

ECE344 Fall 2009 111

1D case for simplicity): dE dt

= since v

= ( dE/dk

)

/

¯

. Then: dE dk dk dt

= dE eF dk

= eF v

→ dt

= dE eF v

,

P no − ph

= exp −

1 eF 0

Eth dE

τ ph

(

E

) v

(

E

)

= e

− F 0 /F

, (160) where F 0

=

0

Eth dE/

[ eτ ph

(

E

) v

(

E

)] is a constant (that is,independent of the field),so that:

α

(

F

) =

α 0 e

F 0 /F

.

(161)

Clearly,one can argue about the assumption that after every collision the electrons must start from zero energy. Nevertheless,this ‘lucky electron’ model captures the basic feature of the ionization coefficient at small fields F , α

∝ exp( − constant /F

)

.

Avalanche.

As soon as impact ionization begins to take place in a p n junction under reverse bias,the current begins to increase. This is obvious from the definition of the ionization coefficient,Eq. (156). But a run-away phenomenon can actually occur: If the electric field in the depletion region of the reversed-bias junction is sufficiently large,one electron may impact-ionize,creating an electron-hole pair. The generated electron and hole may now be strongly accelerated by the field,thus gaining kinetic energy above the ionization threshold and,in turn,impact-ionize themselves. Clearly,this process resembles a chain reaction and it can lead to a fast and dramatic increase of the current. For obvious reasons it is called avalanche breakdown .

[Ultimately,as more and more carriers are generated,we reach what’s called a ‘high-level injection’ situation in which the depletion region ceases to be depleted. Under these conditions the resistivity of the depletion region drops,and so the potential drop across it and,finally,the electric field. This will put a limit to the run-away phenomenon.]

ECE344 Fall 2009 112

In order to see under which conditions avalanche can be triggered,let’s generalize Eq. (156) to the case of a p n junction under strong reverse bias. Let’s refer to the figure on page 116. As we saw above,the current is due to the drift of those few minority carriers which enter the depletion region. Consider now the initial minority-electron current injected from the left. This will grow as: dJ n dx

=

α p

J p

+

α n

J n

, (162) or dJ n dx

− (

α n

α p

)

J n

=

α p

J , (163) where J

=

J n

+

J p is the total electron and hole current,constant at steady-state. To determine the breakdown condition,let’s denote with J n

( − x p

0

) the electron current density incident from the left-edge of the depletion region (at x

= − x p 0 depletion region (at x

= x n 0 solution of Eq. (163) can be written as:

) and let’s assume that the electron current exiting the high-field

) is a multiple M n of J n

( − x p 0 be carried by electrons,we can assume J n

( x n 0

) =

M n

J n

( −

)

. Since most of the current at x

= x n 0 x p 0 will

) ≈

J . With this boundary condition the

J n

( x

) =

J

1

M n

+ x

− xp 0 dx α p exp − x

− xp 0 dx

(

α n

α p

) exp x

− xp 0 dx

(

α n

(164)

α p

)

( Note: This comes from the fact that the general solution of the first-order linear differential equation dy ( x ) dx

+ a

( x

) y

( x

) = b

( x

) is where y ( x ) = C e

− A ( x ) + e

− A ( x ) dx b ( x ) e

A ( x )

,

C is an integration constant determined by the boundary condition and A

( x

) = x dx a

( x

)

).

ECE344 Fall 2009 113

Evaluating J n

( x

) at x

= − x must also require J n

( x n 0 p 0 yields J n

( − x p 0

) =

J/M n

) =

J . With some algebra this implies:

,which is our boundary condition.

We

1 −

1

M n

= xn 0

− xp 0 dx α n exp − x

− xp 0 dx

(

α n

α p

)

.

(165)

The avalanche breakdown voltage is defined as the voltage at which M n

→ ∞

. Thus,at breakdown the integral above – called ‘ionization integral’ – approaches unity: xn 0

− xp 0 dx α n exp − x

− xp 0 dx

(

α n

α p

) = 1

.

For a hole-initiated avalanche we get a symmetrical result: xn 0

− xp 0 dx α p exp − x xn 0 dx

(

α p

α n

) = 1

.

(166)

(167)

Equations (166) and (167) are equivalent: The condition determining the onset of breakdown depends only on what happens inside the depletion region,not on which type of carrier initiates the ionization process.

Note that for semiconductors for which α n

α p

(as in GaP,for example),the breakdown condition becomes simply xn 0 dx α

= 1

, (168)

− xp 0 with obvious meaning: If the probability of ionizing over the depletion region reaches unity,avalanche will occur.

Since we have defined the breakdown voltage V

BD as the voltage at which the multiplication coefficient

M n calculated above diverges to infinity,an empirical expression for M n capturing this asymptotic behavior

ECE344 Fall 2009 114

is the following:

M n

1

1 − (

V /V

BD

) n

, (169) where n is a ’suitable’ exponent which usually varies from3 to 6,depending on the type of junction and semiconductor. The breakdown voltage can be calculated from known doping profile,ionization rates,etc.

from the equations above. In the case of an abrupt junction we have:

V

BD

=

F max

( x n

0

2

+ x p

0

)

, (170) where the maximum field in the depletion region is given by Eq. (131). For ‘linearly graded’ junctions

(junctions with a doping profile varying linearly,rather than abruptly),the formula above must be corrected by a factor 2/3.

ECE344 Fall 2009 115

ECE344 Fall 2009 116

2.

Zener breakdown.

Another cause of breakdown is related to the quantum mechanical process of tunneling (see Lecture Notes,

Part 1,page 10). At a very large electric field in a reverse-biased p n junction,electrons in the valence band may tunnel across the band gap of the semiconductor,thus creating an electron-hole pair. The process may lead to breakdown either directly (so many pairs will be crated that the leakage current will grow) or indirectly: The electrons and holes generated by the tunneling process will impact-ionize and an avalanche process will begin. This breakdown mechanism is called ‘Zener breakdown’. It affects mostly heavily-doped junctions in which the built-in voltage and the applied (reverse) bias fall over a narrow depletion region,thus giving rise to large electric fields.

A relatively simple estimate of the strength of the process may be obtained by assuming that the electrons have to tunnel through a triangular barrier of height E

G and length E

G

/

( eF

)

(see the figure in the previous page). Using a suitable approximation,the tunneling probability can be calculated and one finds that it is proportional to:

P

Zener

(

F

) ∝ exp

 −

4(2 m

)

1

/

2

E

3 / 2

G

3 e

¯

, (171) where m

∗ is the electron effective mass in the gap (usually approximated by the smaller between the electron and hole effective masses). More rigorous calculation show that the current is given by:

J

Zener

(2 m

)

1

/

2 e

3

F V a

4

π

2 ¯ 2

E

1

/

2

G

P

Zener

(

F

)

.

(172)

This expression is independent of temperature and it is valid only for semiconductors with a direct gap (such as most of the III-V compound semiconductors). On the contrary,for semiconductors with indirect gap (such as Si and Ge),the calculations must take into account the fact that crystal momentum must be supplied

(mainly by phonons) in order to allow a transition from the top of the valence band at the symmetry point

Γ to the bottom of the conduction band at other locations in the BZ (at the symmetry points L in Ge,near the symmetry points X for Si). The role played by phonons in the process renders Zener breakdown quite

ECE344 Fall 2009 117

strongly temperature-dependent.

Time-transients.

We have so far limited our attention to the steady-state behavior of the device. We have seen that when we move from the equilibrium situation ( V a

= 0

) to forward or reverse bias ( V a

= 0

) we must move charges out

(reverse bias) or in (forward bias) the depletion region. In practical applications it is important to know how quickly the device can adjust to a new bias condition.

Unfortunately a detailed analysis of time-transient behavior is complicated: We would have to solve selfconsistently the DDEs (including their full time-dependence) and Poisson equations. However,a couple of examples can give an idea of how a diode will ‘switch’.

– Decay of stored charge.

Consider a forward-biased p n junction with a curent I

= jA flowing through it. Using the ‘charge control’ model discussed before,we may view the current at steady state as replenishing the charge of minority carriers recombining. In formulae,using current continuity and assuming a one-sided p

+

n junction so that the total current is almost completely due to the hole current:

∂j p

( x, t

)

∂x

= e

∂δp

( x, t

)

∂t

+ e

δp

( x, t

)

τ p

.

(173)

Integrating both sides over x from x n 0 to n region,we get:

∞ at time t ,since the current j p vanishes infinitely deep into the j p

( x n 0 , t

) = j

( t

) = dQ p

( t

)

+

Q p

( t

)

, (174) dt τ p where Q p

( t

) = e

0 x

δp

( x, t

) is the total hole charge per unit area stored in the n -type side of the junction.

At steady state we recover the usual result j

=

Q p

/τ p

,which have we obtained before. But let’s now assume that at t

= 0 we disconnect the current source so that j

= 0 for t >

0

. The sudden removal of the current means that the hole charge Q p

( t

) will decay in time,since there will be no influx of holes from the p

+ region to replenish those which recombine in the n region. Indeed,we can solve Eq. (174) with the initial condition

ECE344 Fall 2009 118

Q p

( t

= 0) = jτ p and setting j

= 0 in that equation: dQ p

( t

) dt

= −

Q p

( t

)

τ p

, (175) or:

Q p

( t

) = jτ p e

− t/τp

, (176) showing that indeed the positive charge due to holes ‘stored’ in the n side of the junction decays with a time constant τ p

.

Knowing how the hole charge decays with time,we can calculate how the voltage across the junction changes with time: At steady state (for t <

0

) the junction was forward biased,so that V

( t <

0) =

V a

. But at much later times,after the hole charge will have disappeared,we must have the junction at equilibrium so that V

( t

→ ∞ ) = 0

. We can calculate this time dependence by assuming that the spatial dependence of the hole concentration is exponential during the entire transient (condition which,as explained in Sec. 5.5.1

of the text,is not fully satisfied). Then we know that the voltage drop is correlated to the excess hole density at x n

0 via

∆ p n

( t

) = p n

0 exp eV

( t

)

− 1

.

k

B

T

Assuming now,as we said above,that hole density is exponentially decaying at all times,we have:

(177)

δp

( x, t

) = ∆ p n

( t

) e

− ( x

− xn 0) /Lp

, (178) so that:

Q p

( t

) = e

Using Eq. (176) and (177) we have,finally: xn 0 dx δp

( x, t

) = ∆ p n

( t

)

L p

.

V

( t

) = k

B

T e ln jτ p eL p p n 0 e

− t/τp + 1

.

(179)

(180)

ECE344 Fall 2009 119

This shows that the voltage across the junction decays to zero at first linearly but exponentially at large times t .

– Switching Diodes.

In most cases,a diode is supposed to switch from the conducting (forward-bias) to the non conducting (reverse bias) state. The speed at which the switching can occur is limited by the time it takes to remove or add charge to/from the depletion region. This depends on two parameters: the lifetime of the carriers, τ n and τ p

, and on the capacitance of the junction.

The importance of these parameters is illustrated by considering a sudden forward-to-reverse bias transition.

Consider a diode in series with a resistor R. Assume initially the p n junction in forward bias with current

I f flowing in the circuit. Since only a small voltage will drop across the junction under these conditions, most of the voltage, V

=

RI f

,will drop across the external resistor. Assume now that we switch suddenly the polarity of the external bias.

In order for the junction to go under reverse bias,a large amount of charge has to be removed from the junction in order to form the large depletion region. This process – and the speed at which happens – is controlled by the ‘depletion capacitance’ which we shall discuss below: A larger capacitance requires more charge in order to establish a given potential drop. But even before this can happen,the excess minority carriers (holes in the n region and electrons in the p region) which existed under forward bias must ‘recombine away’. The speed of this process is controlled by the carrier lifetime.

Thus,often impurities (Au,for example) are intentionally added to the junction in order to speed up the process.

Junction capacitance.

Capacitance is a measure of the charge stored per unit change of voltage. A larger capacitance means that more charge must be moved in or out,so that – for a fixed current – more time is needed to complete the process.

Thus,this translates into a longer delay in responding to the new bias condition.

In a p n junction two major capacitances are at play: 1. The capacitance associated with the charge which must be moved in or out of the depletion region. This is called the ‘depletion capacitance’. 2. The capacitance present under forward bias due to charges spilling over into the quasi-neutral regions. This is called ‘diffusion capacitance’. Let’s now consider these two components separately.

ECE344 Fall 2009 120

– Depletion capacitance.

When the bias V a applied to the junction is varied,the width of the depletion region changes according to

Eqns. (140) and (141). The charge present in each depletion region due to the ionized dopants will be:

Q depl

= eAN

D x n 0

= eAN

A x p 0 , (181) where A is the cross-sectional area of the junction. There will also be a component of charge due to the motion of majority carriers. But this happens very quickly (in the time scale of picoseconds or less),so we can ignore this delay. Thus,by definition of capacitance,

C depl

= dQ depl dV a

= eAN

D dx dV n a

0

=

A e s

2

N

A

N

D

(

N

A

+

N

D

)

1

/

2

(

V bi

1

V

A

) 1

/

2

, (182) or,noticing that from Eqns. (140) and (141)

W

= x p

0

+ x n

0

=

2 s

(

V bi

V a

)(

N

A

+

N

D

) e N

A

N

D

1

/

2

, (183) we can rewrite Eq. (182) as:

C depl

= x n 0 s

A

+ x p 0

= s

A

W

, (184) which is just the capacitance of a parallel-plate capacitor with a dielectric of permittivity s

,with plates of area A separated by a distance W

= x n

0

+ x p

0 .

ECE344 Fall 2009 121

– Diffusion capacitance.

The concentration of excess carriers diffusing in the quasi-neutral regions can be obtained from Eq. (148):

 δp n

( x

) = p n

( x

) − p n 0

= p n 0 e eVa/

( kBT

)

− 1 e

− ( x

− xn 0) /Lp ( x > x n 0

)

δn p

( x

) = n p

( x

) − n p 0

= n p 0 e eVa/

( kBT

)

− 1 e

( x

+ xp 0) /Ln ( x <

− x p 0

)

.

(185)

The charge per unit area will be (considering only holes,a similar expression will hold for electrons):

Q dif f,p

= e

∞ xn 0

δp n

( x

) dx

= eL p p n 0 e eVa/ ( kBT )

− 1

.

Under strong forward bias, e eVa/ ( kBT )

>>

1

,so:

(186)

C dif f,p

≈ dQ dif f,p dV a

= e

2

L p p n 0 k

B

T e eVa/

( kBT

)

≈ e k

B

T

L

2 p

D p

J p

( x n 0

) = e k

B

T

τ p

J p

( x n 0

)

, (187) where we have used Eq. (150) in the last step. Accounting now for the charge of the minority electrons diffusing into the p quasi-neutral region:

C dif f

≈ dQ dif f,p dV a

+ dQ dif f,n dV a

= e k

B

T

[

τ p

J p

( x n 0

) +

τ n

J n

( − x p 0

)]

.

(188)

Note: This is the equation found in most textbooks. However,in a text by Karl Hess (and in a brief comment on the lastest edition of the Streetman-Banerjee’s book) one finds instead:

C dif f

≈ e

2 k

B

T

[

τ p

J p

( x n

0

) +

τ n

J n

( − x p

0

)]

, (189)

ECE344 Fall 2009 122

where the additional factor of 1/2 is explicitly commented and the claim is made that Eq. (188) is in error.

This factor can be justified in hand-waving fashion by noting that the charges Q dif f,p and Q dif f,n are like the charges in the two opposite plates of a capacitor,so that the capacitance should be given by the change w.r.t. the applied bias of the average of the electron and hole charges. A more sophisticated and rigorous explanation is given by S. E. Laux and K. Hess,IEEE Trans. Electron. Device vol. 46,no. 2 (February 1999), p. 396. Their argument is based on the observation that – rigorously speaking – the diffusion charge extends also inside the depletion region,so that the integration in Eq. (186) should extend from 0 to

,not from x n 0 (and similarly for the expression for Q dif f,n

). Since as V a changes charges will leave the depletion region,we will obtain a lower estimate for the charge,and so for the capacitance. In a way,this argument is equivalent to our ‘hand-waving’ argument since both reduce to accounting for the charges throughout the entire junction,not just in the quasi-neutral regions.

ECE344 Fall 2009 123

Other ‘diodes’: Heterojunctions,

Metal-Semiconductor junctions (Schottky contacts), MOS capacitors

p n junctions are ubiquitous in semiconductor devices: We had to analyze their characteristics in some detail because this understanding is required to analyze,in turn,the characteristics of many types of devices (bipolar junction transistors – BJTs – in particular). However,other types of ‘junctions’ play a major role in several types of transistors: Heterojunctions (that is,the junction between two different semiconductors) make up heterojunction bipolar transistors (HBTs),high electron-mobility transistors (HEMTs,also known as ‘modulation-doped field-effect transistors’,MODFETs),and injection lasers; Schottky contacts (that is,the ‘junction’ between a semiconductor and a metal) enter heavily in the operation of metal-semiconductor FETs (MESFETs),among other devices;

MOS - metal-oxide-semiconductor- capacitors are at the heart of what is arguably the most important type of transistor in VLSI technology,the ‘metal-oxide-semiconductor field-effect transistor’ (MOSFET).

We shall now discuss in turn each of these ’junctions’ (or ‘diodes’,as they broadly fall into the category of two-terminal devices). We shall not go into too much detail as far as heterojunction and Shottttky contacts are concerned,but we shall analyze carefully MOS diodes (or ‘capacitors’),since the operation of MOSFETs requires some basic understanding of the accumulation,depletion,and inversion of the surface of semiconductors in contact with an insulating layer.

Heterojunctions.

– Band-alignment.

As we have seen in the midterm exam 1,the ‘workfunction’ of a solid is the energy required to excite an electron from the bottom of the conduction band and bring it to the energy of the vacuum,so that the electron becomes free from the attractive potential of the crystal.

Therefore,if we consider two semiconductors,simply labeled ‘1’ and ‘2’ in the figure below,each isolated from the other,they will have a band alignment as shown in the figure below (left),since the energy level of free electrons (the ‘vacuum’ level) is the same for both materials. The edges of the conduction and valence bands will exhibit discontinuities

E

C and

E

V respectively,as indicated in the figure. Figure on page 29 of the Notes,Part 1,shown

ECE344 Fall 2009 124

how the valence and conduction of several semiconductors (characterized by their lattice constants) bands align.

E vac e

χ

2 e

χ

1

E

C2

E

F2

∆ E

C

E

C E

C1

E

C1

E

F1

E

V1

∆ E

V

E

C2

E

F2

E

V2

E

F1

E

V1

E

V

E

V2

As we bring the two semiconductors in electrical contact,we know that their Fermi levels must line-up under equilibrium conditions. On the other hand,the discontinuities

E

C and

E

V

(which depend on the presence of microscopic dipoles at the interface) must be present in order to account for the difference of the bandgaps.

In order to accommodate these two requirements,upon bringing the materials in contact,electrons flow from one material to the other (from 2 to 1 in the figure) and holes in the opposite direction (1 to 2 in the figure), much as it happens in a ‘conventional’ junction ( homo junction,‘same’ junction,from Greek). As electrons deplete region 2,positive charge is formed,thus forming a depletion layer with the potential energy showing positive second-derivative (upwards curvature). Simililarly,hole leave behind negative charge,resulting in the diagram shown above (right). This is the equilibrium,zero-bias band-diagram of a hetero junction (that is,a junction made up of two different materials).

ECE344 Fall 2009 125

– Thermionic emission.

In the figure below we use the example of GaAs and the alloy Al x

Ga 1 − x

As (where x ,known as the ‘mole fraction’,is the molar fraction of Al ions to Ga ions). This type of heterojunction can be obtained by starting from a GaAs substrate and growing successive layers of Al x

Ga 1 − x

As via Molecular Beam Epitaxy,in which beams of Ga,Al,and As ions (beams whose intensities are in carefully monitored proportions) are ‘shot’ on the GaAs surface. If the correct ratio of beam intensties is used,the process will result in the deposition of the alloy Al 0 .

3 Ga 0 .

7 As on GaAs. As seen from the figure on page 29,at this ‘mole fraction’ Al 0 .

3 Ga 0 .

7 As has the same lattice constant of GaAs,so that we will end up with a crystallographically perfect heterojunction. A slight mismatch of lattice constants can be tolerated for thin films. The top layer will be under compressive or tensile biaxial strain (depending on whether its lattic constant is larger or smaller that that of the substrate).

If the film thickness is small enough,the energetic cost of mainting the strain will be smaller than that of creating crystal defects (broken arrays of ions,known as ‘stacking faults’,crystal planes misaligned with one-another,known as ‘dislocations’ etc.). But is the film is too thick,these kind of defects will be eventually energetically favorable and the crystal structure of the top layer will shown a non-ideal (and usually unwanted) crystalline structure.

Coming back to our example,GaAs has a smaller band gap (

1.51 eV) than Al x

Ga 1 − x

As (

1.72 eV for x

= 0.3,for example). Experimentally it is found that most of the discontinuity of the energy gap falls in the conduction band. Therefore,as soon as the two materials are brought together,the conduction bands will line-up as shown in the left frame of the figure.

The resulting structure behaves like a diode,but in order to evaluate the magnitude of the current flowing across the heterointerface,we must modify the analysis we have done in the context of p n homojunctions, since the presence of the band discontinuity presents some new physical aspects.

ECE344 Fall 2009 126

In principle,the qualitative aspects of the junction are similar. We saw that one possible way to look at the electron flux from the n side of a p n junction to the p side consisted in looking at all electrons which have sufficient kinetic energy to overcome the ‘barrier’ of height eV bi n p

0

[ exp

( − eV a

/

( k

B

− eV a

.

Their number is exactly

T

) − 1]

,the very factor which controls the electron diode current,since it fixes the gradient of the electron concentration,and so the diffusion current. At zero bias,the drift term opposes exactly this flow,thus yielding zero current. But under forward bias,exponentially more electrons can overcome the barrier,the drift term remaining essentially unchanged,and a large current would result. The same happens in a heterojunction. There are two main differences. First,since the band discontinuitues

E

C and

E

V are in general very different,unlike what happens in homojunctions,the type of carriers facing the smaller barrier will usually dominate. Let’s assume that in our example

E

C

<

E

V

(unlike what shown in the figure),so that we can deal only with electrons. The second difference lies in the fact that the ‘barrier’ is now caused not by the built-in potential,but by the conduction-band discontinuity

E

C

. Only electrons which are thermally excited to energies above the barrier can make it across. This is called ‘thermionic current’,in analogy with the electron current emitted by a heated filament (as the W filament in an incandescent light bulb).

The derivation of an accurate formula describing the current through the heterojunction is somewhat

ECE344 Fall 2009 127

complicated. An approximate expression is given by: j het

(

V a

) =

A

B T

2 e

−| ∆ Ec | ) / ( kBT ) e eVa/ ( nkBT )

− 1

, (190) where A

= em

∗ k

2

B

/

(2

π

2 h

3

) is the so-called Richardson constant, B a slowly-varying function of the bias, depending on the nature of the junction,and n an ‘ideality’ index varying between 1 and 2. Note the similarity of this equation with the diode equation,Eq. (150).

Schottky contacts.

Schottky contacts are ideal junctions between semiconductors and metals. In theiry and in their ideal sonfiguration,they should be rectifying contacts. In practice,whenever we need to make ‘good contact’ to a semiconductor (meaning: we need a perfect ohmic contact,not rectifying),we resort to metals, typically Al. The nature of ohmic contacts and why systems which should behave like rectifying contacts in practice end up showing ohmic behavior is still relatively poorly understood. So,we start by discussing the ideal

ECE344 Fall 2009 128

rectifying Schottky contacts. But at some point we shall stop and discuss briefly how one can obtain ohmic behavior from these structures.

– Metal-semiconductor junction.

When we bring a metal and a semiconductor together,as shown in the figure in the next page,we have a situation not too dissimilar from what we have seen regarding heterojunctions: If the semicondutor (assumed to be n -type) Fermi level is larger than Fermi level in the metal (as shown in the figure),electrons will flow from the semiconductor untill a new equilibrium will be reached. This will result in the creation of a depletion region in the semiconductor side of the ‘contact’. Similarly to what we have sen in the case of heterojunctions, there will be an energy ‘barrier’ of height eφ

B metal Fermi level. Denoting by eφ

M between the bottom of the CB of the semiconductor and the the metal workfunction (that is,the energy required to excite an electron at the metal Fermi level to the level of the vacuum) and by eχ the electron affinity of the semiconductor,the

Schottky barrier height will be (looking at the figure): eφ

Bn

= e

(

φ

M

χ

)

, (191) where the subscript n reminds us that we have considered an n -type semiconductor.

For a p -type semiconductor,instead,we would have obtained eφ

Bp

=

E

G

− e

(

φ

M

χ

)

.

(192)

The thickness of the depletion region can be obtained as we did before for p n -junctions and we obtain

W

=

2 s

( eV bi

V a

) eN

D

1

/

2

, where the built-in potential V bi is (see the figure) eφ

B

− (

E c

E

F

)

.

(193)

ECE344 Fall 2009 129

METAL e

φ

B

SEMICONDUCTOR

V bi

= e(

φ

B

–E

C

+E

F

)

E

C

E

F

E

V

– Non-ideal junctions.

This is what we expect in an ideal case. In practice,it often happens that the Fermi level of the semiconductor is ‘pinned’ at some particular energy in the gap due to the presence of electron traps at the interface (interface states). Years ago J. Bardeen had suggested that electronic states associated to unterminated bonds present at the semiconductor interface may be an intrinsic cause of this ‘pinning’. Now it seems that things are more complicated: For example,bare surfaces may ‘reconstruct’ and,when exposed to metals,may ‘deconstruct’ in complicated ways,leading to amorphization,interdiffusion and clustering in the interfacial region. It is fair to say that we do not know exactly what pins the Fermi level,so that in many cases the Schottky barrier height should be regarded as an experimentally measured quantity.

– Thermionic and tunneling current.

The current flowing through the Schottky diode is due two major processes: The thermionic flow of electrons

ECE344 Fall 2009 130

over the barrier,and quantum-mechanical tunneling of electrons from the metal into the semiconductor. The thermionic component can be calculated in a way very similar to the one described dealing with heterojunctions.

The net result is: j

=

A

T

2 e

− eφB/ ( kBT ) e eVa/ ( kBT )

− 1

.

(194)

Note,once more,the similarity with the Shockley equation,Eq. (150),for the current in p n -junctions.

The second component of the current we must consider is of quantum-mechanical origin. It is the tunneling current illustrated in the figure above.

In the example illustrated in the figure,electrons in the metal can tunnel across the Schottky barrier and enter the semiconductor. Similarly,electrons can tunnel from the semiconductor into the metal.

Such a current can be calculated using the WKB approximation we have seen when dealing with Zener breakdown.

We can approximate the shape of the potential barrier by assuming a constant field in the

ECE344 Fall 2009 131

depletion layer,so that we must deal with a simple triangular barrier of the type:

φ

( z

) =

φ

B

F z z , (195) where F z may be chosen as the interfacial field,

2

φ

B the depletion region.

The quantity φ

B

φ

B

=

V bi

V a

=

φ

B

V a

E

C

+

E

F,S

/W ,or some suitable average of the field over is the total voltage drop in the semiconductor (see the figure),

. In this case we get:

P

M S

= exp −

4(2 m

S

)

1 / 2

3 e

¯ z

( eφ

B

E

)

3 / 2

, (196) and so the tunneling current will be proportional to this expression integrated over the electron energy distribution ρ

M

(

E

) f

M

(

E

) in the metal. Given the complexity of these calculation,one may wonder how ohmic contacts could ever be realized. One possible explanation consists in assuming that height of the

Schottky barrier, eφ

B

,may be zero. This may happen in a few cases. But more likely is the scenario in which heavy amorphization of the interface may result in a very heavily doped – almost metallic – thin layer of semiconductor. The very high doping will result in such a thin depletion layer,that tunneling across this barrier may be a dominant process,almost killing the resistance of the contact. This can be seen easily from

Eq. (196),noticing that the field F z is inversely proportional to the width of the depletion layer, W .

ECE344 Fall 2009 132

MOS capacitors.

The M etalO xideS emiconductor (MOS) – or M etalI nsulatorS emiconductor (MIS) – diode is arguably the most used and useful device in VLSI technlogy. Its ideal structure is shown in the figures below.

METAL INSULATOR SEMICONDUCTOR e χ e φ

M e φ

B

E

F,M eV

FB

< 0 e ψ

B

E

C

E i

E

F,S

E

V

E

F,M

METAL INSULATOR SEMICONDUCTOR

E

E i

C

E

F,S

E

V

FLAT BANDS ZERO BIAS

ECE344 Fall 2009 133

E

F,M

METAL INSULATOR SEMICONDUCTOR eV

G

< 0

METAL INSULATOR SEMICONDUCTOR

E

C

E i

E

F,S

E

V

E

C

E i

E

F,S

E

V

E

F,M eV

G

> 0

ACCUMULATION INVERSION

Starting from a semiconducting substrate (assumed to be p -type in the figures),an insulator is grown or deposited on the substrate. Typically,the natural oxide of Si,SiO 2 ,is thermally grown by heating the Si wafer to temperatures in the range 850-1000 o

C in oxygen-rich ambient. The relative simplicity of this process (which, however,must be extremely clean) and the unsurpassed electronic properties of SiO 2 are probably the reasons why Si has been the dominant material in microelectronics. After the growth or deposition of the insulator a metal (or highly-doped polycrystalline Si) is deposited over it. In the figures a metal is considered.

At ‘flat band’ the alignement of the bands is illustrated in the first figure. In the ideal case,charge would flow across the insulator,so that the Fermi levels in the metal, E

F,M

,and in the semiconductor, E

F,S

,would line-up and the difference, φ

M S

,between the metal and the semiconductor work-functions would vanish:

φ

M S

=

φ

M

χ

+

E

G

2 e

+

ψ

B

= 0 for p

− type semiconductor , (197)

ECE344 Fall 2009 134

and

φ

M S

=

φ

M

χ

+

E

G

2 e

ψ

B

= 0 for n

− type semiconductor .

(198)

In practice,the time required for the Fermi level to line-up is extremely long and this ideal situation is never achieved. The figure shows that the application of a small bias,the flat-band voltage V

F B

,is required to line-up the Fermi levels. Its value will be given by the nonvanishing φ

M S of Eq. (197) or (198) above.

The application of a negative bias, V

G

,to the metal (usually called the ‘gate’) drives the MOS diode into

‘accumulation’: As seen in the figure,the bias causes an accumulation of holes at the Si-SiO 2 interface. The application of a positive gate bias,instead,results in the ‘inversion’ of the semiconductor surface,electrons now piling up at the interface. Let’s now consider these processes in some detail.

– Interface space-charge region.

SiO

2

Semiconductor

E

C e

ψ s e

ψ e

φ

B

E i

E

F

E

V

The figure above shows in more detail the band-diagram near the semiconductor-SiO 2 interface. Let z be the

ECE344 Fall 2009 135

coordinate along the normal to the interace, z

= 0 be the location of the interftace,and let’s define by ψ

( z

) the potential,taken as zero in the bulk and measured from the intrinsic Fermi level E i

. Then,assuming the non-degenerate limit,the electron and hole concentrations will be: n p

( z

) = n p

0 exp eψ

( z

) k

B

T

= n p

0 p p

( z

) = p p

0 exp( −

βψ

)

, exp(

βψ

)

, (199)

(200) where ψ is positive downward (as in the figure), β

= e/

( k

B

T

)

,and n p

0 electron and hole concentrations in the bulk.

Let ψ s be the surface potential so that and p p

0 are the equilibrium n s

= n p

0 exp(

βψ s

)

, p s

= p p

0 exp( −

βψ s

)

(201) are the surface concentrations of the carriers.

We can deal with the ‘exact’ Poisson equation as follows,extracting some information before embracing the

‘usual’ depletion approximation. We have:

2

ψ

∂z

2

= − e s

[

N

+

D

+ p

( z

) −

N

A

− n

( z

)]

, (202) where s is the (static) dielectric constant of the semiconductor. From Eqns. (199) and (200) we have:

2

ψ

∂z

2 p

= p p

0 e

βψ so that,since by charge neutrality in the bulk N

+

D

N

A

= n p

0

− p p

0 ,we have

= p

− e s n p

[ p p

0

( e

− βψ

− n p

0

− 1) − n p

0 e

βψ

( e

βψ

,

− 1)]

.

(203)

(204)

ECE344 Fall 2009 136

Let’s now multiply Eq. (204) by

∂ψ/∂z and integrate Eq. (204) from an arbitray location z towards the bulk ( z

→ ∞

). The left-hand-side becomes:

− z

2

∂z

ψ

2

∂ψ

∂z dz

= −

1

2 z

∂z

∂ψ

∂z

2 dz

=

1

2

∂ψ

(

∂z z having used the fact that the field vanishes as z

→ ∞

. For the right-hand-side we get:

) e s z

[ p p 0

( e

− βψ − 1) − n p 0

( e

βψ − 1)]

∂ψ

∂z dz

= e s ψ

2

, (205)

0

[ p p 0

( e

− βψ − 1) − n p 0

( e

βψ − 1)] dψ

=

= e

[ p p

0

( e

βψ +

βψ

− 1) − n p

0

( e

βψ −

βψ

− 1)]

.

s

β

Therefore we have the following relationship between field and potential at any location z :

F

2

=

2 k

B

T p p

0

( e

βψ s

+

βψ

− 1) + n p p

0 p 0

( e

βψ −

βψ

− 1)

.

(206)

(207)

Introducing the Debye length, L

D

= [ s k

B

T /

( e

2 p p

0 non-degenerate bulk Si),and denoting as G

(

βψ, n p

0

)]

1

/

2

/p p

0

)

2 have:

F

=

∂ψ

∂z

= ±

2

1 / 2 k

B eL

D

T

(the dielectric screening length in the p -type the term in square brackets in Eq. (207),we

G βψ, p p 0

, (208) the plus (minus) sign valid for ψ >

0

( ψ <

0

).

n p 0

The charge at the interface can now be expressed using Gauss law and the value of the field at the interface

(obtained by setting ψ

=

ψ s in Eq. (208)):

Q s

= − s

F s

= ∓

2

1 / 2 s k

B

T eL

D

G βψ s

, n p

0 p p

0

.

(209)

ECE344 Fall 2009 137

This represents the total charge per unit area,shown in the figure below. For negative ψ s the charge is positive (holes),corresponding to accumulation. At flat band the total charge is obviously zero. In depletion and weak inversion the term βψ in the function G dominates,so that he charge grows as ψ in strong inversion the charge is negative,the term strong inversion begins at ψ s

= 2

ψ

B

( n p 0 /p p 0

) e

βψs

1

/

2 s

. Finally, being the dominant one. By definition,

,the value of the surface potential at which the electron concentration at the interface equals the hole concentration in the bulk.

10

15 p–type Si 300K

N

A

= 4x10

15

cm

–3

10

14 ~ exp( βψ s

/2) strong inversion

10

10

10

13

12

11

10

10

–0.4

~ exp(– βψ s

/2) accumulation flat band depletion weak inversion

~ ψ s

1/2

ψ

B

0.0

0.4

ψ

s

(Volt)

0.8

E

C

ECE344 Fall 2009 138

In order to obtain separately the electron and hole charges,

∆ n and

∆ p ,we must integrate p

( z

) and n

( z

) from the surface to the bulk:

∆ p

= p p

0

0

( e

βψ − 1) dz

=

2 ep p

0

1 / 2 k

L

D

B

T

0

ψs e

− βψ − 1

G

(

βψ, n p

0 /p p

0

) dψ , (210) and

∆ n

= n p 0

0

( e

βψ − 1) dz

=

2 ep p 0 L

D

1

/

2 k

B

T

0

ψs e

βψ − 1

G

(

βψ, n p

0 /p p

0

) dψ .

The differential capacitance of the semiconductor depletion layer is given by:

C

D

=

∂Q s

∂ψ s

= s

2 1 / 2

L

D

1 − e

− βψs + ( n p

0 /p p

0

)( e

βψs

G

(

βψ s

, n p

0 /p p

0

)

− 1)

.

At flat-band condition, ψ s

= 0

,so:

C

D,F B

= s

L

D

.

(211)

(212)

(213)

– Ideal capacitance-voltage characteristics.

It is very important to understand the capacitance-voltage characteristics of an MOS diode (or capacitor), in view of their relevance to the operation of an MOS field-effect transistor. Let’s recall that we are now interested in the ‘differential capacitance’. That is,we apply a dc (or slowly-varying) gate bias to the diode, but,in addition,we apply a small (of the order of k

B

T /e or less) ac bias at a given frequency.

If we apply a gate bias V

G to the gate (while keeping the semiconductor substrate grounded),part of the voltage, ψ s

,drops in the semiconductor and part, V ox

,in the insulator. The latter will be given obviously by:

V ox

=

F ox t ox

=

Q s t ox

, ox

(214)

ECE344 Fall 2009 139

having used the fact that s

F s

= ox

F ox

,and having denoted with t ox the thickness of the insulator. Thus, the ’oxide capacitance’ will be dQ s ox

C ox

= dV ox

= t ox

.

(215)

But the total capacitance will also depend on the charge induced by the voltage drop in the semiconductor,

Eq. (212). Therefore the total capacitance will be the series-capacitance of the insulator, C ox and of the depletion region, C

D

:

C tot

=

C ox

C

D

C ox

+

C

D

.

(216)

For a given insulator thickness,the oxide capacitance is thus the maximum capacitance.

C ox

C ox

C

FB low frequency high–frequency

GATE VOLTAGE

Looking at the figure above,in accumulation ( V

G

<

0

) holes pile-up very close to the semiconductor-

ECE344 Fall 2009 140

insulator interface. As the gate bias is reduced,the depletion capacitance begins to matter,depressing the total capacitance. To estimate its value,in the depletion approximation we can write the potential in the semiconductor as:

ψ

( z

) ≈

ψ s

1 − z

2

,

W where the depletion width W can be obtained in the usual way (see the first of the Eqns. (139) above):

(217)

W

2 s

ψ s eN

A

1 / 2

.

(218)

Thus,the depletion capacitance will be the result of charges responding to the ac-bias at the edge of the depletion region,so that

C

D

= s

W

, (219) and

C tot

= ox t ox

+ ( ox

/ s

)

W

.

(220)

At flat band we should replace W with L

D

,while the onset of strong inversion (also called the ‘turn-on voltage’ or,more commonly,the ‘threshold voltage’,as this marks the onset of strong conduction in MOS field-effect transistors),we have

W

=

W max

2 s

2

ψ

B eN

A

1 / 2

=

4 s k

B

T ln(

N

A

/n i

) eN

A

1 / 2

.

(221)

When the surface potential reaches the strong-inversion value, ψ s

= 2

ψ

B

,the electron concentration at the insulator-semiconductor interface is so large (provided enough time is given to the minority carriers so that an inversion layer is indeed formed,as we shall see below) that it will screen the field and it will prevent any further widening of the depletion region. Indeed,as we can see in the plot Q s vs.

ψ s at page 138,a small increment of surface potential will result in a huge increase of the electron charge. Thus,one can assume

ECE344 Fall 2009 141

that in strong inversion most of the additional V

G will drop in the insulator and no significant increase of

ψ s will occur. Therefore,Eq. (221) gives the maximum width of the depletion region. The only exception to this is given by the application of a very quickly-varying dc bias: If the gate bias V

G is increased very quickly to positive values,there will be little or no time for generation/recombination processes in the bulk to provide/absorb enough minority carriers (electrons) to feed the inversion layer. In this case ψ will exceed

2

ψ

B

, W will grow beyond W max and the capacitance will drop below its minimum value C min given below by E. (222).

As the gate bias becomes even more positive,we must distinguish two different situations. If the applied bias is varied slowly and the applied ac bias is of low frequency,generation and recombination processes in the bulk may be able to follow the ac signal. Thus,electrons in the inversion layer will respond,the response of the depletion layer will be screened by the ac-varying inversion charge and the differential capacitance will rise back to the value given by C ox

. If,on the contrary,the frequency of the ac signal is large,than the inversion charge will not be able to follow the signal. The depletion capacitance will be ‘clamped’ at the minimum value s

/W max

,and so the total capacitance will remain at the minimum value

C min

= ox t ox

+ ( ox

/ s

)

W max

, (222) independent of gate bias.

Experimentally the transition between the low-frequency and the high-frequency behavior happens around

1-50 Hz. However,MOS diodes built on substrates of excellent quality (small density of SRH centers) may exhibit the low-frequency behavior only when there is no applied ac signal and the dc gate bias is varied sufficiently slowly (even a fast varying dc V

G its high-frequency response).

– say,a C-V sweep in a few seconds,may push the diode into

– Deviations from ideality: Oxide charges and interface traps.

So far we have considered an ideal MOS structure in which both the insulator and the interfaces are free from defects and impurities. This was not the case early on when MOS devices were first fabricated. Even today, after decades of research and development has enabled the realization of almost-ideal structures,during the operation of a device defects may be created by energetic carriers ‘hitting’ the interface or being injected into

ECE344 Fall 2009 142

the insulator. These defects may be broadly classified into two categories: Fixed charges in the oxide and electrically-active interface states. (The word ‘fixed’ labelling the charges in the oxide refers to the fact that their charge-state – or electronic population – does not depend on the applied bias,while their location – as in the case of mobile Na or K ions – may depend on the bias and thermal history of the device.)

Insulator charges are typicaly either impurities (historically mobile Na and K ions were the subject of many efforts),or defects,such as dangling bonds,local stress in the SiO 2 ionic network,oxygen vacancies induced by growth,processing – such as irradiation. Such charges have the main effect of shifting the threshold voltage

V

T

=

V ox,si

+ 2

ψ

B

=

Q s

(2

ψ

B

)

C ox

+ 2

ψ

B

, (223) or the flat-band voltage.

In order to derive a general expression for the flat-band voltage shift due to an arbitrary distribution of charges ρ

( z

) inside the insulator (where z now denotes the distance from the gate-insulator interface) let’s consider first an ideal (free of charge) MOS capacitor originally at flat-band condition and now add a sheet of charge λ (charge per unit area) at z . This charge will induce polarization

(image) charges both in the metal and in the semiconductor. The latter charge will bend the bands and so modify the gate bias we must apply to recover flat-band. Let’s now apply an additional bias to the metal,so to bring the semiconductor at flat band. In this situation there will be no field in the metal (by definition), no field in the semiconductor (as we are at flat band). There will only be a constant electric field λ/ ox for

− t ox

< z <

0

. Thus,the metal potential will have moved by an amount

( t ox

+ z

)

λ/ ox with respect to the initial situation. This will be the shift of the flat-band voltage caused by the sheet of charge. Therefore, for a distribution ρ

( z

) of charges inside the insulator,the flat-band shift will be given by:

V

F B

=

0 tox

( t ox

+ z

)

ρ

( z

) ox dz

=

1

C ox tox

1 + z t ox

ρ

( z

) dz .

(224)

0

Note that charges close to the gate-insulator interface, z

= − t ox

,have no effect on V

F B

(the polarization charges at the metal surface screen completely the oxide charges),while charges near the semiconductorinsulator interface have maximum effect.

ECE344 Fall 2009 143

Interface traps (or states) are defects – typically Si dangling bonds – whose occupation depends on the position of the Fermi level at the insulator-semiconductor interface. They have a twofold effect: Depending on their occupation,they shift the flat-band voltage,as in Eq. (224). Since for these states z

= t ox

,their electrostatic effect is strong. More importantly,becaue of the intrinsic delay in responding to an ac signal (the time constants for emission and capture are those of SRH centers),they store charge,thus contributing to the total capacitance of the MOS diode. Their capacitance, C it

,is in series with C ox and in parallel to C

D

,so that

C tot

=

C

1 ox

+

C

D

1

+

C it

− 1

=

C ox

(

C

D

+

C ox

+

C

D

C

+ it

C

) it

.

(225)

Several methods have been devised to measure the density, D it

,of the interface traps. They all rely on a measurement of their capacitance. Ideally,if one knew very accurately the theoretical C-V characteristics of the diode,a comparison of the theoretically computed and experimentally measured characteristics will yield the desired capacitance, C it

,and so the density D it

,since the density of the interface-trap charge at energy

E in the gap (the position of the Fermi level in the gap at a surface potential ψ s

) will be

C it

(

ψ s

)

: Having obtained C it from the total capacitance via Eq. (225),at a given gate bias we have:

C it

= dQ it dψ s

= e dN it dE

= e D it

, (226) where N it dQ

=

C is the total number of traps up to energy E in the gap and D it area and energy in the gap. Recalling that V ox dV ox

=

C tot dV

G

G

,we have

=

V ox dV

G

= dψ

+ s

ψ s

,we have dV

+ (

C tot is the trap density per unit

G

/C ox

) dV

G

= dψ s

+ dV ox

. Since

,and so we can obtain dψ s

/dV

G from the relation dψ s dV

G

= 1 −

C

C tot ox

Thus,from Eqns. (220),(226),and (227) we can extract dQ it

.

/dψ s

:

(227)

− 1

D it

(

E

) = dQ it dψ s

=

C tot e dψ s dV

G

C d e

.

(228)

ECE344 Fall 2009 144

This is the density of interface traps per unit energy in the gap at the energy E which,as we said above, indicates the position of the Fermi level inside the semiconductor gap at the interface.

In practice,detailed theoretical curves C

V are hard to compute. Therefore,typically one replaces the theoretical curve with a C-V curve obtained under conditions such that the interface traps do not respond.

Since the characteristic time of the response of the trap is of the order of

τ

=

1 v th

σn i exp − e

(

ψ

B k

B

ψ s

)

T

, (229)

(for a p -type substrate),either a low-temperature measurement (so that at a given ac frequency ω the response time τ becomes so long that the trap occupation does not vary) or a high-frequency measurement will provide almost ideal C-V characteristics. A comparison between high-frequency and low-frequency measurements (or high-T and low-T measurements) will provide C it

.

There are two major corrections we should make to the analysis followed so far: We have used the non-degenerate limit (using Maxwell-Boltzmann instead of Fermi-Dirac statistics in relating carrier density to (quasi)Fermi levels) and we have ignored completely all quantum mechanical properties of the electrons.

The first correction – important at large densities such as strong inversion and accumulation – complicates the mathematical analysis so that it becomes impossible to derive analytically even the relations field/potential or surface-field/total-charge given by Eqns. (208) and (209). Only numerical work can give us reliable answers.

Yet,the analysis followed so far is qualitatively correct and gives a quantitatively correct picture in the important region covering weak-accumulation to weak inversion.

Quantum mechanical properties are usualy important in transport. So far,we have limited our attention to electrostatics. Yet,even the electrostatic poperties can be affected by quantum mechanics when the charge carriers are confined within regions of size comparable to (or,a fortiori,smaller than) the thermal wavelength of the electrons. Accumulation and inversion layers are such reasons and they do present this problem. Indeed, the wavelength of an electron at equilibrium (called its ‘thermal wavelength’) is given by the de Broglie relation

λ th

= h/p th

= 2

π/k th

,where p th th is the average momentum of electrons at thermal equilibrium.

For the average carrier energy at thermal equilibrium we have E th

= (3

/

2) k

B

T

= ¯

2 k

2 th

/

(2 m

)

,so that,

ECE344 Fall 2009 145

at 300K,

λ th

=

2

π

¯

(3 m

∗ k

B

T

) 1

/

2

≈ 6

.

2 m m

0

1

/

2 nm (230)

Consider the Si-SiO field F s

= en s

2 interface in inversion/strong-inversion. The electron density unit area,see the figure at page 138) is of the order of

10

/ s of the order of

10

4

-to-

10

6

11

-to-

10

13 cm

− 2 n s

(the ‘sheet density’ per

,corresponding to an interfacial

V/cm. Thus,an electron of thermal energy (

(3 meV) will be ‘squeezed’ by the field against the interface over a confining distance

∆ z

≈ 3 k

B

/

2) k

B

T /

(2

F

T

≈ 40 s

)

,very much like a particle in a box considered at the beginning of the course. This distance is of the order of 40-to-0.4

nm,comparable or even smaller than the electron thermal wavelength.

We are not allowed to ignore the wave-like nature of electrons when we confine them so tightly: We expect that discrete energy levels will emerge from the confinement. If we confine a particle in a region of width

∆ z ,by Heisenberg’s principle the particle momentum will suffer an uncertainty

∆ k

∼ 1

/

∆ z ,so that the confined particle will have a minimum energy

E 0

∼ ¯

2

∆ k

2

/

(2 m

) ∼ ¯

2

/

(2∆ z

2 m

)

,called the ‘zero-point energy‘. In strong inversion this energy may be comparable to (or even larger than) the thermal energy,and quantum effects due to the confinement should not be ignored. The major changes to the classical picture that these quantum-mechanical correction provides are:

1. The electron charge in inversion layeres is removed somewhat (typically by a length

∆ t of the order of 1.0

nm) from the interface. This causes a reduction of the gate capacitance in accumulation, C ox

,since the

‘effective’ thinckness of the oxide is increased by the amount ox

/

Si

∆ t .

2. The threshold voltage shifts to higher values,since we must move the Fermi level in the inversion layer to an energy higher by an amount

E 0 (the ‘zero-point’ energy mentioned above.

3. The properties of electron transport (and so,in particular,the electron mobility) are modified,since both the

‘shape’ of the wavefunctions and the density of states are modified.

Detailed calculations of electron transport in these ‘subbands’ (as they are called) is beyond the scope of this course. We simply show in the figure below a typical example of energy levels,wavefunctions,and charge distribution in a Si inversion layer.

ECE344 Fall 2009 146

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

–0.1

0 20 40 z (nm)

60 80

0.60

0.50

0.40

0.30

0.20

0.10

–0.00

–0.10

–0.20

0 5 z (nm)

10 15

1.5

1.2

0.9

0.6

0.3

quantum classical

0.0

0 1 2 3 4 5 6 z (nm)

A final phenomenon we must mention is the possibility of quantum-mechanical tunneling of electrons in the inversion layer across the gate insulator. This becomes important for thin oxides and/or at very large fields. The first situation (illustrated by the left frame of the figure below) is called ‘direct tunneling’,the second situation

‘Fowler-Nordheim tunneling’. Using the usual WKB approximation,the tunneling probabilities in the two cases are: For direct tunneling:

P d

≈ exp −

4(2 em ox

)

1

/

2

3¯ ox

φ

3 / 2

B

[1 − (1 − t ox

F ox

B

)]

3 / 2

∼ exp −

2(2 m ox eφ

B

)

1 / 2 t ox

= e

− 2

κ tox

, (231) where F ox is the field in the insulator, m ox the effective mass in the gap of the insulator, φ

B

=

φ

B

E 0 is the effective barrier height,reduced by the energy E 0 of the bottom subband in the inversion layer, insulator thickness,the last step has been made assuming a thin insulator ( t ox

<< φ

B

/F ox t ox is the

),and we have

ECE344 Fall 2009 147

defined an ‘average’ decay constant κ

= (2 m ox eφ

B

)

1 / 2

/

¯

. For FN-tunneling,instead:

P

F N

≈ exp −

4(2 em ox

)

1

/

2

3¯ ox

φ

3

/

2

B

= = e

− (4 / 3) κ zt

, (232) where z t

=

φ

B

/F ox is the tunneling distance across the triangular barrier. As device scaling progresses,thinner and thinner insulators are used,together with a reduced applied bias. When insulators were 10 nm thick and the applied bias was of the order of 5 V,FN tunneling was the only concern. This possibly caused only minor

‘leakage’ when the devices were turned-on very strongly,so only during the ‘on’ state. Today,instead,insulators are as thin as 2 nm (or even less). Even if the applied bias has been reduced to less than 1 V,from Eq. (231) it is clear that direct tunneling is becoming increasingly important. The major cause of concern is its independence of bias: Electrons can tunnel across the ‘trapezoidal’ (or almost ‘rectangular’ barrier) under any bias condition.

This leakage in the ‘off-state’ causes unwanted power dissipation and it constitutes one of the problems (if not

‘the’ problem) we must face attempting to scale devices to even smaller dimensions.

ECE344 Fall 2009 148

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

–0.5

–1.0

–20 0 e φ

B

– E

0 direct tunneling

20 z (nm)

40 60 80

3.5

3.0

2.5

2.0

1.5

1.0

0.5

e φ

B

– E

0

0.0

–0.5

Fowler–Nordheim tunneling

–1.0

–80 –60 –40 –20 0 20 40 60 80 z (nm)

ECE344 Fall 2009 149

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