Electronic Implementation of Oscillators for Visual Algorithms Jordi Cosp, Jordi Madrenas Department of Electronics Engineering, Universitat Politecnica de Catalunya, Spain e-mail: jcosp@eel.upc.es Abstract In this paper we present an electronic oscillator model that can be used to implement VLSI oscillatory networks for image segmentation. Oscillators can be easily coupled to their nearest neighbours in a network. Although coupling being local, we demonstrate that synchonization is global to all the network. 1 Introduction Image segmentation is a key stage in image processing systems. Most efforts on this topic have focused on implementing complex algorithms on standard digital computers that require large electric power and area compared to dedicated analog VLSI systems as neuromorphic implementations (Mead, 1975). Portable applications are benefited of these characteristics. However, few efforts have been done to implement segmentation algorithms on analog microelectronics (Cosp and Madrenas, 2003) (Ando et al., 2001) (Andreou and T.G.Edwards, 1994). A key element of some of these algorithms is oscillators. However, oscillators used in the most common algorithms are oriented to a computer implementation and they are difficult to implement using a VLSI technique. In this paper we show an oscillator model that can be easily implemented using analog electronics, it power consumption is low and it keeps synchronization properties to segment images when implemented in a segmentation network (Wang and Terman, 1997) 2 Oscillator model Non-linear electronic oscillators can be easily implemented by looping an hysteresis comparator and an integrator. Both blocks consist of two or more current sources that charge and discharge a capacitor. Thus, capacitor voltage is given by the well known voltage-current relation: (1) where is the capacitor voltage, the charge current, the discharge current and the capacitance. The hysteresis comparator consists of a subtraction of an input current to a variable refence current that is responsible of the hysteresis. Then, the result is integrated to the output node parasitic capacitance. As this output voltage is limited by the power source and integration is relatively fast, the output node swings from ground to power supply. When the output is high, the reference current (charge current) becomes high 1 and the input current (discharge current) has to increase to lower the output voltage. On the other hand, when the output is low, the reference current becomes low and the input current has to decrease to increase the output voltage. The integrator consists of a low and constant discharge current and a variable charge current. These currents are integrated to a large capacitor, thus integrator time constant is larger than comparator time constant. When comparator output is lower than a certain integrator threshold ( ), charge current is null and the capacitor is discharged. When comparator output is higher than , charge current is positive and larger than discharge current, thus the integrator is charged. Finally, integrator voltage is converted to current by a non-linear element (a MOS transistor) for Fast Threshold Modulation (Somers and Kopell, 1993) when coupled to other oscillators. The output current of the non-linear element is the input current to the comparator. This oscillator can be easily coupled to other oscillators by adding current sources to the hysteresis comparator. A charge current that is not null when the coupling oscillator output is high, synchronizes both oscillators. On the other hand, if a discharge current is used, it desynchronizes oscillators and Selective Gating is obtained (Wang and Terman, 1997) to segment images. 3 Simulations The cell presented above has been simulated using adimensional parameters and results are shown in Figure 1. Hysteresis comparator output – variable– shifts from 0 to 1 and the integrator output – variable– moves from a hysteresis comparator high-threshold to a low-threshold. Notice that these thresholds do not limit integrator range. When these thresholds are reached, comparator reference currents change but the output of the comparator has to reach to change slow integrator charging current, thus, integrator voltage output. 4 Experimental results A network of 256 coupled oscillators have been implemented using a comercial CMOS technology and experimentally tested (Cosp and Madrenas, 2003). In this section we show some experimental results that demonstrate the oscillator capability to synchronize with other coupled oscillators. In figure 2 we show the synchronization of two coupled oscillators as seen in the oscilloscope. Oscillators start in a desynchronous state, then, coupling is established at time . In less than one oscillation cycle both oscillators reach synchrony and it is maintained. Experiments show that chains of locally coupled oscillators also synchronize. Global synchronization can be achieved with local couplings. Each oscillator is coupled to its two nearest neighbours in the chain. Directly coupled oscillators synchronize and this synchrony spreads throughout the chain, synchronizing all oscillators. This behaviour has been experimentally tested with an logic analyzer and its result is depicted in 3. First, two chains coupled oscillators oscillate synchronously. Then, at time indicated 2 (a) (b) Figure 1: (a) Temporal evolution of oscillator. variable is the output of the hysteresis comparator and variable is the slow integrator voltage. Thresholds of the hysteresis comparator are depicted with dashed lines. (b) Oscillator orbit. Comparator thresholds are depicted with vertical dashed lines. Integrator charging current is null when comparator output is lower that the horizontal dashed line. Figure 2: Synchronization of two coupled oscillators. Coupling is established at T and synchronization is reached in one cycle. by a vertical dashed line, a positive coupling is established between the two extreme oscillators of each chain. After a brief transient of one oscillation cycle, synchroniy is achieved. 3 Figure 3: Synchronization of a chain of coupled oacillators. First, two independent chains are synchronous. Then coupling is established between an oscillator of each small chain making up a larger synchronous chain. 5 Conclusions In this paper we have introduced simple microelectronic oscillators with synchronization properties that can be used in oscillatory image segmentation systems. Synchronization is demonstrated above with experimental results. Simulations and experimental results presented in (Cosp and Madrenas, 2003) show that these oscillator have low power requirements while maintaining their segmentation capabilities. This network is focused to embbed a segmentation layer in a focal-plane parallel vision system that incorporates optical sensors, a pre-processing stage to filter noise and extract visual characteristics, a segmentation stage and a post-processing stages that analyzes results and outputs data from the oscillation coded information. References Ando, H., Morie, T., Nagata, M., and Iwata, A. (2001). A nonlinear oscillator network for graylevel image segmentation and PWM/PPM circuits for its VLSI implementation. IEICE Trans. Fundamentals, E83-A(2):329–336. Andreou, A. and T.G.Edwards (1994). Analog VLSI neuromorphic processing: Case study of a multiple target tracking system. In Proceedings of the IEEE Int. Conf. on Neural Networks, pages 1903–1906. Cosp, J. and Madrenas, J. (2003). Scene segmenation using neuromorphic oscilatory networks. IEEE Transactions on Neural Networks, 14(5):1278–1296. Mead, C. (1975). Analog VLSI and Neural Systems. Addison-Wesley, Reading, MA. Somers, D. and Kopell, N. (1993). Rapid synchronization through fast threshold modulation. Biological Cibernetics, 68:249–254. Wang, D. L. and Terman, D. (1997). Image segmentation based on oscillatory correlation. Neural Computation, 9:805–836. 4