A 120 Watt GaN Power Amplifier MMIC Utilizing Harmonic Tuning
Circuits For S-band Applications
Andrew Alexander, Jonathan Leckey
M/A-COM Technology Solutions, Belfast, N.Ireland
jonathan.leckey@macom.com
Abstract — The design of a 120 Watt S-band GaN power
amplifier MMIC is presented. The amplifier was designed using
the 0.25um GaN on SiC process from GCS. At Vds= 40V, this
two stage amplifier achieved greater than 135W saturated output
power, with higher than 47% power added efficiency and with
22dB gain in the 2.8 – 3.5 GHz band. Additionally mid band
output power of 195W was achieved at Vds=50V. This result is
the highest power ever reported for a two stage GaN MMIC. The
use of input and output harmonic terminations for broadband
efficiency enhancement was demonstrated.
Index Terms — GaN HEMT, MMIC, Power Amplifier.
I. INTRODUCTION
S-Band power amplifier MMICs are important components
in many commercial and military radar systems, for many of
these systems high power and efficiency are critical
parameters. GaN on SiC technology offers an order of
magnitude improvement in power density compared to the
previous generation of GaAs MMICs. [1-5] The aim of this
design was to demonstrate the suitability of the GCS 0.25um
GaN SiC process for power amplifier MMICs. The design
goals for the MMIC were for operation from 2.7-3.5GHz,
greater than 120W saturated output power, greater than 50%
PAE and small signal gain of 25dB for a pulse of 20us
duration and 10% duty cycle.
channel phase synchronized VNA and multiplexer based
active load pull system that enabled control of three separate
source or load impedances. The unit cell contained a second
(2f0) harmonic resonance circuit on the input consisting of a
MIM capacitor and a spiral inductor to ground as shown in Fig
1. Under CW load pull of both the output fundamental and
second harmonic load such that the best compromise in
performance between power and efficiency was obtained,
power density of 6.66W/mm and an associated PAE of 77%
were demonstrated at 40V and 20mA/mm quiescent drain bias
as shown in Fig.2 and Fig.3. It was shown that the inclusion of
the input harmonic tuning circuit enabled high efficiency to be
achieved for a much larger range of output 2nd harmonic load
impedances.
Additional characterization and modeling of the active unit
cell was carried out by initially S-parameters, pulsed IV
characteristics and by fundamental load pull to 10GHz. The
measurements were supplemented by a preliminary CAD
model based on the Parker-Skellern large signal model. The
model supported the observation that the second harmonic
impedances in particular at both input and output were critical
in obtaining the required efficiency performance. Resistive
loading at the HEMT input was employed to help maintain
over unity stability factors over the full frequency range.
II. PROCESS DESCRIPTION AND MODELING
The GCS 0.25um GaN on SiC process (on four inch wafer
diameter) uses an optically defined 0.25um gate length with
integrated gate and source connected field plated to support
high breakdown voltages and offer high gain, power density
and efficiency for S-Band applications. The key features of the
process are Imax of 1000mA/mm peak Gm of 250mS/mm and
a pinch of voltage of – 3.5V. The process has back side vias, a
high voltage MIM capacitor option and the SiC substrate is
thinned to 3mil thickness. Slot vias of size 30um by 60um
were employed in order to provide an efficient utilization of
die area over circular vias and to allow the option of an inter
finger via. A plated thick metal option of 5um was also
available to accommodate the relatively high static current
densities associated with GaN HEMT devices.
Active harmonic load pull at a fundamental frequency of
3.5GHz was performed on a 6x250um unit cell, using a four
Fig. 1 6x250um unit cell with integrated input harmonic termination.
978-1-4799-8275-2/15/$31.00 ©2015 IEEE
Fig. 4 Photograph of the S-band MMIC
C, chip size is 6 x 5.1mm.
Fig. 2 Drain efficiency variation with 2f0 load, m
measured by active
load pull on a 6x250um unit cell at 40V.
III. DESIGN
A single ended two stage class AB ampliffier topology was
selected. Based on the load pull data, a 24m
mm output stage
consisting of 16, 6x250um cells was chosenn, given gain and
efficiency considerations a 4:1 drive ratio waas used resulting
in an 8mm driver stage. Given the critical roole of the output
matching network for circuit performance a topology was
chosen which yielded both accurate control off the fundamental
and second harmonic load impedance ovver the required
bandwidth, while minimizing output matchingg network losses.
The various matching networks were syynthesized using
Microwave office and finalized with exxtensive use of
electromagnetic simulation. This yielded a M
MMIC with final
dimensions of 6x5.1mm as shown in Fig4.
Fig. 3 Measured power and efficiency of 6x250
0um unit cell with
optimally tuned fundamental and 2nd harmonic loadd impedances.
Fig 5: CW S-parameter measurementss show a small signal gain of
~22dB, with input return loss of 12dB.
Fig. 6 Gain versus output power by
y frequency, with Vds=40V
showing output power of over 110W is achieved across the band, and
a peak power of 160W.
978-1-4799-8275-2/15/$31.00 ©2015 IEEE
IV. Results and Conclusion
S-parameters are shown in Fig.5 showing a typical small
signal gain of 22dB, with input return loss of 12dB.
Measured power and PAE performance in pulse mode
(200uS/10%) is shown in figs. 6 and 7. At Vds=40V, this two
stage amplifier achieved greater than 135W saturated output
power, with higher than 47% power added efficiency with
22dB gain in the 2.8 – 3.5 GHz band. Additionally mid band
output power of 160W was achieved. As shown in fig 8, with
Vds=50V, peak output power achieved at 3GHz was 53dBm
or 195W. This is the highest power reported to date for a two
stage GaN MMIC.
Efficacy of harmonic terminations to provide broadband
efficiency enhancement has also been demonstrated. In
particular second harmonic impedances at both the transistor
input and output terminals, as derived from the unit cell active
load pull characterization, enabled the fabricated MMIC
amplifier to maintain excellent levels of power and efficiency
across the 2.7-3.5GHz band.
ACKNOWLEDGEMENT
The authors would like to thank the staff at MACOM,
Belfast for skilled assistance in assembly and measurement of
the realized amplifier, and the staff at GCS for valuable
discussion and support in wafer fabrication.
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978-1-4799-8275-2/15/$31.00 ©2015 IEEE