The analysis and Compensation of dead-time effects in
three phase PWM inverters
Lazhar BEN-BRAHIM
Faculty of Technology
University Of Qatar
PO Box 2713, Doha, Qatar
email: brahim@qu.edu.qa
Abstract
The switching lag-time, which
prevents the phase shortage of inverter arms,
causes serious distortions of the output voltage
of the inverter. This effect is well known as
dead-time eflect. Several compensation methods were proposed to improve the output waveforms. These proposed approaches did improve
the inverter’s output voltage waveforms. The
improved waveforms however still suffer from
the zero-crossing phenomenon. A new approach
to overcome the zero current clamping in Voltagef e d PWM inverters is proposed. This paper describes the analysis of dead-time effect in three
phases P W M inverters and the proposed scheme.
The conventional compensation methods as well
as the zero crossing problem are highlighted. Theoretical analysis and digital simulation were carried out to verify the analysis and the proposed
scheme for dead time compensation.
1
Introduction
PWM Inverters are very well used in AC motor
drives and UPS. In inverters, time delay must be
inserted in switching signals to prevent a short
circuit in the dc link. Although, this time delay guarantees safe operation of the inverter, it
causes a serious distortion in the output voltages. It results in a momentary loss of control,
and the output voltage deviates from the reference voltage. Since this is repeated for every switching operation , its effect may become
significant. This is known as the dead-time effect. This effect is still apparent even with the
recently developed fast switching devices such
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as MOSFET, IGBT and others. Therefore, the
understanding of the dead-time effect is crucial to the improvement of the performance of
PWM inverters. Furthermore, in some applications such as sensor-less vector control and
direct vector control, the inverter output voltages are needed to calculate the rotor flux angle. Unfortunately, it is very difficult to measure
the output voltages and requires an additional
hardware. The most desirable method to obtain the output voltage is to use the reference
voltage instead. However, the relation between
the output voltage and the reference voltage is
nonlinear due to the dead-time effect [l].Thus
unless the dead-time is properly compensated,
the reference voltage can not be used instead
of the output voltage. Many approaches were
proposed to overcome the effect of dead time
[2],[3],[4],[5].
These approaches do not treat the
zero current clamping problem. It is worth to
note that the zero current crossing phenomenon
is still not fully understood and not well resolved. This zero crossing distortion is caused
by the current ripples and the inadequate conventional compensation of the dead-time effect.
This paper presents a detailed analysis and
method of compensations of the dead-time and
the zero crossing phenomenon. It proposes a
new method to overcome the zero current crossing effect. It is shown that the dead-time effect
and the zero crossing compensation depend not
only on the switching frequency but also on the
load power factor and the load current. Simulations are carried out using a simplified model
of IM drive system.
Dead-time effect & Compensa- put through diode D1. As a result, the output
voltage is distorted as illustrated in Fig. 1. The
t ion
2
Effect
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direction of the load current flow, during the delay time, determines the output voltage rather
than the control signals. The voltage deviation due to the time delay opposes the current
flow in either direction. As a result, the deviation reduces the current magnitude, regardless
of the current polarity. However, if the current
is around zero, the current may decrease to zero
during the deadtime (Td). Whenever the current reaches zero during the deadtime and stays
at zero level during the rest of the deadtime. If
this occurs, there is no means of controlling the
output voltage. As will be shown later, this
phenomena zero crossing is difficult to avoid by
the conventional techniques of compensation.
J
Relation between voltage sign and output voltage
Figure 1: Deadtime effect in PWM inverters
A
-
3
Fig. 1 shows the leg of one phase of the
PWM inverter, where power transistors are used
as switching devices. To turn off transistor X,
U should be off and if the turn on speed is faster
than the turn of€ speed, a dc link short-circuit
will occur, therefore a delay time or dead-time
(generally with IGBTs a delay in the order of
20ps is inserted for safety). This dead-time is
inserted by delaying the on signal of the transistors by the delay time Td. During this delay
time, both transistors cease to conduct, and the
output terminal seems to be floating. However,
due to the inductive load, the output current i is
continuous, the current then flows through the
freewheeling diodes D2 when the current is positive and the negative dc voltage is connected to
the output. If the current is negative, flowing
toward the inverter, The positive voltage is out-
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I998 IEEE
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phase
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Figure 2: Deadtime effect
The deviation voltage caused by the deadtime is shown in Fig. 1. It is, as illustrated in
the Figure, a number of pulses with a constant
amplitude equal to the dc link voltage Vd, a
constant pulse width equal to the delay time
Td and a polarity opposed to the polarity of
the load current and a frequency equal to the
switching frequency of the inverter. Although
this dead-time is very short, its accumulated error causes considerable distortions in the output
waveforms (see Fig. 2)
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quency of the inverter.
pressed by the relation
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where fc is the carrier or switching frequency
and f is the operating frequency of the inverter.
The average deviation voltage height AV, caused
by the cumulative of the deadtime pulses, is
given by
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Therefore, np is ex-
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Figure 3: Deadtime Compensation
2.2
Compensation
To analyse the distortion caused by the deadtime, we assume the followings:
1. The turn-off time of the switching device
is neglected.
2. The switching frequency is bigger than the
fundament a1 frequency.
3. Current ripples are neglected
Under the above assumptions, the dead-time
effect can be analysed quantitatively. These assumptions will facilitate the understanding of
the compensation techniques.
-
INVERTER
AC/DC
canverte
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Figure 4: Conventional compensation method
The number of pulses, np,per period caused
by the dead-time depends on the switching fre-
0-7803-4503-7/98/$10.00
1998 IEEE
Eq. 2 shows that the deviation increases with
the increase of the switching frequency fc. Although Eq. 2 shows that the dead-time distortion is independent of the inverter output
frequency and voltage, it is worth to note that
this distortion becomes significant at low speed
when the inverter frequency f is low and the
fundamental output voltage is also low. This
average deviation AV which is added to the
reference voltage to calculate the new reference
voltage applied to the inverter (see Fig. 3):
v: = v* + A V
(3)
This equation is used to derive the conventional
compensation method shown in Fig. 4. This
approach is widely used in industrial PWM inverters to compensate for the dead-time effect.
It is based on Eq. (3) and Fig. 3. For simplicity, this concept uses the current reference to
compensate for the dead-time effect. The compensation signals in uvw-axis as well as dq-axis
are shown in Fig. 5 . These signals were modified so that the inserted deadtime compensation voltages will keep the three phase output
voltages of the PWM inverter balanced. Note
that d-current and the q-current compensation
signals are different. The current reference polarity is used instead of the actual current polarity. This technique of compensation is valid
under the assumption 3. However, in most practical case and especially for high power drive
systems, the current has significant ripples and
this will affect the compensation around the
794
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zero-crossing zone of the current. The presence of significant ripples around zero-zone will
lead to several zero-crossing of the actual current and with each zero-clamping the current
polarity changes. This makes the conventional
compensation method umproper as it is using
the reference current polarity to cancel the effect of the dead-time. The conventional compensation described so far performs well when
current ripples axe very small.
Im ............ j.....
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dead-time compensation. The bandwidth of this
smooth curve is defined as a function of current
ripples. If PWM inverter current ripples are
large, then the "hysteresis" is large. The curve
inside is selected by cut and try error. This
method has improved the current distortion at
the zero current clamping area in the voltagefed PWM inverter.
........................
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Figure 6: Proposed method of compensation
4
Simulations
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Figure 5: Conventional compensation signals
3
Proposed method for dead-time
& zero crossing effect compensat ion
The proposed method is shown in 6. This Figure shows that the dead-time compensation is
similar to the conventional method except for
the zero-crossing;. Close to the zero-zone we
use a kind of "sniooth hysteresis" curve for the
0-7803-4503-7/98/$10.00
1998 IEEE
795
Simulations were carried out to verify the
proposed method. 7 shows the scheme used
for simulation, where the IM is modeled as an
R-L networks and a back-emf. Fig. 8 shows
the simulation model results without dead-time
compensation. It is worth to note here the similarity between the distorted (Id and I4)current
waveforms in Fig. 8 and Fig. 5. Fig. 9 depicted the current waveforms using the conventional compensation method. In this Figure the
zero-crossing phenomenon is apparent. Fig. 10
shows the proposed method for compensation
of both the dead-time and the zero-crossing effects. This shows that the proposed method
tion Motor Drive system”, IECON’98 (to
be published), August 1998.
improves the current waveforms by eliminating
the effect caused by the dead-time. The current
harmonics are greatly reduced as illustrated in
Figure Fig. 11.
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[a] Y.
Murai, T. Watanabe and H. Iwasaki
”Waveform distortion and correction circuit for PWM inverters with switching lagtimes”, IEEE, Trans. on Industy Applications, vol. 23, No. 5 pp. 881-886, September/October 1987.
[3] T. Sukegawa et all. ”Fully digital vector
controlled PWM VSI-FED AC drives with
an inverter dead-time compensation strategy”, IEEE, IAS’88 Annual Meeting pp.
463-469, 1988.
[4] S.G. Joeong and M.H. Park, ”The analysis and compensation of dead-time effects
in PWM inverters”, IEEE, Trans. on Ind.
Electron., vol. 38, No. 2 pp. 108-114, 1991.
[5] J.W. Choi and S.K. Sul ”Inverter output voltage synthesis using novel dead-time
compensation”, IEEE, Trans. on Power
Electronics, vol. 11, No. 2 pp. 221-227,
March 1996.
0.1
Figure 8: No compensation simulation
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Conclusions
The PWM inverters dead time analysis and effect were analysed. Conventional compensation
methods as well as the zero crossing phenomena
were highlighted. A proposed method for deadtime and zero current clamping compensation
was described in this paper. The elimination of
the zero current clamping effect in a voltage-fed
PWM inverter was achieved. Theoretical analysis and digital simulation were carried out to
verify the analysis and the proposed scheme for
dead time compensation. The simulation has
shown that the current waveforms ‘output by
the inverters were greatly improved.
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References
[l]L. Ben-Brahim and S. Tadakuma, ” Practical Considerations for Sensorless Induc-
0-7803-4503-7/98/$10.00
1998 IEEE
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Figure 11: FFT analysis of current waveforms with
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0-7803-4503-7/98,'$10.00
1998 IEEE
797
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