Tutorial:
Modular Multilevel Converter
- Fundamentals and Applications -
Rainer Marquardt, Yeqi Wang
Institute for Power Electronics and Control (IPEC)
University of Bundeswehr Munich, Germany
Agenda
1.
Introduction
2.
Fundamentals of Modular Multilevel Converter
3.
Submodule Topologies
4.
Dimensioning of the components
5.
Redundant Operation and Fault Tolerance
6.
Control Methods
7.
Applications and Projects
8.
Outlook and Future trends
2
1. Main future converter requirements
- Full controllability in normal and fault conditions
- Elimination of passive filters
- Minimization of EMC-filters
- Suitability for common DC-Bus (Energy exchange, multiple drives)
- Reduced power loss, improved efficiency
- High availability by “inherent redundancy”
- Improved scalability by use of standardized sub components
3
1. Conventional converter topologies
Neutral Point Clamped Converter
P
T11
T12
NPC Converter:
(5-level)
T13
(Akagi, Nabae, Takahashi)
T14
Commutation
Path:
T21
T22
DCbusbar
C1
C2
Vd
V AC
C3
T23
T24
•
•
•
•
C4
N
Well established topology for three levels (motor drives, mainly)
Complicated construction for higher number of levels
Critical failure propagation with increasing number of levels
Capacitors at DC-Bus are not minimized/eliminated
4
1. Conventional converter topologies
Flying Capacitor Clamped Converter
P
T11
C41
T12
FCC Converter:
(5-level)
(Meynard, Foch)
Commutation
Path:
C31
T13
C42
C21
T14
C11
T22
T23
T24
Vd
V AC
T21
C22
DCbusbar
C32
C43
C33
C44
N
• Proven solution for low number of levels
• Long commutation path and non scalable construction for higher number
of levels
• Capacitors at DC-Bus are not minimized/eliminated
5
1. Conventional converter topologies
Cascaded H-Bridge Converter
(Robicon)
• Well established for single motor drives (without active front end)
• Very complicated transformer with increasing number of levels
• No DC-Bus available
6
1. Conventional converter topologies
HVDC-Transmission using „Two-Level converter“
Characteristics:
• High di/dt of arms currents (ia)
(Complex construction, EMI)
• Need for bulky filters at AC-side
(Space requirement and transient
behavior)
• High pulse frequency necessary
(High switching losses)
• Bulky capacitors at DC-Bus
• Severe problems with DC-side failure
management
7
1. Introduction
Drawbacks of capacitors at DC-Bus
In multiterminal configuration, management of DCside failures is impeded:
• High surge currents after DC-short circuits can
lead to mechanical damage and arcing
• Secondary damage of not involved converters
at same DC-Bus can occur
• In normal and transient conditons, resonance
currents in the DC-Bus network are disturbing
Electrolytic capacitor
Metalized film capacitor
8
2. Fundamentals of Modular Multilevel Converter
Modular Multilevel Converter (M2C or MMC)
•
Strictly scalable (modular) construction
•
No need for passive filters at AC-side and
DC-side
•
Low di/dt of arms currents
(Low EMI and acoustic noise)
•
No need for transformers (2terminal SM)
•
Low pulse frequency (fP≈ 3f1) sufficient
9
2. Fundamentals of Modular Multilevel Converter
Features:
•
•
•
•
•
Submodules are simple 2-terminal devices
Critical communication loops solely internally
Submodules suitable for wide range of applications
Freely scalable by adapting number of submodules
No power supply necessary for submodules
Advantages:
•
•
•
•
Strictly modular concerning industrial implementation
No AC-filters necessary
No DC-Link capacitor at DC-Bus
Direct and fast control of AC- and DC-side
10
2. Fundamentals of Modular Multilevel Converter
Comparison of 2-level converter and MMC
Arms currents
AC-Terminal voltages
2-level Converter
M2C
•
•
•
•
Arm currents of M2C are not chopped (simplified HV-construction, low EMI)
No filters at AC-side required
No special requirements for transformers, motors, cabling
No capacitors at DC-Bus
11
1
1
0.995
0.995
0.99
0.99
0.985
0.985
0.98
Efficiency
Efficiency
2. Comparison of 2-level converter and MMC
0.975
0.97
0.98
0.975
0.97
0.965
0.965
0.96
0.96
0.955
0.955
0.95
0
50
100
150
200
250
Real Power (MW)
M2C with HB-SM
Two-level-Converter
300
350
0.95
0
50
100
150
200
250
Real Power (MW)
300
350
M2C with HB-SM
M2C with CDSM
Comparison of typ. efficiencies (pure semiconductor losses)
Conditions: Vd = 300 kV, Vc = 2,4 kV, cosϕ = 0,88; 4,5 kV – IGBT, no redundancy included)
12
2. Fundamentals of Modular Multilevel Converter
First assumptions for idealized operation
• Number of submodules per arm (n) is high
• All submodules of each arm are summarized as one voltage source uz
• Arm voltage can be controlled continuously within its range (0 ≤ uz ≤ n∙uc)
• Converter is controlled by the arm voltages
• AC-currents are sinusoidal
• DC-current/voltage are constant/smooth
13
2. Simplified equivalent circuit of the MMC
Arm currents (HB-SM)
•
DC-current distribution:
Id/3 in each arm
•
AC-current distribution:
Iw equally distributed between upper and
lower arms
Id
P
ia3
ia1
La
ia5
La
La
Ud/2
uz1
Ud
iw1
uw1
0
uz3
iw2
L1
La
N
uz4
1
1
ia1 (t ) = I d + Î w ⋅ sin(ω t + ϕ )
3
2
1
1
ia 2 (t ) = I d − Î w ⋅ sin(ω t + ϕ )
3
2
L3
iw1 (t ) = ia1 (t ) − ia 2 (t )
uz6
La
La
ia2
iw3
L2
uz2
Ud/2
uz5
ia4
I d = ia1 (t ) + ia 3 (t ) + ia 5 (t )
ia6
•
Normalized current ratio m of each arm:
Îw
m=
2 = Îw ⋅3
Id
Id ⋅ 2
3
14
2. Simplified equivalent circuit of the MMC
Arm voltages (HB-SM)
Id
•
P
ia3
ia1
La
ia5
La
La
Ud
− ûw ⋅ sin(ω t )
2
U
U z1 (t ) = d + ûw ⋅ sin(ω t )
2
U z1 (t ) =
Ud/2
uz1
Ud
uz3
iw1
uw1
0
uz5
iw2
L1
iw3
L2
L3
•
uz2
Ud/2
Voltage range using HB-Submodules:
0 ≤ uz ≤ Ud
La
uz4
ia2
k=
La
La
ia4
Normalized voltage ratio k:
uz6
ia6
ûw
2 ⋅ ûw
=
Ud
Ud
2
(0 ≤ k ≤ 1)
N
U z1 (t ) =
Ud
⋅ (1 − k ⋅ sin(ω t ) )
2
15
2. Simplified equivalent circuit of the MMC
Relationship between arm currents and voltages
• Power between DC-side and AC-side (no power losses of converter)
!
Pd = U d ⋅ I d = 3 ⋅
ûw î w
⋅
⋅ cos ϕ = Pw
2 2
3  U  
I 
U d ⋅ I d = ⋅  k ⋅ d  ⋅  2 ⋅ m ⋅ d  ⋅ cos ϕ
2 
2  
3
m ⋅ k ⋅ cos ϕ = 2
Lower limit:
mmin =
Upper limit:
2
=2
k max ⋅ cos ϕ max
for HB-Submodules
mmax =
2
= +∞
k min ⋅ cos ϕ min
m ≥2
for k ≤ 1
Necessary for HB-Submodules
m≥ 2
for k ≤ 2
Recommended for FB-Submodules
16
2. Real operation with circulating currents
Definition of circulating currents
• Energy exchange between converter arms
internal circulating currents (iCC)
id
P
ia1
iCC1
La
ia3
iCC2
La
La
uz1
uz3
uz5
Ud
uz2
La
ia2
1
1
ia1 (t ) = I d + iw1 (t ) + iCC1 (t )
3
2
1
1
ia 2 (t ) = I d − iw1 (t ) + iCC1 (t )
3
2
ia5
iw1
LS
RCu
uN1
L1 i
w2
LS
RCu
uN2
L2 i
w3
LS
RCu
uN3
iCC1 (t ) + iCC 2 (t ) + iCC 3 (t ) = 0
L3
uz6
uz4
La
La
ia4
ia6
N
17
2. Real operation with circulating currents
Conditions
• No effect on the AC-side currents
• No effect on the DC-side current
• Arm current waveforms are identical in all arms (solely phase shifted)
Harmonics of circulating currents:
ωCC even-numbered multiple of ω and not dividable by 6
(2, 4, 8, 10, 14, 16, 20, 22, …)
Therefore, ωCC = 2ω is main component
iCC1 (t ) = îCC ⋅ sin(2ω t + ϕCC )
4π 

iCC 2 (t ) = îCC ⋅ sin 2ω t + ϕCC −

3 

18
2. Real operation with circulating currents
Control of circulating currents
• Small voltage differences (ΔU) of the arm voltages leading to
Voltage differences across the arm inductors La
CC1
a1
a5
a
a
Uz
z1
∆U
z5
ia
z2
a
a2
∆U
4 La
z6
a
a6
19
2. Real operation with circulating currents
Reasonable usage of circulating currents:
• Balancing arm energies
• Reduction of capacitor voltage ripple
Total installed energy of converter
Comparison of 2-level VSC versus MMC (Example):
PS
ω1
Uc“
Cd
WC
=
=
=
=
=
3386 kVA
2π ⋅ 50 Hz
3220 V
2.08 mF
10.78 kWs
1)
PS
ω1
Uc“
C0
n
Wtotal
=
=
=
=
=
=
2)
4310 kVA
2π ⋅ 50 Hz
1100 V
1.01 mF
8
25 kWs → Wtotal′ = 19.64 kWs (at equal power level)
Higher capacitor volume needed for MMC, typically
1) Rohner, S.: „Untersuchung des Modularen Mehrpunktstromrichters M2C für Mittelspannungsanwendungen“
2) Schröder, D.: „Leistungselektronische Schaltungen“, 3. Auflage
20
2. Common mode voltages
Conventional VSC
Severe problems concerning:
• EMC
• Motor bearing currents
• Long motor cablings
MMC
• Any waveform of common mode voltage possible (including zero)
(sinusoidal, trapezoidal, triangular)
• No problems with steep and high voltage gradients
• For low frequency operation common mode voltage must be reintroduced
in a controlled manner
21
2. Common mode voltages
Conditions for introducing common mode voltages
• No effects on the AC-side voltages
• No effects on the DC-side voltage
Allowable harmonics of common mode voltage:
ωCM multiple of 3ω
(3, 6, 9, 12, 15, 18,…)
22
2. Precharging of the capacitors
• „Black start“ from low auxiliary DC-Source (e.g. battery) possible
• Sequential („time multiplex“) charging of the submodules advantageous
(2n – 1) submodules switched to ux = 0
U
UCnom
U
d
8
6
4
U
U
2
0
0
C1
U
C2
...
1
Aux
U
2
3
t [ms]
C16
4
5
23
2. Control of the DC-side
• Degree of freedom to control the DC-side voltage/current directly
• Multilevel DC-voltage is available
• Number of DC-voltage levels very high (> 2n)
(Inductive voltage divider of arm inductors)
Equivalent circuit of the DC-side of MMC
ud (t ) =
1
(ud1 (t ) + ud 2 (t ) + ud 3 (t ))
3
d
•
ud(t) and id(t) can be controlled very fast
(compared to conventional VSC)
a
stray
DC
Important for rapid power changes of real
power
Advantageous for operation of several
converters on common DC-Bus
24
2. Control of the DC-side
Short circuits at the DC-side
• Extremely high surge current in conventional VSC
Destruction of solid busbars, IGBTs is a severe problem
Destruction in „non-involved“ converters connected to the same DC-Bus is
possible
MMC:
•
Rectified AC-current is flowing after DC-short circuit,
mainly
•
Limitation by AC-reactances and arm inductors is
possible
•
Complete electronic current limitation possible by
replacing HB-Submodules with improved topology
T1
X2
D1
ia
+
-
C0
Thy 1
T2
D2
X1
25
UC
2. Control of the DC-side
Electronic DC-current limitation
• Submodules enabling negative terminal voltages are necessary
• Alternatively, Electronic or Hybrid DC-Breaker at DC-side is possible:
LV
DB
HV
DB
HV
DB
DC-Breaker using HV-IGBTs
DC-Breaker using thyristors
Häfner J., Jacobson B.: “Proactive Hybrid HVDC-breakers – A key
innovation for Reliable HVDC grid“
Wang, Y.; Marquardt, R.: „A fast switching, scalable DCBreaker for meshed HVDC-SuperGrids“
26
3. Submodule Topologies
Half-Bridge-Submodule (HB-SM):
•
•
•
•
Simplest submodule topology for MMC
Low semiconductor expenditure and minimized losses
No possibility for electronic DC-current limitation or cut-off
High volume of installed capacitors
27
3. Submodule Topologies
Full-Bridge-Submodule (FB-SM):
T1
X2
T3
D1
Ia
D3
T1
D1
+
+
-
-
D2
D3
T4
D4
UC
C0
C0
T2
T3
T4
D4
T2
D2
X1
• Double conduction losses (in comparison to HB-SM)
• Electronic DC-current limitation or cut-off
• Higher modulation factor (k ≤ 1.4) possible:
Decrease of AC-current possible (reduced losses)
Minimization of submodule capacitors achievable
28
3. Submodule Topologies
Half-Bridge mixed with Full-Bridge:
T1
X2
T1
D1
Ia
+
D1
UC
+
-
-
D2
D3
T4
D4
UC
C0
C0
T2
T3
T2
D2
X1
• Reduced maximum amplitude of negative arm voltage is acceptable
• Decreased AC-current and minimized capacitor volume is not achievable
(modulation factor: k ≤ 1)
No significant improvement compared to HB- or FB-SM
29
3. Submodule Topologies
Director switches plus Full-Bridge (Alternate Arm Converter, AAC):
(Merlin, M.M.C; et al.: “A New Hybrid Multi-Level Voltage-Source Converter with DC-Fault Blocking Capability”)
X2
Ia
T1
VDR1
D1
T1
D1
+
-
D2
D3
T4
D4
UC
C0
VDR2
T2
T3
T2
D2
X1
• Electronic DC-current limitation possible
• IGBTs of „director switches“ vulnerable by overvoltage surges from grid
(high energy)
• At least two IGBTs per FB-SM necessary, owing to necessary voltage rating
(non-ideal overvoltage protection characteristics of VDRs)
Chopped arm currents and the need to reintroduce a large DC-filter
30
impose severe limitations
3. Submodule Topologies
Full-Bridges with reduced IGBT-count:
(Li, R.; et al.: “A Hybrid Modular Multilevel Converter with Novel Three-Level Cells for DC Fault Blocking Capability”)
T1
X2
T3
D1
Ia
D3
T1
D1
+
+
-
-
D2
D3
T4
D4
UC
C0
C0
T2
T3
T4
D4
T2
D2
X1
• Reduction of installed semiconductors
• Negative voltage not possible in both directions of arm current
Conduction losses even higher than FB-submodules, because
Voltage modulation factor of (|k| > 1) not possible
31
3. Submodule Topologies
Cross coupled Half-Bridge-Submodules:
(Nami, A.; Wang, L.; Dijkhuizen, F.; Shukla, A.: „Five level cross connected cell for cascaded converters“)
T6
T1
ia
D8
D6
D1
+
X2
T8
-
UC1
S
UC2
C0
T2
X1
D2
D9
D7
T9
T7
T3
D3
T4
D4
+
C0
• The semiconductors of the „cross-switches“ need double the blocking voltage
• No advantage – compared to FB-SM – is achieved
• (when closing the switch (S), the circuit becomes identical to two FB-SM in
series)
32
3. Submodule Topologies
Clamp-Double-Submodule (CD-SM):
(Marquardt, R.: „Modular Multilevel Converter: An universal concept for HVDC-Networks and extended DC-Bus-applications”)
T1
X2
D6
D1
ia
+
-
UC1
T5
D5
UC2
C0
T2
D2
D7
T3
D3
T4
D4
+
C0
X1
•
•
•
•
Conduction losses increased only moderately (compared to HB-SM)
All semiconductors have same blocking voltage requirement (+)
Required installed silicon area increased only moderately (typ. factor 1.25)
Negative voltages not possible for all directions of arm current (|k| ≤ 1)
33
3. Submodule Topologies
Semi-Full-Bridge
(Ilves, K.: “Modeling and Design of Modular Multilevel Converters for Grid Applications”)
T6
T1
X2
D6
D1
ia
+
-
UC1
T5
D5
UC2
C0
T2
X1
D2
D7
T3
D3
T4
D4
+
C0
T7
• Diodes (D6 + D7) of the CD-SM extended by parallel IGBTs (T6, T7)
• Characteristics similiar to Clamp-Double-SM
• Negative voltages possible for both directions of arm current (k ≥ 1)
Switching sequences and capacitor balancing critical
(Capacitors switched in parallel)
34
3. Submodule Topologies
Comparison of typical power losses
• Half-Bridge enables lowest power losses
(reference = 100%)
• Full-Bridge power losses not generally acceptable
• Future trend of improved power semiconductors
will not change the ranking
• Essential progress in power semiconductors and
topologies will mitigate the differences in future
35
4. Dimensioning of the components
Semiconductors
• Industrial MMC with n ≥ 6 submodules
• IGBT voltage classes:
UCE = 1.2kV, 1.7kV, 3.3kV, 4.5kV and 6.5kV
• Nominal Voltage UCnom of the submodule:
UCnom = 0.5 .. 0.6 UCE
Recommended voltage utilization
• For metallized film capacitors:
U C max ≤ (1 + ε ) ⋅ U Cnom ≤ 1.3 ⋅ U Cnom
Recommended ripple voltage
36
4. Dimensioning of the components
Semiconductors
• Definition of normalized DC-voltage modulation factor
b=
( )
Ud
2
n ⋅U C
• Typical design range:
b = 0.35...0.45
• Contribution of submodule to converter power („yield“):
I 

PSM = b ⋅  U Cnom ⋅ d 
3

• Required number of submodules per arm n:
n≥
( )
Ud
2
b ⋅ U Cnom
⋅ (1 + ε )
37
4. Dimensioning of the semiconductors
Submodule currents
• Definition factor of capacitor energy:
1 

x = 1 − 2 
 m 
3
2
• Average currents through semicondutors:
I b⋅m⋅ x
1
⋅b ⋅ x ⋅ Iw = d ⋅
4
3
π
1
1
iT 2 = ⋅ (1 − b ⋅ x ) ⋅ I w + I d
4
6
1
1
iD 2 = ⋅ (1 − b ⋅ x ) ⋅ I w − I d
4
6
iT 1 = iD1 =
•
iT 2 , iD 2 > iT 1 , iD1
38
4. Dimensioning of the components
Capacitors
• Advantages (+) and Disavantages (–) of distributed energy storage –
compared to central DC-Bus capacitor
(+)
Excellent scalability
(+)
Redundant operation after submodule defects
(+)
Better management of DC-Bus short circuits
(+)
Improved controllability and fast dynamic response
(‒)
Total amount of installed energy storage is higher
39
4. Dimensioning of the capacitors
Necessary energy installed per arm
Conditions:
• Idealized, sinusoidal arm voltages and arm currents
• HB-submodules
• No circulating current, no energy between the phases
Uz(t)
ia(t)
Pz(t)
40
4. Dimensioning of the capacitors
Necessary energy installed per arm 1)
Pz (t ) = u z (t ) ⋅ ia (t )
Uz(t)
ia(t)
⇒ W z (t ) = ∫ Pz (t )dt
Wz = 0
⇒ + ∆W z = − ∆W z
x2
∆W z = ∫ Pz (t )dt
Pz(t)
x1
Zeros of current:
1
x1 ( m, ϕ ) = −ϕ − arcsin  
m
1
x2 ( m, ϕ ) = π + arcsin   − ϕ
m
1) Conditions:
see page 40
41
4. Dimensioning of the capacitors
Necessary energy hub per submodule 1)
P
1 

∆W z ( m ) = d ⋅ m ⋅ 1 − 2 
3 ⋅ω
 m 
3
2
2
2 PS   k ⋅ cos ϕ  
⇒ ∆W z ( k ) = ⋅
⋅ 1− 
 
3 k ⋅ ω  
2
 
3
2
  k ⋅ cos ϕ 
2
PS
⇒ ∆WSM ( k ) = ⋅
⋅ 1 − 


3 k ⋅ n ⋅ω  
2

1) Conditions:
see page 40
2




3
2
42
4. Dimensioning of the capacitors
Necessary energy installed per submodule 1)
• Energy per submodule capacitor:
WC =
1
C0 ⋅ U C2
2
• Voltage ripple of submodule capacitor (0 ≤ ε ≤ 0.3)
U C ,min = U C ⋅ (1 − ε )
U C ,max = U C ⋅ (1 + ε )
• Necessary capacitance:
1
⋅ ∆WSM
4ε
∆WSM
∆W z
⇒ C0 =
=
2
2
2 ⋅ ε ⋅ U Cnom
2 ⋅ n ⋅ ε ⋅ U Cnom
WC (ε , U C ) =
1) Conditions:
see page 40
43
4. Dimensioning of the capacitors
Necessary energy installed per submodule 1)
Energy ratio ΔXZ:
ω
∆X z = ∆Wz ⋅ 
 PS



2   k ⋅ cos ϕ 
⇒ ∆X z ( k ) =
⋅ 1− 

3 ⋅ k  
2

High energy required at low voltage modulation factor k
Phase angle has moderate influence on required energy installation
1) Conditions:
see page 40
44
2




3
2
4. Dimensioning of the components
Arm inductors: Comparison of two implementations
La
2La
 La 
+

 2 
La
0
4 La
La
La
Discrete inductors
Center tap (coupled)
Effective internal
inductance
2La
4La
Effective AC-load
inductance
+La/2
≈0
45
5. Redundant operation and Failure tolerance
Continued operation after defects
Advantages of the MMC:
•
•
•
•
•
Converter structure is realized by identical submodules (SM)
Power circuit has no additional, critical components
Communication (to SM) realized solely via a single duplex connection
Defect of submodule has no impact on other submodules
Surge currents restricted to interior of SM
Additional requirements for reliable operation:
•
•
•
•
Solid mechanical construction (surge currents in SM)
Guaranteed continuous on-state of defective submodule (or bypass)
Redundancy of superordinated control system
For High power: Plasma spreading must be prevented
(„pressure proof“ housing of SM)
46
5. Redundant operation and Failure tolerance
Failure detection
• Checking plausibility of measured capacitor voltages
(intrinsic safe method for both submodule and communication failures)
Optional measures after defect
• Reduction of set value of AC-voltage
• Reduction of set value of DC-voltage
• Increasing capacitor voltage of all submodules
In general, reducing the set value of AC-voltage is the preferable measure (if
necessary)
47
6. Control methods
Main items
• Balancing of the submodule capacitor voltages
• Balancing of the arm energies
• Control of the DC-side voltages/currents
• Control of the AC-side voltages/current
48
6. Balancing of the arm energies
Definition of energies:
Example for converter with 3phases and 6 arms
WP = W1 + W3 + W5
WN = W2 + W4 + W6
WPh1 = W1 + W2
WPh2 = W3 + W4
WPh3 = W5 + W6
Total energy of the positive arms
Total energy of the negative arms
Energy in Phase 1
Energy in Phase 2
Energy in Phase 3
Wtotal = WP + WN
Total energy of the converter
Primary goal:
WPh1 = WPh2 = WPh3 = 1/3 Wtotal
WP = WN = 1/2 Wtotal
Equalized phase energies
Equalized arm energies
49
6. Balancing of the arm energies
Usable degrees of freedom:
Circulating currents (ICC1, ICC2)
• Asymmetric DC-current distribution between the three phases
deviation from Id/3
• Asymmetric AC-current distribution between positive and negative arm
deviation from Iw/2
Common mode voltage (UCM)
• Common mode voltage UCM
deviation from zero voltage
All degrees of freedom have no impact on the external values of converter
50
6. Balancing of the arm energies
Definition of energy ripple in the arms
Idealized case with zero circulating currents and zero common mode voltage
∆W z =
U d I d cos(φ ) 2   k ⋅ cos(φ ) 
⋅ ⋅ 1− 

ωN
k  
2

2




3
2
Under these simplified conditions, the result is:
• Energy ripple becomes very large for low frequencies
• For ωN = 0: arm energies are impossible to balance
Special control of arm energies necessary
51
6. Operation at frequency zero
Worst case-condition at ω = 0:
Example: „Frozen“ vector at ϕ = π/2
id
P
1
ia1
Phase 1
Phase 2
Phase 3
0.8
0.6
iCC1
La
ia3
iCC2
ia5
La
La
0.4
uz1
0.2
uz3
uz5
0
LS
RCu
uN1
L1
iw2
LS
RCu
uN2
L2
iw3
LS
RCu
uN3
Ud
−0.2
−0.4
L3
uz6
−0.6
uz2
uz4
−0.8
−1
iw1
0
π/2
π
3π/2
La
2π
ia2
• IPh1 = Îw
Uz3 || Uz5 ⇒ Uz35
La || La ⇒ ½ La
U0 = Iw ∙ 3/2 RCu
and
and
and
and
La
La
ia4
ia6
N
IPh2 = IPh3 = Îw/2
Uz4 || Uz6 ⇒ Uz46
RCu || RCu ⇒ ½ RCu
Ud ∙ Id = U0 ∙ Iw
52
6. Operation at frequency zero
Equivalent circuit
Introduction of a common mode voltage with chosen period TCM ↔ fCM
(50Hz.. 200Hz, typical)
ICC1
-ICC1
P
P
iz35
iz1
La
La
1/2 La
Id
uz1 = 0
uz35 = U0
iw
Iw
L1
(3/2) LS
Id
uz1 =
(Ud – U0)
uz35 = Ud
Iw
Ud
L2,L3
(3/2) LS
(3/2) RCu
Ud
L1
uz46 =
(Ud - U0)
iz46
L2,L3
iw
uz2 = U0
uz46 = 0
La
1/2 La
iz2
1/2 La
(3/2) RCu
uz2 = Ud
La
iz35
iz1
1/2 La
iz2
iz46
N
Positive half period of TCM
Amplitude: ICC1 = Id/2 + Iw/2
N
Negative half period TCM
53
6. Operation at frequency zero
Resulting energy ripple with chosen common mode operation:
1
∆Wz = TCM U 0 I W
2
∆WSM =
1 1

⋅  TCM U 0 IW 
n 2

per arm
per submodule
Low values of energy ripple are achievable, when output voltage (U0) is
small
Further improvement possible using trapezoidal waveform of the
common mode voltage
54
6. Operation at frequency zero
Impact of the common mode voltage on circulting current (ICC)
U0
=c
Ud
-½≤c≤½
U0'
= d +1
U0
d≥0
U CM =
1
2
U d ⋅ [1 − c ⋅ (1 + 2d )]
2
1
−
c
Î CC 1 = 1 2 IW ⋅
1 − c ⋅ (1 + 2d )
d = 0: Î CC 1 =
d > 1: Î CC 1 =
1
1
I ⋅ (1 + c ) =
2 W
2 I W ⋅ (1− c
2
1
Ud
)U
I + 12 I d
•
2 W
2
CM
•
High common mode voltage at ω ≈ 0 is
necessary to minimize ICC
Lower ICC achievable, when using SM
with bipolar voltage (e.g. Full-Bridge)
55
6. Optimized operation for drives
Basics of control for drives
(Kolb, J.; Kammerer, F.; Braun, M.: „A novel control scheme for low frequency operation of the Modular Multilevel Converter“)
Separate control of currents and arm energies with a cascaded control scheme:
New definition for one phase equivalent circuit:
iw/2
Ud
2
ip
LA
Mp
ui
uW
L
S
Id
DC-current for one phase:
up
R Cu
Common mode voltage for one phase:
iW
in
un
Ud
2
Mn
I d = I d + î d sin (ω0t )
LA
U CM = U CM + ûCM sin (ω 0t )
ω0: sinusoidal common mode frequency
iw/2
Equivalent circuit for one phase
56
6. Optimized operation for drives
Basics of current control
(Kolb, J.; Kammerer, F.; Braun, M.: „A novel control scheme for low frequency operation of the Modular Multilevel Converter“)
iw
2
i
in = I d − w
2
ip = Id +
iw/2
Ud
2
ip
LA
Mp
ui
uW
L
S
Id
up
R Cu
iW
di p
Ud
=L
+ u p + uw
2
dt
Mn:
Ud
di
= L n + un − uw
2
dt
in
un
Ud
2
Mp:
Mn
Id =
1
⋅ (i p + in )
2
iw = i p − in
LA
iw/2
Equivalent circuit for one phase
57
6. Optimized operation for drives
Basics of current control
(Kolb, J.; Kammerer, F.; Braun, M.: „A novel control scheme for low frequency operation of the Modular Multilevel Converter“)
iw/2
Ud
2
ip
LA
Mp
ui
uW
L
S
Id
diw
1
=
⋅ (u n − u p − 2 ⋅ (RCu iw + ui ))
dt 2 La + Ls
Controlled using difference of arm voltages
up
R Cu
iW
in
un
Ud
2
Mn
did
1
=
⋅ (U d − (u n + u p ))
dt 2 Ls
Controlled using sum of arm voltages
LA
iw/2
Equivalent circuit for one phase
Decoupled Current Control achievable
58
6. Optimized operation for drives
Basics of energy control
Instantaneous power in the arms:
Pp / n = u p / n ⋅ i p / n
iw/2
Ud
2
ip
LA
Mp
ui
uW
L
S
Id
up
R Cu
iW
in
un
Ud
2
Mn
LA
iw/2
Equivalent circuit for one phase
P∆ = Pp − Pn ≙ Power difference between the arms
1
PΣ = (Pp + Pn ) ≙ Average Power of one phase
2
Common mode (Δ) and differential mode (Σ)
components
P∆ , p = P∆ ,n
PΣ , p = − PΣ ,n
59
6. Optimized operation for drives
Basics of energy control
Separated components:
iw/2
Ud
2
ip
LA
Mp
ui
uW
L
S
Id
1
2
1
lower + Ud I d
2
upper + Ud I d
Active power
up
R Cu
iW
in
Mn
input
output
1
+ Ud I w
4
1
− Ud I w
4
−U wId
+UwId
1
− ûCMî d
2
1
+ ûCMîd
2
− U CM I d
+ U CM I d
1
− UCM I w
2
1
− UCM I w
2
Pulsating power
Active power
caused by DCfor
additional
components
balancing
Common mode components
Differential mode components
un
Ud
2
1
− Uw I w
2
1
− Uw I w
2
LA
!
1
PΣ = ⋅ (Pp + Pn )= 0
2
!
iw/2
Equivalent circuit for one phase
P∆ = Pp − Pn = 0
Sum of arms power
(Averaged = 0)
Difference of arms power
(Averaged = 0)
60
6. Optimized operation for drives
Basics of energy control
Necessary DC-components:
iw/2
Ud
2
ip
LA
Mp
ui
uW
L
S
Id
up
R Cu
iW
1
Id =
⋅ (U w I w + U CM I w )
Ud
1 1

îd =
⋅  U d I w − 2U w I d − 2U CM I d 
ûCM  2

Side condition:
in
3
un
∑î
!
dy
=0
No ripple current in DC-side
y =1
Ud
2
Mn
LA
iw/2
Equivalent circuit for one phase
U CM (ω0t ) = −
1 Uw
cos(3ω0t − ϕ )
4 cos ϕ
61
6. Optimized operation for drives
Basics of energy control
(Kolb, J.; Kammerer, F.; Braun, M.: „A novel control scheme for low frequency operation of the Modular Multilevel Converter“)
Energy and balance control
feedforward
control
Uc
Current control
ŪCΣ
ω0
up*
- -
Īd*
Energy control
-
-
id
sin(x t)
1/2
Ud
-
îd*
ŪCΔ
uw0*
MMC
un*
Balance control
measured/filtered values
desired values (*)
given parameters
feedforward
control
Evaluation of measured values
ip
in
-
iw
id
1/2
uCp
UCΔ
uCn
-
ŪCΔ
UCΣ
1/2
ŪCΣ
62
6. Modulation methods
• Control layer between energy control and submodule control
• Creates switching signals to synthesize the given arm voltages
Modulation method has impact on:
• Voltage harmonics on AC-side
• Current harmonics in the arms
• Current and voltage ripple on the DC-side
• Switching frequency
63
6. Modulation methods
Carrier-based modulation methods
Comparing reference signal against carrier signal
1
1
1
1
0
0
0
0
-1
0
0.01
Time [s]
0.02
-1
0
0.01
Time [s]
0.02
-1
0
0.01
Time [s]
0.02
-1
0
4
4
4
4
2
2
2
2
0
0
0.01
Time [s]
a) PSC
0.02
0
0
0.01
Time [s]
b) PDC
0.02
0
0
0.01
Time [s]
c) PODC
0.02
0
0
0.01
Time [s]
0.02
0.01
Time [s]
0.02
d) APODC
Various compromises between switching frequency and harmonics achievable
64
6. Modulation methods
Nearest Level Modulation (NLM)
USM
rounding
Uarm,ref
• Low switching frequency, but higher harmonics
• Suitable for high voltage applications
• Number of voltage levels (in line-to-line) depending on rounding function
65
6. Modulation methods
Averaging NLM
(Rohner, S.; Bernet, S.; Hiller, M.; Sommer, R.: „Modulation, losses and semiconductor requirements of modular multilevel converters”)
4 UC
4 UC
3 UC
3 UC
Uz,ref
Uz,ref
2 UC
2 UC
Uz,AVG
Uz,AVG
Uz,PWM
1 UC
1 UC
TPWM
0 UC
0 UC
0
1
2
3
4
5
0
1
2
3
4
5
• Necessary number of submodules in on-state, plus
• one submodule chosen for PWM
• The SM chosen for PWM is interchanged after each pulse period
66
6. Modulation methods
Tolerance Band
(Hassanpoor, A.; Ängquist, L.; Norrga, S.; Ilves, K.; Nee, H.-P.: “Tolerance Band Modulation Methods for Modular Multilevel Converters”)
•
•
Suitable for few number of SMs
Continuously monitoring the
divergence („error of flux“):
ψ diff = ψ act −ψ ref = ∫ (vact (t ) − v ref (t ) )dt
•
•
Ψdiff < δ: insert voltage level
Ψdiff > δ: remove voltage level
Good compromise between
switching frequency and
harmonics possible
67
6. Submodule capacitor voltage balancing
Control layer below arms energy control and modulation
• Distributing the voltage and „workload“ equally between all submodules
of one arm
Equalized average energies for all submodules of converter
Equalized max. voltages for all submodules of converter
Aims:
• Low switching frequency
• Minimized voltage differences
68
6. Submodule capacitor voltage balancing
Basic capacitor balancing
(Marquardt, R.; Lesnicar, A.; Hildinger, J.: „Modulares Strom-richterkonzept für Netzkupplungsanwendung bei hohen Spannungen“)
• „Measuring and sorting“-method in each arm
• iz > 0 (charging):
SM with lowest voltages are selected to be inserted
• iz < 0 (discharging):
SM with highest voltages are selected to be inserted
Example:
iz,p ≥ 0
SM1
UC1 = 1040V
SM2
UC2 = 1050V
SM3
UC3 = 1010V
SM4
UC4 = 1030V
SM5
UC5 = 1020V
iw
SM6
UC6 = 960V
SM7
UC7 = 990V
SM8
UC8 = 980V
SM9
UC9 = 1000V
SM10
UC10 = 970V
Uw
Positive arm
UC3 = 1010V
UC5 = 1020V
UC4 = 1030V
UC1 = 1040V
UC2 = 1050V
Negative arm
UC6 =
960V
UC10 =
970V
UC8 =
980V
UC7 =
990V
UC9 = 1000V
Asynchronous sorting and selecting time period
(or synchronous with PWM) can be chosen
iz,n < 0
(Rohner, S.; Bernet, S.; Hiller, M.; Sommer, R.: „Modulation, losses and
semiconductor requirements of modular multilevel converters”)
69
6. Submodule capacitor voltage balancing
Predictive capacitor-voltage balancing
(Qin, J.; Saeedifard, M.: “Reduced Switching-Frequency Voltage-Balancing Strategies for Modular Multilevel HVDC Converters”)
•
Calculate UC(t + Tsort)
Calculate ΔUC
U C (t + Tsort ) = U C (t ) +
•
Determine ΔUC,max
Yes
Linear approximation of predicted voltage level
(arm current ia measured or estimated)
ia (t )
⋅ Tsort
C
Selection of submodules with lowest difference
∆U C = U C (t + Tsort ) − U C ,ref
No
ΔUC,max > δ
Reduced switching frequency
Conventional
sorting
algorithm
Predictive
sorting
algorithm
•
Additional tolerance band δ is advisable to
prevent larger errors
70
6. Submodule capacitor voltage balancing
Advanced predictive capacitor-voltage balancing
(Ilves, K.; et al.: “Predictive Sorting Algorithm for Modular Multilevel Converters Minimizing the Spread in the Submodule Capacitor Voltages”)
Aim:
• Equal capacitor voltages in one arm at maximum voltage
Conditions:
• Knowledge of arm current/charge
• Knowledge of pulse pattern in advance
expected capacitor voltage
„target“ capacitor voltage
Pulse pattern must be „cycled“ for even power loss distribution between SM
Switching frequency below 2 times the fundamental frequency is enabled
Reduction of max. voltage of capacitors becomes possible
71
6. Submodule capacitor voltage balancing
Fundamental frequency modulation
(Ilves, K.; et al.: “A New Modulation Method for the Modular Multilevel Converter Allowing Fundamental Switching Frequency”)
• Open loop approach with fundamental switching frequency
(requires knowledge of pulse pattern in advance and arm current)
• Balancing of the capacitor voltages over several periods, solely
Higher voltage ripple must be accepted
72
7. Applications and Projects
High Voltage Direct Current (HVDC) - Transmission
Improved exploitation
of Renewable Sources
Stabilization of
AC-Grids
Power Electronics
for HVDC-Grid
“Fire Wall”
Function
Availability and
usefulness of
Energy Storage
Long
Distance
Transmission
73
7. HVDC-Systems
Future Requirements for High Power Electronics
Minimized power loss and cooling equipment
Suitability for Multiterminal-Grid and Overhead-Lines
Extremely high Availability and redundant operation
Increase of transmission power – up to LCC-Level
74
7. HVDC-Systems
Main future requirements for HVDC
• Suitability for extension to Multiterminal-HVDC
• Suitability for Overhead-Lines (OHL) and/or Mix of Cables and OHL
• Fault clearing for DC failures very fast ( < 3ms)
(in order not to disturb the AC-Grids, seriously)
• Electronic DC-Current limitation
• Very high efficiency, DC-Voltage and power enabled
(Reference: LCC)
75
7. HVDC-Systems
Converter Configurations
Symmetrical Monopole:
P
Ud/2
M2C
M2C
M2C
Ud/2
N
• Limited Power
• Tight restrictions for
operation after line faults
Bipole with Metallic-Return (MR)
P
P
M2C
M2C
Ud/2
M2C
MR
Z
Z
M2C
N
M2C
Z
Ud/2
M2C
N
• Highest Power Level possible
• Flexible options for operation
after line faults
• Different grounding concepts are
possible
76
7. HVDC-Systems: Multiterminal
Converter 1
~
Example: VD = 300 kV
Id1
Vd
If1
M2C
B
~
A
If23
Converter 2
P2 Id2
DC-fault between Terminals A and B:
Id1 = -1kA (converter 1 operating as rectifier)
Id2 = -0.5kA (converter 2 operating as rectifier)
Id3 = 1.5kA (converter 3 operating as inverter)
N2
~
DC Bus
M2C
Converter 3
P3 Id3
N3
M2C
3 converters (M2C with C-DSM)
operating at common DC Bus
Fault current management by
electronic switching of the
converters
77
7. HVDC-Systems
Converter 2
Converter 1
Iw2 [kA]→
2
-2
2
0
0.2
0.4
0.6
0.8
1
t[ms]→
1.2
1.4
1.6
1.8
2
0
0.2
0.4
0.6
0.8
1
t[ms]→
1.2
1.4
1.6
1.8
2
1
0
0
Id2 [kA]→
Iw1 [kA]→
0
-2
0
0.2
0.4
0.6
0.8
1
t[ms]→
1.2
1.4
1.6
1.8
2
-1
-2
-3
Converter 3
1
2
Iw3 [kA]→
Id1 [kA]→
0
-1
0
-2
prospective DC-current
-2
0
0.2
0.4
0.6
0.8
1
t[ms]→
1.2
1.4
1.6
1.8
2
0
0.2
0.4
0.6
0.8
1
t[ms]→
1.2
1.4
1.6
1.8
2
2
0
0.2
0.4
0.6
0.8
1
t[ms]→
Blocking command for the converters
1.2
1.4
1.6
1.8
2
1
Id3 [kA]→
-3
0
-1
-2
78
7. HVDC-Systems
Resulting DC-side fault current:
DC-Bus current:
4
1
Converter 1
Id1 [kA] →
0
3.5
prospective fault current
3
-1
-2
0
0.2
0.4
0.6
0.8
2.5
1
t[ms] →
1.2
1.4
1.6
1.8
2
1.4
1.6
1.8
2
1.4
1.6
1.8
2
1
Converter 2
0
Id2 [kA] →
2
1.5
-1
-2
-3
1
0
0.2
0.4
0.6
0.8
1
t[ms] →
1.2
2
0.5
0
Converter 3
1
0
0.2
0.4
0.6
0.8
1
t[ms]→
Blocking command for the converters
1.2
1.4
1.6
1.8
2
Id3 [kA] →
IFLT=If1 +If23 [kA]→
-3
0
-1
-2
0
0.2
0.4
0.6
Downtime of DC-Grids below 1ms, No AC-tripping
In comparison: With AC-tripping >> 100ms
0.8
1
t[ms] →
1.2
79
7. HVDC-Systems
Dynamic Control capabilities of MMC
Fast reactive power reversal of MMC (Example with typical time scale)
The absence of
passive AC filters
enables good
dynamic behaviour
Reactive current is
shifted by 180° in
extremely fast and
smooth manner
100% reactive
power reversal in
less than
5ms possible
80
7. HVDC-Systems Research projects
Examples:
USA:
GENI-Project
S.-Korea: Hyosung/Jeju-Island
China:
- 200kV DC-Breaker
- Multiterminal HVDC
(Zhoushan)
America
Europe
Asia
Japan: SiC („FIRST“-Program)
20kV-SiC-Power
semiconductors
81
7. Applications and Projects
Flexible AC Transmission System (FACTS)
Static VAR Compensator (SVC)
(Pereira, M; Retzmann, D.; Lottes, J.; et al.: „SVC PLUS: An MMC STATCOM for Network and Grid Access Applications“)
• Power factor compensation
• Improvement of voltage stability
Unified Power Flow Controller (UPFC)
(Guying, Z.; Daozhuo, J; Xiarang, L.: „Modular Multilevel Converter for Unified Power Flow Controller Application“)
• Control of active and reactive power flow in transmission line
Requirements
• No/Small AC-filters
• Low Switching frequency
• High reliability and high efficiency
Modular Multilevel Converter
82
7. Applications and Projects
Application of MMC for Railway
(Winkelnkemper, M.; Korn, A.; Steimer, P.: „A Modular Direct Converter for transformerless Rail Interties“)
• Interconnection of European 15kV/16.7Hz with 50Hz industrial grid
• No 16.7Hz transformer and 2nd harmonic DC-filter
Requirements
• Reactive power compensation
• Low maintenance and High reliability
• Very high efficiency
Additional challenges
• Large transient overvoltages from grid Ängquist, L.; Haider, A.; Nee, H.-P.: „Open-loop Approach to
Control a Modular Multilevel Frequency Converter“
• Heavy overloads
Modular Multilevel Converter
83
7. Applications and Projects
Application of MMC for Drives
• State of the art using Two-Level-Converters:
Essential drawbacks:
DC-Bus
IGBT-inverter
EMI-Filter
3N
3M
enaC
b
EMI-Filter
Line-SideConverter
hC
rately
ekophC
D
/
epr-C
tliIF
M
E
IG
rot1
-eT
IvrntB
To
Motor 1
EMI-Filter
To
Motor 2
• No useful scalability
(adaptation to different power
levels and DC-Bus-Voltages)
• No safe failure behaviour (High
DC-surge currents, high risk of
component damage)
• No capability for redundant
operation after failures
• High expense for passive filters
• Two level IGBT-Converter
• Passive EMI-filters and Line-Side-Converter
• Large DC-capacitors distributed at DC-Bus
84
7. Applications and Projects
Application of MMC for Drives
Advantages:
P
DC-Bus:
No Capacitors!
i1
Vd
N
Motor
No Filters!
SM
SM
SM
SM
SM
SM
SM
SM
SM
SM
V12
SM
i2
i3
V23
V31
SM
SM
SM
SM
SM
SM
SM
SM
SM
SM
SM
SM
SM
• Minimized machine losses
• Minimized accoustic noise
• Parasitic bearing currents
eliminated
• Long motor cables enabled
• Redundant operation after failures
of submodules or failures at DC-Bus
is enabled
85
7. Applications and Projects
Field of application for Large Drives
• Marine propulsions
• Shaft generators
• Steel-mill
• Generators in hydro power
• Generators in wind power
• Test bench drives
86
7. Applications and Projects
(Offshore) Wind Power
(Liu, H.; Ma, K.; Loh, P. C.; Blaabjerg, F.: „Lifetime estimation of MMC for Offshore Wind Power HVDC Application“)
• Low maintenance, High reliability
• Harsh operating conditions
• Limited space in nacelle
Minimized filters
• In future:
- Higher power (P > 6MW)
- Gearless operation
Smirnova, L.; Pyrhonen, J.; Ma, K.; Blaabjerg, F.: „Modular
Multilevel Converter Solutions with few Sub-Modules for Wind
Power Application“
87
7. Applications and Projects
Battery energy storage system (BESS)
(Schroeder, M.; Henninger, S.; Jaeger, J.; et al.: „Integration of Batteries into a Modular Multilevel Converter“)
• Battery integrated into submodules
• Battery charging, discharging and
balancing possible
Main advantages
• Low voltage rating of the components
• High reliability due to redundancy
88
8. Outlook and Future Trends
Future requirements
• Higher Power
− Improvement of conventional semiconductors
− Wide bandgap semiconductors (SiC, GaN)
• Reduced capacitor volume
− New topologies
− Improvement of capacitor technology
• Current-Limiting capabilities
89
8. Development trend of semiconductors
HV-IGBT for MMC (VSC)
• Typ. Data:
4,5 kV / 2,4 kA
6,5 kV / 1,5 kA
Development-Trend:
• Lower differential on-state-resistance
• Improved Field-Stop Design
(asymmentrical blocking)
• Reverse conducting chips
90
8. Development trend of semiconductors
Package improvements
•
•
•
•
Half-Bridge Configuration
Modular Approach
Low inductive Package design
Higher power density
(Schütze, T.; Borghoff, G.; Wissen, M.; Höhn, A.: „Boost Your
System! – Defining the Future of IGBT High-Power Modules“)
91
8. Development trend of semiconductors
Reverse Conducting IGBT (RC)
(Werber, D.; Pfirsch, F.; Komarnitskyy, V.; et al.: „6.5kV RCDC For increased Power Density in IGBT-Modules“)
Improvements
•
•
•
Increased current density
Improvement of Rth/Zth of IGBT and
diode
Reduced temperature excursion
Higher life time
(Infineon: „RCDC: Reverse Conducting IGBT with Diode Control“)
92
8. Development trend of semiconductors
Silicon Carbide (RC)
(Heer, D.; Bayerer, R.; Domes, D.: „Systemdesign für SiC-JFET-Halbbrücken-Module“)
Characteristics
•
•
•
Low RDS,on, Low switching losses
Reverse conducting (RC)
Robust current limiting
Present status:
•
Only small chip area available for SiC
(max 5 x 5mm²)
•
1.2kV and 1.7kV in commercial production
•
JFETs („normally on“) best qualified
93
8. Development trend of semiconductors
Comparison of typical
On-State-Characteristics
iF
Si-Thyristor
6kA
Si-IGCT
•
Thyristor-Structures enable the
lowest differential On-State-Resistance
•
IGBT-Development intends to reduce
this difference
•
Wide Band-Gap-Semiconductors
offer the potential for:
Si-IGBT
4kA
SiC-FET
(Trend)
2kA
-1V
1V
2V
3V
VT
− Elimination of the threshold
voltage (≈ 1V)
− Essential reduction of differential
On-State-Resistance
94
8. Development trend of MMC
Hot-Swappable Submodules
(Cottet, D.; et al.: „Integration Technologies for a Fully Modular and How-Swappable MV Multi-Level Concept Converter“)
Replace defective submodules without (significant) disturbance of
converter operation
95
8. Development trend of MMC
• Open Space Optical IR communication
(instead of copper and optical fibre cables)
• Sensorless Tjunction Measurement System
• Integrated, self powered measurement systems
• Wireless, auxiliary, power supply
• Extending the advantages of redundant operation
96