Chapter 2 Properties of Resistive Circuits z Resistive Circuits : circuits consisting entirely of sources and resistors ¾ their properties will be used in the next chapters for important practical applications ¾ their concepts and techniques are foundation for all aspects of circuit analysis, where the circuit also contains other types of elements 2.1 SERIES AND PARALLEL RESISTANCE z network : the small unit into which a complete circuit is divided, for easier analysis or design ¾ may include any number of elements, but must have at least two terminals ¾ for example, the load that is attached to a source is often a two-terminal network (several resistors in series or in parallel) Series Resistance and Potentiometers z A simple circuit consisting of two resistors Figure 2.1 ¾ (1) from Ohm’s law, v1 = R1i, v2 = R2i (2) from KVL, v = v1 + v2 = (R1 + R2 ) i ∴ the i-v relationship is v = Rseri Rser = R1 + R2 ¾ z Rser : the series equivalent resistance, in other words, Rser can replace the two resistors R1 plus R2 Two-terminal networks are equivalent if they have exactly the same i-v characteristics at their terminals 1 ¾ ¾ z the conditions at the “terminals” of a complicated network can be more easily calculated using a simpler equivalent network however, the conditions “within” the network might be quite different voltage divider : because the series resistors carry the same current, the voltage v is “divided” among the series resistors ¾ for the two-resistor case, R1 R2 v1 = v, v 2 = v R1 + R2 R1 + R2 ¾ for the N-resistor case, Rser = R1 + R2 + + RN the voltage across any resistor Rn is R Rn vn = n v = v Rser R1 + R2 + + RN the value of Rser will always be larger than the largest individual resistance z potentiometer (pot) : a three-terminal device ¾ W : movable contact point RAW + RWB = RAB ¾ ¾ adjustable resistance (in Figure (c)) : RWB ≤ RAB R adjustable voltage (in Figure (d)) : vW = AW vs (W must not carry any RAB current) Figure 2.3 2 Example 2.1 Audio Volume Control Figure 2.4 Parallel Resistance Figure 2.5 z N resistors are in parallel, so voltage v appears across each one ¾ (Here, using conductance Gn = 1 Rn may be easier to analysis) from Ohm’s law : i1 = G1v, i2 = G2v, , iN = G N v from KCL : i = i1 + i2 + + iN =G1v + G2v + = (G1 + G2 + ∴ G par = G1 + G2 + + GN v + GN ) v = G parv + GN : parallel equivalent conductance the corresponding parallel equivalent resistance is 3 Rpar = ∴ z 1 G par 1 1 1 = + + Rpar R1 R2 + 1 RN Rpar has the same i-v relationship as the N parallel resistors current divider : parallel-connected resistors having the same voltage, the total current i is “divided” into the small i1, i2, , iN , through the resistors R1, R2, , RN ¾ the current through any resistor Rn is given by 1 Rn in = Gn Gn i= G par G1 + G2 + special case : if all N resistors have the same conductance G = 1 R , then i= + GN 1 R1 + 1 R2 + + 1 RN i in = i N ,G par = NG , Rpar = 1 G par = R N ¾ the value of Rpar will always be smaller than the smallest individual resistance z two parallel resistors : −1 ¾ z Rpar ⎛1 1⎞ = ⎜⎜ + ⎟⎟⎟ ⎜⎝ R1 R2 ⎠⎟ i1 = R2 R1 i, i2 = i R1 + R2 R1 + R2 = R1R2 = R1 R2 R1 + R2 Application : in order to reduce the present resistance R1 to a specified smaller value Rpar , you can parallel R1 with another resistance R2 to get Rpar = R1 R2 ≤ R ∵ 1 1 1 = + Rpar R1 R2 ∴ R2 = 1 1 1 − Rpar R1 = 4 R1Rpar R1 − Rpar Example 2.2 Parallel Resistance Calculations Figure 2.6 Example 2.3 Electric Grill Unit Figure 2.7 Resistive Ladders z A network consisting entirely of series and parallel resistors ¾ Given a resistive-ladder circuit, we may need to find some or all of the voltages and currents. They can be determined by the series-parallel reduction method in pages 48-49 at the textbook 5 Example 2.4 Ladder Calculations Figure 2.8 6 2.2 DUALS z z Table 2.1 Series Network Parallel Network KVL loop equation: v = v1 + v2 = R1i + R2i KVL node equation: i = i1 + i2 = G1v + G2v Equivalent resistance: Rser = R1 + R2 Equivalent conductance: G par = G1 + G2 Voltage divider: R1 v1 = v R1 + R2 Current divider: G1 i1 = i G1 + G2 Open circuit: v1 = v when R1 = ∞ short circuit: i1 = i when G1 = ∞ duality : Two different networks are duals when the i − v equations that describe one of them have the same mathematical form as the i − v equations for the other with voltage an current variables interchanged ¾ is not a technique for analyzing particular circuits ¾ is a conceptual aide that enhances intuition and underscores important relationships ¾ for instance: a series circuit: v = (R1 + R2 + + RN ) i its dual, a parallel circuit i = (G1 + G2 + + GN ) v Example 2.5 Constructing a Dual Circuit 7 2.3 CIRCUITS WITH CONTROLLED SOURCES z Independent sources : the source voltage or current does not depend on any other voltage or current ¾ For instance : the ideal sources introduced in Chapter 1 Controlled sources z Controlled sources : Sources that depend on some other voltage or current ¾ is also called dependent sources ¾ example : if vin = 10 V, then vout = 100vin = 1000 V if vin = 0.2 cos ωt V, then vout = 100vin = 20 cos ωt V z Classification : 8 ¾ VCVS : voltage-controlled voltage source vc is proportional to some other voltage vx , regardless of the current i vc = µvx vx : control variable µ : voltage gain, dimensionless ¾ CCCS : current-controlled current source the dual of VCVS ic = βix , independent of v ix : control variable β : current gain, dimensionless ¾ CCCS often represents the current-amplifying property of a bipolar junction transistor VCCS : voltage-controlled current source ic = gmvx , independent of v gm is called the transconductance, ¾ VCVS may be any linear voltage amplifier or voltage-amplifying device because it represents a voltage-to-current transfer effect and has the same units as conductance example : the current through a field-effect transistor depends on a controlling voltage CCVS : current-controlled voltage source vc = rmix , independent of i rm is called the transresistance, because it represents a current-to-voltage transfer effect and has the same units as resistance ¾ These controlled sources mentioned above are linear elements, because the current or voltage is directly proportional to the control variable ¾ a controlled source produces voltage or current only when an independent source activate the control variable ¾ if there is no independent source, then all v and i will be zero In the analysis of circuits with controlled source, an essential step is relating the control voltage or current to other quantities of interest 9 Example 2.6 Amplifier with a Field-Effect Transistor Figure 2.15 Example 2.7 Analysis with a VCVS Figure 2.16 10 Generalized Equivalent Resistance z recall that a resistive ladder network can be reduced to a single resistance z load network : any two-terminal network that contains no independent sources. If controlled sources are included, then the control variable must be within the same network ¾ controlled source are allowed since they remain “off” until an independent source activates the control variables Figure 2.18 z equivalent resistance theorem : When a load network consists entirely of resistances or resistances and controlled sources, the terminal voltage and current are related by v = Reqi , where Req is a constant ¾ Note : the reference polarities of v and i Example 2.8 Equivalent Resistance with a VCCS Figure 2.19 11 2.4 LINEARITY AND SUPERPOSITION z For linear circuits, two analysis techniques can be applied ¾ Proportionality Principle ¾ Superposition Theorem z Linear elements and circuits ¾ A resistor is a linear element, ∵ v = Ri ¾ A controlled source is a linear element, ∵ y = kx ¾ Linear circuit : A circuit is linear when it contains entirely of linear elements and independent sources ¾ Let the excitation (source) be x , and the response (any branch variable) be y , then y = f (x ) , where x is the cause and y is the effect For a linear circuit, f (x ) must be a linear function having the the properties of proportionality and superposition. z Proportionality Property : if f (x ) = y, then f (Kx ) = Kf (x ) = Ky K : constant for any value of x z Superposition Property : if f (xa ) = ya , f (xb ) = yb , then f (xa + xb ) = f (xa ) + f (xb ) = ya +yb for any values of xa and xb z Linearity : The property of Linearity combines Proportionality Property and Superposition Property. That is if f (xa ) = ya , f (xb ) = yb , then f (Kaxa + Kbxb ) = Ka f (xa ) + Kb f (xb ) = Kaya +Kbyb for any values of xa and xb , and Ka and Kb are arbitrary constants ¾ For example, an amplifier, vout = 100vin , that is f (x ) = 100x the input might come from an audio mixer combining the voltage v1 from a keyboard with the voltage v2 from a microphone to produce vin = 0.5v1 + 3v2 , then vout = f (vin ) = f (0.5v1 + 3v2 ) = 0.5 f (v1 ) + 3 f (v2 ) f (v1 ) = 100v1, f (v2 ) = 100v2, ∴ vout = 50v1 + 300v2 12 ¾ Testing if an element is linear : for an ideal resistor, v = Ri = f (i ) Let i = Kaia + Kbib f (ia ) = Ria , f (ib ) = Rib f (i ) = f (Kaia + Kbib ) = R (Kaia + Kbib ) = Ka (Ria ) + Kb (Rib ) = Ka f (ia ) + Kb f (ib ) ∴ a resistor is linear power dissipation by a resistor is not a linear function of the current i ∵ p = Ri 2 2 R (Kaia + Kbib ) ≠ KaRia 2 + KbRib 2 Proportionality Principle z Consider a linear circuit driven by a single independent source x (which may be time-varying) that produces the response y = f (x ) if x̂ = Kx then from proportionality property, yˆ = f (xˆ) = f (Kx ) = Kf (x ) = Ky ∴ any branch variable in a linear circuit varies in direct proportion to the source → proportionality principle : x̂ = Kx then ŷ = Ky z From proportionality principle, it is easy to find all branch variables and the source value in a ladder network if you know the value of a branch variable “farthest” from the source ¾ The procedure for analyzing a ladder network is in p.61 of the text Example 2.9 Analysis of a Ladder Network Figure 2.20 13 Superposition Theorem z z When a linear circuit contains two or more independent sources, the value of any branch variable equals the algebraic sum of the individual contributions from each and every independent source with all other independent sources set to zero ¾ Very useful fro circuits with multiple sources Illustration : yn : the value of any branch variable x 1, x 2 : the values of two independent sources then yn = f (x 1, x 2 ) : a linear function of both x 1 and x 2 the individual contributions from each source are yn −1 = f (x 1, 0) , yn −2 = f (0, x 2 ) then from the superposition theorem : yn = f (x 1, x 2 ) = yn −1 + yn −2 = f (x 1, 0) + f (0, x 2 ) ¾ In order to set one independent source to zero (suppress a source) v = 0 : "independent" voltage source ⇒ short circuit i = 0 : "independent" current source ⇒ open circuit Because controlled sources affect the individual contribution of each independent source, they cannot be suppressed during analysis by superposition Example 2.10 Superposition Calculations Figure 2.21 14 Example 2.11 Superposition with a Controlled Source Figure 2.22 15 2.5 THÉVENIN AND NORTON NETWORK z Two equivalent “source networks” are to be discussed based on Thévenin’s and Norton’s Theorems ¾ Leads to handy source conversions that simplify many analysis and design problems Thévenin’s and Norton’s Theorems z These two theorems are related to the “terminal” behavior of networks containing independent sources z source network: ¾ a two-terminal network ¾ consists entirely of linear elements and sources ¾ if controlled sources are present, then the control variables must be within the same network ¾ Note : the reference polarities for v and i show that the source network “supplies” power z terminology : ¾ open-circuit voltage voc ¾ i =0 short-circuit current isc ¾ v i v =0 Thévenin resistance v Rt = oc , the slope of the v − i line is −Rt isc 16 z Thévenin’s theorem : Any linear resistive source network acts at its terminals like an ideal voltage source of value voc in series with a resistor having resistance Rt ¾ Thévenin equivalent network: v = voc − Rti if i = 0, then v = voc if v = 0, then i = voc Rt = isc z Norton’s Theorem : Any linear resistive source network acts at its terminals like an ideal current source of value isc in parallel with a resistor having resistance Rt ¾ Norton equivalent network: i = isc − v Rt if i = 0, then v = Rtisc = voc if v = 0, then i = isc ¾ voc , isc , Rt : Thévenin parameters ¾ Note : the equivalence holds only at the terminals of the source network, not within the network e.g. for Thévenin network, p = 0 when i = 0 for Norton Network, p = isc2 Rt when i = 0 Example 2.12 Thévenin Parameters from a v-i Curve 17 Figure 2.27 Example 2.13 Equivalent Source Network Figure 2.28 18 Thévenin Resistance z It has been known that voc and isc have clear physical interpretations. Here, we are v to discuss the physical interpretations of Rt = oc . isc z In Thévenin’s and Norton’s equivalent networks, ¾ If voc = 0 or isc = 0 , then the networks reduce to a source-free network with equivalent resistance Rt . Thus, The Thévenin resistance of a source network equals the equivalent resistance of that network when all independent sources have been suppressed. v = 0 : "independent" voltage source ⇒ short circuit i = 0 : "independent" current source ⇒ open circuit z Calculation of Rt : ¾ ¾ If no controlled sources are contained, the ladder structure of a source network can be reduced to Rt by series-parallel reduction. If controlled sources are contained, then Rt can be found using the method below. The “dead” source network is connected to an external test source ( vt or it ) v Rt = t it After finding Rt , then given isc , then voc = Rtisc , or given voc , then isc = voc Rt 19 Source Conversions z Since both Thévenin’s network and Norton’s network are equivalent to a source network, they are also equivalent to each other = z = voltage sources ( vs ) in series with resistance ( Rs ) = current sources ( is ) in parallel with resistance ( Rs ) where vs = Rtis , is = vs Rt ¾ ¾ Note : the arrow for the current source points in the direction of the higher potential end of the voltage source Source conversions may be applied to portions of a circuit or network to simplify intermediate calculations Note : when controlled sources are present, source conversions must not obliterate the identity of any control variables Example 2.15 Circuit Reduction by Source Conversions 20 Figure 2.34 Example 2.16 Thévenin Network via Source Conversions Figure 2.35 21