NCP4687
500 mA, High PSRR, LDO
Linear Voltage Regulator
The NCP4687 is a CMOS 500 mA LDO linear voltage regulator
with high output voltage accuracy which features a high ripple
rejection, low supply current with low dropout and chip enable with
built−in low RDS(on) NMOS transistor for fast output capacitor
discharging as option. The device is composed of the voltage reference
unit, error amplifier, resistor divider for output voltage sensing or
precise output voltage setting. The current limit and thermal shutdown
makes the device very suitable for industrial applications and portable
communication equipments.
Features
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 2.5 V to 5.25 V
Output Voltage Range: 0.7 to 3.6 V (available in 0.1 V steps)
±0.8% Output Voltage Accuracy @ Vout > 1.8 V
Output noise : 40 mVrms
Line Regulation: 0.02%/V
Current Limit Circuit
High PSRR: 75 dB at 1 kHz, 70 dB at 10 kHz
Thermal Shutdown
Available in SOT−23−5, SOT−89−5 and uDFN 1.2 x 1.2 mm
Packages
These Devices are Pb−Free and are RoHS Compliant
Typical Applications
•
•
•
•
Home Appliances, Industrial Equipment
DVB−T and DVB−S Receivers
Car Audio Equipment, Navigation Systems
Notebook Adaptors, LCD TVs, Cordless Phones and Private LAN
Systems
NCP4687x
VIN
VOUT
CE
SENSE
GND
MARKING
DIAGRAMS
1
XXX
XZZ
SOT89−5
CASE 528AB
XDFN6
CASE 711AH
1
XX
MM
XXXMM
SOT−23−5
CASE 1212
1
XX, XXX= Specific Device Code
ZZ
= Lot Code
MM
= Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
VOUT
VIN
C1
1.0 mF
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C2
1.0 mF
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2014
December, 2014 − Rev. 3
1
Publication Order Number:
NCP4687/D
NCP4687
NCP4687xxx
NCP4687Dxx
Vin
Vout
Vin
Vout
SENSE
SENSE
Vref
Vref
CE
CE
Current Limit &
Thermal Protection
Current Limit &
Thermal Protection
GND
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
SOT−23−5
Pin No.
SOT−89−5
Pin No.
DFN1212
1
4
6
VIN
Input pin
2
2
3
GND
Ground pin
3
3
4
CE
4
1
2
SENSE
5
5
1
VOUT
5
NC
Non Connected
*EP
EP
Exposed Pad (leave floating or connect to GND)
Pin Name
Description
Chip enable pin (“H” active)
Output Voltage Sensing
Output pin
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2
NCP4687
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
0−6
V
Output Voltage
VOUT
−0.3 to VIN − 0.3
V
Chip Enable Input
VCE
−0.3 − 6
V
Power Dissipation SOT−23−5
PD
420
mW
Input Voltage
Power Dissipation uDFN 1.2 x 1.2 mm
600
Power Dissipation SOT−89−5
900
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 125
°C
ESD Capability, Human Body Model (Note 1)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 1)
ESDMM
200
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, SOT−23−5
Thermal Resistance, Junction−to−Air
RqJA
238
°C/W
Thermal Characteristics, uDFN 1.2x1.2
Thermal Resistance, Junction−to−Air
RqJA
167
°C/W
Thermal Characteristics, SOT−89−5
Thermal Resistance, Junction−to−Air
RqJA
111
°C/W
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NCP4687
ELECTRICAL CHARACTERISTICS −40°C ≤ TA ≤ 85°C; CIN = COUT = 1.0 mF, unless otherwise noted. Typical values are at
TA = +25°C.
Parameter
Operating Input Voltage
Test Conditions
Symbol
Min
VOUT ≤ 1.5 V
VIN
Max
Unit
2.5
5.25
V
VOUT + 1
5.25
x0.992
x1.008
−40°C < Ta < 85°C, VOUT > 1.8 V
x0.985
x1.015
V
Ta = 25°C, VOUT ≤ 1.8 V
−18
+18
mV
−40°C < Ta < 85°C, VOUT ≤ 1.8 V
−55
+55
mV
VOUT > 1.5 V
Output Voltage
Output Voltage Temp.
Coefficient
Load Regulation
Line Regulation
Dropout Voltage
Ta = 25°C, VOUT > 1.8 V
−40°C < Ta < 85°C, VOUT > 1.8 V
±30
−40°C < Ta < 85°C, VOUT ≤ 1.8 V
±100
1 mA < IOUT ≤ 500 mA
LoadReg
1
Set VOUT + 0.5 V < VIN < 5.25 V
LineReg
VDO
Quiescent Current
0.02
0.1
%/V
0.58
0.88
V
0.8 V ≤ VOUT < 0.9 V
0.52
0.80
0.9 V ≤ VOUT < 1.0 V
0.45
0.70
1.0 V ≤ VOUT < 1.2 V
0.42
0.64
1.2 V ≤ VOUT < 1.4 V
0.35
0.53
1.4 V ≤ VOUT < 1.8 V
0.31
0.48
1.8 V ≤ VOUT < 2.1 V
0.27
0.41
2.1 V ≤ VOUT < 2.5 V
0.25
0.38
2.5 V ≤ VOUT < 3.0 V
0.23
0.34
3.0 V ≤ VOUT < 3.6 V
0.22
0.32
IOUT
VOUT = 0 V
IOUT = 0 mA
VOUT > 1.5 V
500
VIN = VIN max, VCE = 0 V
CE Pin Pull−Down Current
CE Pin Threshold Voltage
CE Input Voltage “H”
50
IQ
80
Output Noise Voltage
VOUT ≤ 2.0 V @ VIN = 3.0 V,
VOUT > 2.0 V @ VIN =
= Set VOUT + 1.0 V,
DVIN_PK−PK = 0.2 V,
IOUT = 30 mA
0.1
1.0
mA
IPD
0.3
0.6
mA
VIN
V
PSRR
f = 10 kHz
IOUT = 30 mA , f = 10 Hz to 100 kHz, VOUT > 1.8 V
1.0
VNOISE
dB
20 x
VOUT
mVrms
40 x
VOUT
Thermal Shutdown /
Hysteresis
VIN = 4.0 V, VCE = 0.0 V (Note 2)
0.4
75
70
IOUT = 30 mA, f = 10 Hz to 100 kHz, VOUT ≤ 1.8 V
Auto−discharge N−MOS
Resistance
mA
ISTB
VCEL
f = 1 kHz
mA
115
75
VCEH
CE Input Voltage “L”
Power Supply Rejection
Ratio
mA
ISC
VOUT ≤ 1.5 V
Standby Current
ppm/°C
mV
0.7 V ≤ VOUT < 0.8 V
IOUT = 500 mA
V
20
Output Current
Short Current Limit
VOUT
Typ
RDS(on)
165/65
°C
60
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2.
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NCP4687
TYPICAL CHARACTERISTICS
3
0.7
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
0.8
1.7 V
0.6
2.7 V
0.5
3.5 V
0.4
VIN = 1.4 V
0.3
0.2
0.1
0
100
200
300
400
500
600
700
3.5 V
1
3.0 V
0.5
0
100
200
400
500
600
700
800
IOUT, OUTPUT CURRENT (mA)
Figure 3. Output Voltage vs. Output Current
0.7 V Version
Figure 4. Output Voltage vs. Output Current
2.5 V Version
900
0.8
3.5
VIN = 4.1 V
3
4.6 V
2.5
2
1.5
1
0.5
0.7
0.6
0.5
0.4
1 mA
0.3
30 mA
0.2
IOUT = 50 mA
0.1
0
0
100
200
300
400
500
600
700
0
800
1
2
3
4
5
6
IOUT, OUTPUT CURRENT (mA)
VIN, INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Output Current
3.6 V Version
Figure 6. Output Voltage vs. Input Voltage 0.7 V
Version
3
VOUT, OUTPUT VOLTAGE (V)
4
2.5
2
1.5
1
1 mA
30 mA
0.5
3.5
3
2.5
2
1.5
1 mA
1
30 mA
IOUT = 50 mA
0.5
IOUT = 50 mA
0
300
IOUT, OUTPUT CURRENT (mA)
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
1.5
800
4
VOUT, OUTPUT VOLTAGE (V)
VIN = 4.0 V
2
0
0
0
2.5
0
1
2
3
4
VIN, INPUT VOLTAGE (V)
5
0
6
Figure 7. Output Voltage vs. Input Voltage 2.5 V
Version
0
1
2
3
4
VIN, INPUT VOLTAGE (V)
5
6
Figure 8. Output Voltage vs. Input Voltage 3.6 V
Version
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5
NCP4687
TYPICAL CHARACTERISTICS
2.55
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
0.72
0.71
0.7
0.69
0.68
0.67
−50
−25
0
25
50
75
2.47
−25
0
25
50
75
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Output Voltage vs. Temperature,
0.7 V Version
Figure 10. Output Voltage vs. Temperature,
2.5 V Version
VDO, DROPOUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
2.49
100
0.7
3.61
3.6
3.59
3.58
3.57
−50
−25
0
25
50
75
0.6
25°C
0.5
85°C
0.4
0.3
−40°C
0.2
0.1
0
100
0
100
200
300
400
500
TJ, JUNCTION TEMPERATURE (°C)
IOUT, OUTPUT CURRENT (mA)
Figure 11. Output Voltage vs. Temperature,
3.6 V Version
Figure 12. Dropout Voltage vs. Output Current,
0.7 V Version
0.3
0.25
VDO, DROPOUT VOLTAGE (V)
VDO, DROPOUT VOLTAGE (V)
2.51
2.45
−50
100
3.62
0.25
25°C
0.2
85°C
0.15
0.1
−40°C
0.05
0
2.53
0
100
200
300
400
IOUT, OUTPUT CURRENT (mA)
500
Figure 13. Dropout Voltage vs. Output Current,
2.5 V Version
0.2
25°C
85°C
0.15
0.1
−40°C
0.05
0
0
100
200
300
400
IOUT, OUTPUT CURRENT (mA)
500
Figure 14. Dropout Voltage vs. Output Current,
3.6 V Version
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NCP4687
TYPICAL CHARACTERISTICS
120
Iq, QUIESCENT CURRENT (mA)
Iq, QUIESCENT CURRENT (mA)
100
80
60
40
20
0
1
2
3
4
5
60
40
20
6
0
1
2
3
4
5
VIN, INTPUT VOLTAGE (V)
VIN, INTPUT VOLTAGE (V)
Figure 15. Quiescent Current vs. Input
Voltage, 0.7 V Version
Figure 16. Quiescent Current vs. Input
Voltage, 2.5 V Version
6
100
140
90
120
150 mA
50 mA
80
100
IOUT = 1 mA
70
PSRR (dB)
Iq, QUIESCENT CURRENT (mA)
80
0
0
80
60
60
300 mA
50
40
40
30
20
20
10
0
0
1
2
3
4
5
100
6
1k
10k
100k
VIN, INTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 17. Quiescent Current vs. Input
Voltage, 3.6 V Version
Figure 18. PSRR vs. Frequency, 0.7 V Version
100
1M
100
90
90
150 mA
80
150 mA
80
70
300 mA
60
PSRR (dB)
70
PSRR (dB)
100
IOUT = 1 mA
50
40
30
60
300 mA
50
40
50 mA
30
50 mA
20
IOUT = 1 mA
20
10
100
10
1k
10k
FREQUENCY (Hz)
100k
1M
100
Figure 19. PSRR vs. Frequency, 2.5 V Version
1k
10k
FREQUENCY (Hz)
100k
Figure 20. PSRR vs. Frequency, 3.6 V Version
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1M
NCP4687
TYPICAL CHARACTERISTICS
2.0
4.0
1.8
3.5
3.0
VN (mVrms/√Hz)
1.4
1.2
1.0
0.8
0.6
2.5
2.0
1.5
1.0
0.4
0.5
0.2
100
1k
10k
100k
1M
0.0
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Output Noise vs. Frequency, 0.7 V
Version
Figure 22. Output Noise vs. Frequency, 2.5 V
Version
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
Figure 23. Output Noise vs. Frequency, 3.6 V
Version
3.2
2.7
2.2
1.7
0.710
VIN (V)
10
VN (mVrms/√Hz)
0.0
VOUT (V)
VN (mVrms/√Hz)
1.6
0.705
0.700
0.695
0.690
0.685
0.680
0
4
8
12
16
20
24
28
32
36
t (ms)
Figure 24. Line Transients, 0.7 V Version
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8
40
1M
NCP4687
TYPICAL CHARACTERISTICS
5.0
4.5
4.0
2.510
VIN (V)
VOUT (V)
3.5
2.505
2.500
2.495
2.490
2.485
2.480
0
4
8
12
16
20
24
28
32
36
40
t (ms)
Figure 25. Line Transients, 2.5 V Version
6.1
5.6
5.1
VIN (V)
VOUT (V)
4.6
3.610
3.605
3.600
3.595
3.590
3.585
3.580
0
4
8
12
16
20
24
28
32
36
40
t (ms)
Figure 26. Line Transients, 3.6 V Version
600
400
200
0.74
IOUT (mA)
VOUT (V)
0
0.72
0.70
0.68
0.66
0.64
0.62
0
10
20
30
40
50
60
70
80
90
100
t (ms)
Figure 27. Load Transients, 0.7 V Version, Load
Step 1 mA to 400 mA
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NCP4687
TYPICAL CHARACTERISTICS
600
400
200
IOUT (mA)
VOUT (V)
0
2.54
2.52
2.50
2.48
2.46
2.44
2.42
0
10
20
30
40
50
60
70
80
90
100
t (ms)
Figure 28. Load Transients, 2.5 V Version, Load
Step 1 mA to 400 mA
600
400
200
3.64
IOUT (mA)
VOUT (V)
0
3.62
3.60
3.58
3.56
3.54
3.52
0
10
20
30
40
50
60
70
80
90
100
t (ms)
Figure 29. Load Transients, 3.6 V Version, Load
Step 1 mA to 400 mA
150
100
50
0
0.710
IOUT (mA)
VOUT (V)
0.715
0.705
0.700
0.695
0.690
0.685
0.680
0
10
20
30
40
50
t (ms)
60
70
80
90
100
Figure 30. Load Transients, 0.7 V Version, Load
Step 50 mA to 100 mA
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NCP4687
TYPICAL CHARACTERISTICS
150
100
50
0
2.510
IOUT (mA)
VOUT (V)
2.515
2.505
2.500
2.495
2.490
2.485
2.480
0
10
20
30
40
50
60
70
80
90
100
t (ms)
Figure 31. Load Transients, 2.5 V Version, Load
Step 50 mA to 100 mA
150
100
50
0
3.610
IOUT (mA)
VOUT (V)
3.615
3.605
3.600
3.595
3.590
3.585
3.580
0
10
20
30
40
50
t (ms)
60
70
80
90
100
Figure 32. Load Transients, 3.6 V Version, Load
Step 50 mA to 100 mA
3.75
Chip Enable
2.5
1.25
VCE (V)
VOUT (V)
0
0.8
0.6
IOUT = 1 mA
0.4
IOUT = 100 mA
0.2
IOUT = 400 mA
0.0
−0.2
0
50
100
150
t (ms)
200
250
Figure 33. Turn On with CE Behavior, 0.7 V
Version
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11
300
NCP4687
TYPICAL CHARACTERISTICS
5.25
Chip Enable
3.5
1.75
2.0
VCE (V)
VOUT (V)
0
2.5
IOUT = 1 mA
1.5
1.0
IOUT = 100 mA
0.5
IOUT = 400 mA
0.0
−0.5
0
50
100
150
t (ms)
200
250
300
Figure 34. Turn On with CE Behavior, 2.5 V
Version
6
4
Chip Enable
2
VCE (V)
VOUT (V)
0
4.0
3.0
IOUT = 1 mA
IOUT = 100 mA
2.0
1.0
IOUT = 400 mA
0.0
−1.0
0
50
100
150
t (ms)
200
250
300
Figure 35. Turn On with CE Behavior, 3.6 V
Version
3.75
2.5
1.25
0
VCE (V)
VOUT (V)
Chip Enable
0.8
IOUT = 1 mA
0.6
0.4
IOUT = 100 mA
0.2
0.0
−0.2
IOUT = 500 mA
0.0
0.1
0.2
0.3
0.4
0.5 0.6
t (ms)
0.7
0.8
0.9
Figure 36. Turn Off with CE Behavior, 0.7 V
Version
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12
1.0
NCP4687
TYPICAL CHARACTERISTICS
5.25
3.5
1.75
0
2.5
2.0
VCE (V)
VOUT (V)
Chip Enable
IOUT = 1 mA
1.5
IOUT = 100 mA
1.0
0.5
0.0
−0.5
IOUT = 500 mA
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
t (ms)
Figure 37. Turn Off with CE Behavior, 2.5 V
Version
6.9
4.6
2.3
4
0.0
VCE (V)
VOUT (V)
Chip Enable
IOUT = 1 mA
3
2
IOUT = 100 mA
1
0
−1
IOUT = 500 mA
0.0
0.1
0.2
0.3
0.4
0.5 0.6
t (ms)
0.7
0.8
0.9
Figure 38. Turn Off with CE Behavior, 3.6 V
Version
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13
1.0
NCP4687
APPLICATION INFORMATION
down current source which assure off state of LDO in case
the CE pin will stay floating. If the enable function is not
needed connect CE pin to VIN.
The D version of the NCP4687 device includes a
transistor between VOUT and GND that is used for faster
discharging of the output capacitor. This function is
activated when the IC goes into disable mode.
A typical application circuit for NCP4687 series is shown
in the Figure 39.
NCP4687x
VOUT
VIN
VOUT
VIN
SENSE
CE
C1
1.0 mF
GND
C2
1.0 mF
Thermal Consideration
As a power across the IC increase, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature increase for the
part. When the device has good thermal conductivity
through the PCB the junction temperature will be relatively
low in high power dissipation applications.
The IC includes internal thermal shutdown circuit that
stops operation of regulator, if junction temperature is
higher than 165°C. After that, when junction temperature
decreases below 100°C, the operation of voltage regulator
would restart. While high power dissipation condition is, the
regulator starts and stops repeatedly and protects itself
against overheating.
Figure 39. Typical Application Schematic
Input Decoupling Capacitor (C1)
A 1.0 mF ceramic input decoupling capacitor should be
connected as close as possible to the input and ground pin of
the NCP4687 device. Higher values and lower ESR
improves line transient response.
Output Decoupling Capacitor (C2)
A 1.0 mF ceramic output decoupling capacitor is sufficient
to achieve stable operation of the device. If tantalum
capacitor is used, and its ESR is high, the loop oscillation
may result. The capacitor should be connected as close as
possible to the output and ground pin. Larger values and
lower ESR improves dynamic parameters.
Sense Pin
The SENSE pin improves significantly the load
regulation. The connection resistance between the LDO and
the load given by PCB parameters has reduced impact to
load regulation. If possible, use wide PCB traces as short as
possible.
Enable Operation
The enable pin CE may be used for turning the regulator
on and off. The IC is switched on when a high level voltage
is applied to the CE pin. The enable pin has an internal pull
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NCP4687
ORDERING INFORMATION
Marking
Nominal Output
Voltage
Feature
Package
Shipping†
NCP4687DH12T1G
A12D
1.2 V
Auto discharge
SOT−89
(Pb−Free)
1000 / Tape & Reel
NCP4687DH15T1G
A15D
1.5 V
Auto discharge
SOT−89
(Pb−Free)
1000 / Tape & Reel
NCP4687DH18T1G
A18D
1.8 V
Auto discharge
SOT−89
(Pb−Free)
1000 / Tape & Reel
NCP4687DH25T1G
A25D
2.5 V
Auto discharge
SOT−89
(Pb−Free)
1000 / Tape & Reel
NCP4687DH33T1G
A33D
3.3 V
Auto discharge
SOT−89
(Pb−Free)
1000 / Tape & Reel
NCP4687DMX18TCG
9P
1.8 V
Auto discharge
XDFN6
(Pb−Free)
5000 / Tape & Reel
NCP4687DMX25TCG
9X
2.5 V
Auto discharge
XDFN6
(Pb−Free)
5000 / Tape & Reel
NCP4687DMX33TCG
0G
3.3 V
Auto discharge
XDFN6
(Pb−Free)
5000 / Tape & Reel
NCP4687DSN18T1G
J18
1.8 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4687DSN25T1G
J25
2.5 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4687DSN28T1G
J28
2.8 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
http://onsemi.com
15
NCP4687
PACKAGE DIMENSIONS
SOT−23 5−LEAD
CASE 1212
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSIONS: MILLIMETERS.
3. DATUM C IS THE SEATING PLANE.
A
A
5
A2
0.05 S
B
D
A1
4
E
1
L1
2
L
3
5X
e
E1
b
0.10
C
M
C B
S
A
S
C
RECOMMENDED
SOLDERING FOOTPRINT*
3.30
DIM
A
A1
A2
b
c
D
E
E1
e
L
L1
5X
0.85
5X
0.95
PITCH
0.56
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
16
MILLIMETERS
MIN
MAX
--1.45
0.00
0.10
1.00
1.30
0.30
0.50
0.10
0.25
2.70
3.10
2.50
3.10
1.50
1.80
0.95 BSC
0.20
--0.45
0.75
NCP4687
PACKAGE DIMENSIONS
XDFN6 1.20x1.20, 0.40P
CASE 711AH
ISSUE O
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM TERMINAL TIPS.
4. COPLANARITY APPLIES TO ALL OF THE
TERMINALS.
A
B
D
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
DIM
A
A1
b
D
D2
E
E2
e
L
L1
0.05 C
2X
0.05 C
2X
TOP VIEW
A
0.05 C
0.05 C
A1
SIDE VIEW
NOTE 4
C
MILLIMETERS
MIN
MAX
--0.40
0.00
0.05
0.13
0.23
1.20 BSC
0.89
0.99
1.20 BSC
0.25
0.35
0.40 BSC
0.15
0.25
0.05 BSC
RECOMMENDED
MOUNTING FOOTPRINT*
SEATING
PLANE
1.00
6X
0.40
PACKAGE
OUTLINE
D2
1
3
1.40
E2
6X
0.36
L
0.40
PITCH
6
4
DIMENSIONS: MILLIMETERS
6X
e
b
0.05
BOTTOM VIEW
6X
0.24
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
C A B
NOTE 3
http://onsemi.com
17
NCP4687
PACKAGE DIMENSIONS
SOT−89, 5 LEAD
CASE 528AB
ISSUE O
D
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. LEAD THICKNESS INCLUDES LEAD FINISH.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
5. DIMENSIONS L, L2, L3, L4, L5, AND H ARE MEASURED AT DATUM PLANE C.
H
DIM
A
b
b1
c
D
D2
E
e
H
L
L2
L3
L4
L5
1
TOP VIEW
c
A
0.10 C
C
SIDE VIEW
e
b1
RECOMMENDED
MOUNTING FOOTPRINT*
e
b
L2
4X
L
1
2
L3
L4
0.57
1.75
3
L5
5
MILLIMETERS
MIN
MAX
1.40
1.60
0.32
0.52
0.37
0.57
0.30
0.50
4.40
4.60
1.40
1.80
2.40
2.60
1.40
1.60
4.25
4.45
1.10
1.50
0.80
1.20
0.95
1.35
0.65
1.05
0.20
0.60
2.79
1.50
0.45
4.65
4
D2
1.65
1.30
1
BOTTOM VIEW
2X
0.62
2X
1.50
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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18
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NCP4687/D