Primo Workshop Nazionale:
La Componentistica Nazionale per lo Spazio:
stato dell’arte, sviluppi e prospettive
18-2 0 Gennaio 2016
S PA C E T E C H N O L O G I E S :
‐ Q / V B A N D L N A M O D U L E F O R S PA C E A P P L I C AT I O N S
‐ KU BAND MMIC VCO WITH ENHANCED LINEARITY
January 20, 2016
University of L’Aquila
L. Pantoli, G. Leuzzi
Dept. Industrial and Information Engineering and Economics
Thales Alenia
Space Italia
A. Barigelli, F. Vitulli, A. Suriani
Via Saccomuro, 24 ‐ Rome, Italy
Index
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Index
Outline
 Definition of an LNA Module for future space applications
 Analysis and design of Low Noise Amplifiers in Q/V band
‐ Specifications
‐ Circuits topologies and characterization
‐ Simulations and performance
 On Jig Measurements
 Definition of a Ku band VCO with enhanced linearity.
 Linearization scheme
 VCO structure
 Results and measurements
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The LNA Module
Scenario
Current imitations of the Ka‐band systems concern the simultaneous use of the same band for both user links and feeder links. In this scenario, the prospect to adopt the Q/V‐band in future broadband telecommunication satellites will bring several advantages, enabling full use of the Ka‐band for users.
The proposed LNA module has been conceived as a hybrid solution for future Q/V‐band space systems in which low noise characteristics, high linearity, robustness and compactness are the main driving factors. UMS offers a new process dedicated to millimeter wave applications, the PH10, a 0.1 μm gate length process in GaAs pHEMT Technology with a typical Ft of 130GHz. Index
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The LNA Module
Requirements
Frequency Band
Input Power Level
Overdrive survivability Noise Figure
Gain
42 to 52 GHz
‐95 to ‐45dBm
‐35 dBm
2.5 dB 45±1 dB Gain Stability over temperature <1.5 dBpp
Gain Stability over frequency
<1.5 dBpp
Input and Output Return Loss
>20dB DC Power
250mW
Third Order Intercept point +23dBm
Temperature Range Mass ‐30 to 70 degree
400gr.
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The LNA configuration
Specifications
Three different MMICs have been designed:
and the following configuration has been analyzed:
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Bond wires characterization
Interconnections
Full EM analyses have been performed on the Au 18um bond wires with CST Studio and an equivalent, scalable, electrical model has been extracted and included in the electrical simulations.
GaAs
The model takes into account of:
‐ Number of wires
‐ Wire length
‐ Distance between RF pads
MLIN
PORT1
MLEFX
MLEFX
CAP
MMIC LNA W
Alumina
MLIN
PORT2
BWIRES2
50Ω
GaAs
GaAs
50Ω
CAP
MMIC MLA
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MMICs electrical characteristics
Performance
LNA /LNAW performance
Freq. Range
Gain Vd (single bias)
Vg (single bias)
ΔGain vs. freq. 42‐48GHz ΔGain vs. freq. 47.2‐50.2 GHz
Noise figure P‐1dB IP3
Input matching:
Output matching:
DC current
Temperature range Dimensioni:
42.0 – 52.0Ghz
16.5dB
2.25 V
0 V
0.1dBpp
0.1dBpp
1.9 dB
6 dBm
>21dBm
< ‐11dB
< ‐11dB
39mA
‐30 to 70°C
1x3 mm
MLA performance
Freq. Range
Gain Vd (single bias)
Vg (single bias)
ΔGain vs. freq. 42‐48GHz ΔGain vs. freq. 47.2‐50.2GHz Noise figure P‐1dB IP3
Input matching:
Output matching:
DC current
Temperature range Dimensioni:
42 – 52.0Ghz
18dB
2.25 V
0 V
0.4dBpp
0.4dBpp
2.8 dB
11dBm
23dBm
< ‐15dB
< ‐15dB
60mA
‐30 to 70°C
1x3 mm
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MMIC LNA
Layout example
All the DC bias lines are realized with quarter‐wave stubs at the operating frequency
Pad for the Gate control voltage
Bias Pad
Gate pad grounded through a resistor
Resistors preventing RF feedback loop Stabilization networks
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MMIC Stability analysis
Solutions
The local and global stability of each MMIC have been analyzed and ensured
with Platzker method and Gamma Probe analysis.
All the Amplifiers share the same topology for the ancillary passive
components which encircle the Active Device.
The general stabilization scheme is here reported.
R and C have effect at medium and low frequencies, while RG and RD , coupled with their shunt capacitances, stabilize at very low frequency and prevent or properly attenuate any unwanted feedback of RF signals.
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S21, S11, S22, NF [dB]
S21, S11, S22, NF [dB]
MMIC performance
25
LNA
20
15
10
5
0
-5
-10
-15
-20
-25
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
S21
measured S-parameters
S11
S22
NF
1,90dB
LNAW
35
40
S21
45
Freq [GHz]
S11
50
S22
55
60
55
60
NF
2.9dB
MLA
30
35
40
45
Freq [GHz]
50
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On Jig Measurements
Measurements setup
A first characterization of the LNA chain has been performed on the system
LNAW+MLA using a Test‐Jig already available and operating in the frequency
Band 47‐50GHz.
The two MMICs have been directly connected by bond wires; an Isolator has
been used at the input port of the Test‐Jig and Transitions have been
connected at both the RF ports for measurements.
Trn WR22-WR19
Isolator
Trn WR22-WR19
Test-Jig
Trn Guide-Coax
Trn Guide-Coax
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On Jig Measurements
Noise Figure
The Noise Figure of the proposed setup has been measured and the
contributions of the transitions Guide‐Coax and TR22‐TR19 have been de‐
embedded in order to obtain the NF provided by the system Isolator and Test‐
Jig.
A final NF between 2.85 e 3.15dB has been obtained.
These values include a noise contribution of 0.25dB
accountable to the Isolator and of 0.55dB due to the Guide‐to‐Microstrip Transition inside the Test‐Jig. Index
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On Jig Measurements
S-Parameters
Pout [dBm]
Measured S‐Parameters and power transfer function provided by the system
Isolator and Test‐Jig.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
11,86
12,10
P-1dB @47GHz
P-1dB @50GHz
Pout @47GHz
Pout @50GHz
-28 -26 -24 -22 -20 -18 -16 -14 -12
Pin [dBm]
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The Ku band MMIC VCO Scenario
The straightforward approach to synthesize signals consists in obtaining the desired tone by frequency multiplication of a clean reference signal. However, due to the complexity of some systems, an alternative approach is becoming preferable and it consists in the use of Phase Locked Loops (PLL) based on frequency synthesizer and VCO directly available on‐chip. This choice offers clear advantages for what concerning size, flexibility and cost, but at the same time it requires strictly performances from the integrated components. The designed VCO provides improved electrical performance thanks to the introduction of an innovative linearization circuit and of an integrated output buffering section.
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The Ku band MMIC VCO
Performance
Frequency Band
Tuning range
10.52 to 12.53 GHz
16%
Tuning voltage
0 ‐ 10 V
Output power
8dBm
Gain variation
<1 dBpp
Harmonics level
‐50dBc
PN@100kHz [dBc/Hz]
‐98 dBc/Hz
PN@1MHz [dBc/Hz]
‐122 dBc/Hz
Max sensitivity
300 MHz/V
Total power consumption
440mW
Temperature Range ‐30 to 70 degree
Size
2.2mm x 4.3mm
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Linearization approach
Block scheme
Vctrl
Vout
Linearization Circuit
fout
VCO
B
A
fout
Vout
C
fout
The idea concerns the pre‐distorsion of the tuning voltage that allows to improve the operational bandwidth of the VCO providing a linear relationship in a wider tuning range between the frequency of the synthesized signal and the input control signal.
A
B
C
Vout
Vctrl
Vctrl
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Linearization approach
Circuit details
The output voltage is obtained with a resistive divider at the emitter terminal of T1, and the values of RL1 and RL2 can be set, in order to determine the desired slope of Vout, after the relation:
Vout
Vemitter
R L2
∙
R L1 R L2
8
7
Vout [V]
6
RL1 ↓
RL2 ↑
5
4
3
2
RL1 ↑
RL2 ↓
1
0
0
1
2
3
4
5
6
Vctrl
7
8
9
10 11
The use of the diode‐connected transistor T2 in series with T1, provide a suitable compensation to circuit variations due to thermal effects.
The measured temperature dependency in the range from ‐30°C to +70°C is less than 0.1mV/°C in the full bandwidth.
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VCO structure
Circuit details
Resonator
@fo
Clapp osc.
@fo
Output combiner
Linearizer
 A push‐push architecture has been selected for the VCO circuit.
 Each oscillator is based on a Clapp configuration.
 The input resonators are realized with variable diodes in anti‐series configuration coupled with passive inductors. Resonator
@fo
Clapp osc.
@fo
Output Buffer
@2fo
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VCO structure
Circuit details
The MMIC VCO has been realized in HBT Technology with the HB20M process provided by UMS Foundry.
The Transistor has been biased in order to reach a Negative Resistance as lower as possible and connected in common emitter configuration.
Oscillator topology foresees the possibility to bias the Monolithics either symmetrically or asymmetrically.
In order to avoid the onset of spurious frequencies, a fully stability analysis has been performed by means of both differential nonlinear probes and conversion matrix methods. Compensation network has been added accordingly to suppress even and odd mode spurious oscillations.
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Results and measurements
Oscillation frequency
The oscillation frequency as a function of the tuning voltage and temperature is shown and compared with simulation. The tuning range is about the 16%.
The chip has been measured in the range ‐30°C÷70°C showing a maximum frequency variation of the output signal of 70MHz.
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Results and measurements
Sensitivity
The average sensitivity is 200MHz/V, with a maximum value of 300MHz/V for the lowest value of the control voltage. The maximum temperature dependence measured in the range ‐30°C÷70°C is 30MHz/V.
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Results and measurements
Phase Noise
The measured phase noise is ‐98.5dBc/Hz at 100kHz offset for a reference frequency of 11.7GHz.
Also the phase noise shows a limited temperature dependence. f0 = 11.7GHz
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Conclusions
 The design of a state‐of‐the‐art LNA Module in Q/V band is presented and addressed with circuitry details.
 The complete LNA Demonstrator is currently under construction with the integration of 4 MMICs, temperature‐depended attenuators, a WG isolator and novel microstrip‐to‐waveguide transitions designed in LTCC.  The design of a MMIC VCO with enhanced characteristics of linearity and sensitivity and a low temperature dependence is also provided.  A new PLL module which embeds the designed VCO for new generation on‐
board equipment and satellite communications is currently under test.
mail: leonardo.pantoli@univaq.it