Data Sheet No. PD60017 Rev.Q
IR2125(S) & (PbF)
CURRENT LIMITING SINGLE CHANNEL DRIVER
Features
Product Summary
• Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
Fully operational to +500V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 12 to 18V
Undervoltage lockout
Current detection and limiting loop to limit driven
power transistor current
Error lead indicates fault conditions and programs
shutdown time
Output in phase with input
2.5V, 5V and 15V input logic compatible
Also available LEAD-Free
VOFFSET
500V max.
IO+/-
1A / 2A
VOUT
12 - 18V
VCSth
230 mV
ton/off (typ.)
150 & 150 ns
Packages
Description
The IR2125(S) is a high voltage, high speed power
MOSFET and IGBT driver with over-current limiting
protection circuitry. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with
16-Lead SOIC
8-Lead PDIP
standard CMOS or LSTTL outputs, down to 2.5V
(Wide Body)
logic. The output driver features a high pulse current
buffer stage designed for minimum driver cross-conduction. The protection circuitry detects over-current in the
driven power transistor and limits the gate drive voltage. Cycle by cycle shutdown is programmed by an external
capacitor which directly controls the time interval between detection of the over-current limiting conditions and
latched shutdown. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high
or low side configuration which operates up to 500 volts.
Typical Connection
(Refer to Lead Assignments
for correct pin configuration). This/These diagram(s)
show electrical connections
only. Please refer to our
Application Notes and
DesignTips for proper circuit
board layout.
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1
IR2125(S) & (PbF)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
VB
High Side Floating Supply Voltage
Min.
Max.
-0.3
525
VS
High Side Floating Offset Voltage
VB - 25
VB + 0.3
VHO
High Side Floating Output Voltage
VS - 0.3
VB + 0.3
VCC
Logic Supply Voltage
-0.3
25
VIN
Logic Input Voltage
-0.3
VCC + 0.3
VERR
Error Signal Voltage
-0.3
VCC + 0.3
VCS
Current Sense Voltage
VS - 0.3
VB + 0.3
dVs/dt
PD
RthJA
Allowable Offset Supply Voltage Transient
—
50
Package Power Dissipation @ TA ≤ +25°C (8 lead PDIP)
—
1.0
(16 lead SOIC)
—
1.25
(8 lead PDIP)
—
125
(16lLead SOIC)
—
100
Thermal Resistance, Junction to Ambient
TJ
Junction Temperature
—
150
TS
Storage Temperature
-55
150
TL
Lead Temperature (Soldering, 10 seconds)
—
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
Definition
Min.
Max.
VB
High Side Floating Supply Voltage
VS + 12
VS + 18
VS
High Side Floating Offset Voltage
Note 1
500
VHO
High Side Floating Output Voltage
VS
VB
VCC
Logic Supply Voltage
0
18
VIN
Logic Input Voltage
0
VCC
VERR
Error Signal Voltage
0
VCC
VCS
Current Sense Signal Voltage
VS
VB
TA
Ambient Temperature
-40
125
Units
V
°C
Note 1: Logic operational for VS of -5 to +500V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
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IR2125(S) & (PbF)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 3300 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Figures 3 through 6.
Symbol
ton
t off
t sd
tr
tf
t cs
terr
Definition
Turn-On Propagation Delay
Turn-Off Propagation Delay
ERR Shutdown Propagation Delay
Turn-On Rise Time
Turn-Off Fall Time
CS Shutdown Propagation Delay
CS to ERR Pull-Up Propagation Delay
Figure Min. Typ. Max. Units Test Conditions
7
8
9
10
11
12
13
—
—
—
—
—
—
—
170
200
1.7
43
26
0.7
9.0
240
270
2.2
60
35
1.2
12
ns
VIN = 0 & 5V
VS = 0 to 600V
µs
ns
µs
CERR = 270 pF
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to VS.
Symbol
Definition
VIH
VIL
14
15
16
17
18
19
20
21
22
23
24
25
26
27
2.2
—
150
130
—
—
—
—
—
—
—
—
—
8.5
—
—
230
210
—
—
—
400
700
4.5
—
4.5
—
9.2
—
0.8
320
300
100
100
50
1000
1200
10
1.0
10
1.0
10.0
28
7.7
8.3
9.0
29
8.3
8.9
9.6
30
7.3
8.0
8.7
IERR
Logic “1” Input Voltage
Logic “0” Input Voltage
CS Input Positive Going Threshold
CS Input Negative Going Threshold
High Level Output Voltage, VBIAS - VO
Low Level Output Voltage, VO
Offset Supply Leakage Current
Quiescent VBS Supply Current
Quiescent VCC Supply Current
Logic “1” Input Bias Current
Logic “0” Input Bias Current
“High” CS Bias Current
“Low” CS Bias Current
VBS Supply Undervoltage Positive Going
Threshold
VBS Supply Undervoltage Negative Going
Threshold
VCC Supply Undervoltage Positive Going
Threshold
VCC Supply Undervoltage Negative Going
Threshold
ERR Timing Charge Current
31
65
100
130
IERR+
ERR Pull-Up Current
32
8.0
15
—
IERRIO+
ERR Pull-Down Current
Output High Short Circuit Pulsed Current
33
34
16
1.0
30
1.6
—
—
I O-
Output Low Short Circuit Pulsed Current
35
2.0
3.3
—
VCSTH+
VCSTHV OH
V OL
ILK
IQBS
I QCC
IIN+
IINICS+
ICSVBSUV+
VBSUVVCCUV+
VCCUV-
Figure Min. Typ. Max. Units Test Conditions
V
mV
µA
V
µA
mA
A
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IO = 0A
IO = 0A
VB = VS = 500V
VIN = VCS = 0V or 5V
VIN = VCS = 0V or 5V
VIN = 5V
VIN = 0V
VCS = 3V
VCS = 0V
VIN = 5V, VCS = 3V
ERR < VERR+
VIN = 5V, VCS = 3V
ERR > VERR+
VIN = 0V
VO = 0V, VIN = 5V
PW ≤ 10 µs
VO = 15V, VIN = 0V
PW ≤ 10 µs
3
IR2125(S) & (PbF)
Functional Block Diagram
Y:Z
:?X
[
Y:Z
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Lead Definitions
Symbol
Description
VCC
IN
ERR
Logic and gate drive supply
Logic input for gate driver output (HO), in phase with HO
Serves multiple functions; status reporting, linear mode timing and cycle by cycle logic
shutdown
Logic ground
High side floating supply
High side gate drive output
High side floating supply return
Current sense input to current sense comparator
COM
VB
HO
VS
CS
Lead Assignments
1
1
V CC
VB
3
IN
HO
7
3
ERR
CS
6
4
COM
VS
5
8 Lead PDIP
IR2125
4
VB
IN
HO 14
ERR
COM
CS 13
VS 12
2
8
2
Vcc
4
5
Part Number
16
15
6
11
7
10
8
9
16 Lead SOIC (Wide Body)
IR2125S
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IR2125(S) & (PbF)
HV=10 to 600V
ERR
t sd
HO
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5
500
500
400
400
Turn-On Time (ns)
Turn-On Delay Time (ns)
IR2125(S) & (PbF)
300
200
Max.
300
Max.
200
Typ.
Typ.
100
100
0
0
-50
-25
0
25
50
75
100
10
125
12
Figure 7A. Turn-On Time vs. Temperature
16
18
20
Figure 7B. Turn-On Time vs. Voltage
500
500
400
400
Turn-Off Time (ns)
Turn-Off Delay Time (ns)
14
VBIAS Supply Voltage (V)
Temperature (°C)
300
200
300
Max.
200
Typ.
Max.
Typ.
100
100
0
0
-50
-25
0
25
50
75
100
125
10
12
Temperature (°C)
Figure 8A. Turn-Off Time vs. Temperature
ERR to Output Shutdown Delay Time (µs)
ERR to Output Shutdown Delay Time (µs)
18
20
5.00
4.00
3.00
Max.
Typ.
1.00
0.00
4.00
3.00
2.00
1.00
Max.
Typ.
0.00
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 9A. ERR to Output Shutdown vs. Temperature
6
16
Figure 8B. Turn-Off Time vs. Voltage
5.00
2.00
14
VBIAS Supply Voltage (V)
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 9B. ERR to Output Shutdown vs. Voltage
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IR2125(S) & (PbF)
100
100
80
80
60
Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
Max.
Max.
Typ.
40
20
60
Typ.
40
20
0
0
-50
-25
0
25
50
75
100
10
125
12
Figure 10A. Turn-On Rise Time vs. Temperature
16
18
20
Figure 10B. Turn-On Rise Time vs. Voltage
100
100
80
80
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
14
VBIAS Supply Voltage (V)
Temperature (°C)
60
40
Max.
60
Max.
40
Typ.
Typ.
20
20
0
0
-50
-25
0
25
50
75
100
125
10
12
Figure 11A. Turn-Off Fall Time vs. Temperature
18
20
2.00
CS to Output Shutdown Delay Time (µs)
CS to Output Shutdown Delay Time (µs)
16
Figure 11B. Turn-Off Fall Time vs. Voltage
2.00
1.60
1.20
14
VBIAS Supply Voltage (V)
Temperature (°C)
Max.
0.80
Typ.
0.40
1.60
Max.
1.20
Typ.
0.80
0.40
0.00
0.00
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 12A. CS to Output Shutdown vs. Temperature
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10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 12B. CS to Output Shutdown vs. Voltage
7
IR2125(S) & (PbF)
20.0
CS to ERR Pull-Up Delay Time (µs)
CS to ERR Pull-Up Delay Time (µs)
20.0
16.0
Max.
12.0
Typ.
8.0
4.0
0.0
16.0
12.0
M ax.
Typ.
8.0
4.0
0.0
-50
-25
0
25
50
75
100
125
10
12
5.00
5.00
4.00
4.00
3.00
Min.
2.00
1.00
20
3.00
Min.
2.00
0.00
-50
-25
0
25
50
75
100
125
10
12
Temperature (°C)
14
16
18
20
VCC Logic Supply Voltage (V)
Figure 14A. Logic “1” Input Threshold vs.
Temperature
Figure 14B. Logic “1” Input Threshold vs. Voltage
5.00
5.00
4.00
4.00
Logic "0" Input Threshold (V)
Logic "0" Input Threshold (V)
18
1.00
0.00
3.00
2.00
3.00
2.00
1.00
Max.
0.00
Max.
0.00
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 15A. Logic “0” Input Threshold vs.
Temperature
8
16
Figure 13B. CS to ERR Pull-Up vs. Voltage
Logic "1" Input Threshold (V)
Logic "1" Input Threshold (V)
Figure 13A. CS to ERR Pull-Up vs. Temperature
1.00
14
VBIAS Supply Voltage (V)
Temperature (°C)
125
10
12
14
16
18
20
VCC Logic Supply Voltage (V)
Figure 15B. Logic “0” Input Threshold vs. Voltage
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IR2125(S) & (PbF)
500
CS Input Positive Going Threshold (mV)
CS Input Positive Going Threshold (mV)
500
400
Max.
300
Typ.
200
Min.
100
400
Max.
300
Typ.
200
Min.
100
0
0
-50
-25
0
25
50
75
100
125
10
12
Figure 16A. CS Input Threshold (+) vs.
Temperature
18
20
500
CS Input Negative Going Threshold (mV)
CS Input Negative Going Threshold (mV)
16
Figure 16B. CS Input Threshold (+) vs. Voltage
500
400
300
Max.
Typ.
200
Min.
100
0
400
300
Max.
Typ.
200
Min.
100
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBS Floating Supply Voltage (V)
Temperature (°C)
Figure 17A. CS Input Threshold (-) vs. Temperature
Figure 17B. CS Input Threshold (-) vs. Voltage
1.00
1.00
0.80
0.80
High Level Output Voltage (V)
High Level Output Voltage (V)
14
VBS Floating Supply Voltage (V)
Temperature (°C)
0.60
0.40
0.20
0.60
0.40
0.20
Max.
Max.
0.00
0.00
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 18A. High Level Output vs. Temperature
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10
12
14
16
18
20
VBS Floating Supply Voltage (V)
Figure 18B. High Level Output vs. Voltage
9
1.00
1.00
0.80
0.80
Low Level Output Voltage (V)
Low Level Output Voltage (V)
IR2125(S) & (PbF)
0.60
0.40
0.20
0.60
0.40
0.20
Max.
Max.
0.00
0.00
-50
-25
0
25
50
75
100
125
10
12
Figure 19A. Low Level Output vs. Temperature
16
18
20
Figure 19B. Low Level Output vs. Voltage
500
500
400
400
Offset Supply Leakage Current (µA)
Offset Supply Leakage Current (µA)
14
VBS Floating Supply Voltage (V)
Temperature (°C)
300
200
100
300
200
100
Max.
Max.
0
0
-50
-25
0
25
50
75
100
125
0
100
2.00
2.00
1.60
1.60
1.20
Max.
0.80
400
500
1.20
0.80
0.40
Typ.
Max.
Typ.
0.00
0.00
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 21A. VBS Supply Current vs. Temperature
10
300
Figure 20B. Offset Supply Current vs. Voltage
VBS Supply Current (mA)
VBS Supply Current (mA)
Figure 20A. Offset Supply Current vs. Temperature
0.40
200
VB Boost Voltage (V)
Temperature (°C)
10
12
14
16
18
20
VBS Floating Supply Voltage (V)
Figure 21B. VBS Supply Current vs. Voltage
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2.00
2.00
1.60
1.60
VCC Supply Current (mA)
VCC Supply Current (mA)
IR2125(S) & (PbF)
Max.
1.20
0.80
Typ.
0.40
1.20
Max.
0.80
Typ.
0.40
0.00
0.00
-50
-25
0
25
50
75
100
125
10
12
Figure 22A. VCC Supply Current vs. Temperature
16
18
20
Figure 22B. VCC Supply Current vs. Voltage
25
25
20
20
Logic "1" Input Bias Current (µA)
Logic "1" Input Bias Current (µA)
14
VCC Logic Supply Voltage (V)
Temperature (°C)
15
10
Max.
5
15
Max.
10
Typ.
5
Typ.
0
0
-50
-25
0
25
50
75
100
125
10
12
16
18
20
Figure 23B. Logic “1” Input Current vs. Voltage
5.00
5.00
4.00
4.00
Logic "0" Input Bias Current (µA)
Logic "0" Input Bias Current (µA)
Figure 23A. Logic “1” Input Current vs.
Temperature
3.00
2.00
1.00
14
VCC Logic Supply Voltage (V)
Temperature (°C)
Max.
0.00
3.00
2.00
1.00
Max.
0.00
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 24A. Logic “0” Input Current vs.
Temperature
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125
10
12
14
16
18
20
VCC Logic Supply Voltage (V)
Figure 24B. Logic “0” Input Current vs. Voltage
11
25.0
25.0
20.0
20.0
"High" CS Bias Current (µA)
"High" CS Bias Current (µA)
IR2125(S) & (PbF)
15.0
10.0
Max.
Typ.
5.0
15.0
10.0
Max.
Typ.
5.0
0.0
0.0
-50
-25
0
25
50
75
100
125
10
12
5.00
5.00
4.00
4.00
3.00
2.00
Max.
2.00
Max.
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBS Floating Supply Voltage (V)
Temperature (°C)
Figure 26A. “Low” CS Bias Current vs. Temperature
Figure 26B. “Low” CS Bias Current vs. Voltage
11.0
11.0
Max.
VBS Undervoltage Lockout - (V)
VBS Undervoltage Lockout + (V)
20
0.00
-50
Typ.
9.0
Min.
8.0
7.0
10.0
9.0
Max.
Typ.
8.0
Min.
7.0
6.0
6.0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 27. VBS Undervoltage (+) vs. Temperature
12
18
3.00
1.00
0.00
10.0
16
Figure 25B. “High” CS Bias Current vs. Voltage
"Low" CS Bias Current (µA)
"Low" CS Bias Current (µA)
Figure 25A. “High” CS Bias Current vs.
Temperature
1.00
14
VBS Floating Supply Voltage (V)
Temperature (°C)
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 28. VBS Undervoltage (-) vs. Temperature
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IR2125(S) & (PbF)
11.0
10.0
10.0
VCC Undervoltage Lockout - (V)
VCC Undervoltage Lockout + (V)
11.0
Max.
Typ.
9.0
Min.
8.0
9.0
Max.
Typ.
8.0
Min.
7.0
7.0
6.0
6.0
-50
-25
0
25
50
75
100
-50
125
-25
0
250
250
200
200
150
Max.
Typ.
Min.
50
0
150
100
125
Max.
Typ.
100
Min.
50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VCC Logic Supply Voltage (V)
Temperature (°C)
Figure 31A. ERR Timing Charge Current vs.
Temperature
Figure 31B. ERR Timing Charge Current vs.
Voltage
25.0
25.0
20.0
ERR Pull-Up Current (mA)
20.0
ERR Pull-Up Current (mA)
75
0
-50
Typ.
15.0
10.0
50
Figure 30. VCC Undervoltage (-) vs. Temperature
ERR Timing Charge Current (µA)
ERR Timing Charge Current (µA)
Figure 29. VCC Undervoltage (+) vs. Temperature
100
25
Temperature (°C)
Temperature (°C)
Min.
15.0
Typ.
10.0
Min.
5.0
5.0
0.0
0.0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (°C)
VCC Logic Supply Voltage (V)
Figure 32A. ERR Pull-Up Current vs. Temperature
Figure 32B. ERR Pull-Up Current vs. Voltage
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13
IR2125(S) & (PbF)
50
50
40
ERR Pull-Down Current (mA)
ERR Pull-Down Current (mA)
40
Typ.
30
20
Min.
30
Typ.
20
Max.
10
10
0
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (°C)
VCC Logic Supply Voltage (V)
Figure 33A. ERR Pull-Down Current vs.Temperature
Figure 33B. ERR Pull-Down Current vs. Voltage
2.50
2.50
2.00
Typ.
Output Source Current (A)
Output Source Current (A)
2.00
1.50
Min.
1.00
0.50
1.50
1.00
Typ.
Min.
0.50
0.00
0.00
-50
-25
0
25
50
75
100
125
10
12
Figure 34A. Output Source Current vs.
Temperature
18
20
5.00
4.00
Typ.
Output Sink Current (A)
Output Sink Current (A)
16
Figure 34B. Output Source Current vs. Voltage
5.00
4.00
14
VBS Floating Supply Voltage (V)
Temperature (°C)
3.00
Min.
2.00
3.00
Typ.
2.00
Min.
1.00
1.00
0.00
0.00
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 35A. Output Sink Current vs.Temperature
14
10
12
14
16
18
20
VBS Floating Supply Voltage (V)
Figure 35B. Output Sink Current vs. Voltage
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300
300
250
250
Turn-Off Delay Time (ns)
Turn-On Delay Time (ns)
IR2125(S) & (PbF)
200
150
100
50
Max .
200
150
100
Typ.
50
0
0
0
2
4
6
8
0
10 12 14 16 18 20
2
4
Input Voltage (V)
6
8
10 12 14 16 18 20
Input Voltage (V)
Figure 36A. Turn-On Time vs. Input Voltage
Figure 36B. Turn-Off Time vs. Input Voltage
0.00
VS Offset Supply Voltage (V)
-3.00
Typ.
-6.00
-9.00
-12.00
-15.00
10
12
14
16
18
20
VBS Floating Supply Voltage (V)
Figure 37. Maximum VS Negative Offset vs. Supply
Voltage
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15
IR2125(S) & (PbF)
Case outlines
8-Lead PDIP
16-Lead SOIC (wide body)
16
01-6014
01-3003 01 (MS-001AB)
01 6015
01-3014 03 (MS-013AA)
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IR2125(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRxxxxxx
YWW?
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2125 order IR2125
16-Lead SOIC IR2125S order IR2125S
Leadfree Part
8-Lead PDIP IR2125 order IR2125PbF
16-Lead SOIC IR2125S order IR2125SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice.
9/12/2004
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17