ENGI 242/ELEC 222
January 2004
BJT Fixed Bias
ENGI 242
ELEC 222
BJT Biasing 1
For Fixed Bias Configuration:
• Draw Equivalent Input circuit
• Draw Equivalent Output circuit
• Write necessary KVL and KCL Equations
• Determine the Quiescent Operating Point
– Graphical Solution using Loadlines
– Computational Analysis
• Design and test design using a computer simulation
January 2004
Fixed Bias
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1
ENGI 242/ELEC 222
January 2004
Complete CE Amplifier with Fixed Bias
January 2004
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Fixed Bias and Equivalent DC Circuit
January 2004
Fixed Bias
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2
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January 2004
Fixed-Bias Circuit
January 2004
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DC Equivalent Circuit
January 2004
Fixed Bias
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3
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January 2004
Base-Emitter (Input) Loop
Using Kirchoff’s voltage law: – VCC + IBRB + VBE = 0
Solving for IB: I B =
January 2004
V C C - V BE
RB
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Collector-Emitter (Output) Loop
Since:
IC = β IB
Using Kirchoff’s voltage law: – VCC + IC RC + VCE = 0
Because:
VCE = VC – VE
Since VE = 0V, then:
VC = VCE
And
VCE = VCC - IC RC
Also:
VBE = VB - VE
with VE = 0V, then:
VB = VBE
January 2004
Fixed Bias
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4
ENGI 242/ELEC 222
January 2004
BJT Saturation Regions
When the transistor is operating in the
Saturation Region, the transistor is
conducting at maximum collector
current (based on the resistances in
the output circuit, not the spec sheet
value) such that:
VCC - VCE
RC
where VCE = 0.2 V
ICsat =
January 2004
ENGI 242/ELEC 222
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Determining Icsat
January 2004
Fixed Bias
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5
ENGI 242/ELEC 222
January 2004
Determining ICSAT for the fixed-bias configuration
January 2004
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Load Line Analysis
January 2004
Fixed Bias
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6
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January 2004
Load Line Analysis
The end points of the line are : ICsat and VCEcutoff
For load line analysis, use VCE = 0 for ICSAT, and IC = 0 for VCEcutoff
ICsat:
VCEcutoff:
VCC
|VCE = 0V
RC
VCE = VCC |IC = 0mA
ICsat =
Where IB intersects with the load line we have the Q point
Q-point is the particular operating point:
• Value of RB
• Sets the value of IB
• Where IB and Load Line intersect
• Sets the values of VCE and IC.
January 2004
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Circuit values effect Q-point
January 2004
Fixed Bias
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7
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January 2004
Circuit values effect Q-point (continued)
January 2004
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Circuit values effect Q-point (continued)
January 2004
Fixed Bias
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8
ENGI 242/ELEC 222
January 2004
Load-line analysis
January 2004
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DC Fixed Bias Circuit Example
January 2004
Fixed Bias
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9
ENGI 242/ELEC 222
January 2004
Loadline Example Family of Curves
January 2004
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Emitter Stabilized Bias
ENGI 242
ELEC 222
Fixed Bias
10
ENGI 242/ELEC 222
January 2004
BJT Emitter Bias
For the Emitter Stabilized Bias Configuration:
• Draw Equivalent Input circuit
• Draw Equivalent Output circuit
• Write necessary KVL and KCL Equations
• Determine the Quiescent Operating Point
– Graphical Solution using Loadlines
– Computational Analysis
• Design and test design using a computer simulation
January 2004
ENGI 242/ELEC 222
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Improved Bias Stability
The addition of RE to the Emitter circuit improves the stability of a transistor
output
Stability refers to a bias circuit in which the currents and voltages will
remain fairly constant over a wide range of temperatures and transistor
forward current gain (β)
The temperature (TA or ambient temperature) surrounding the transistor
circuit is not always constant
Therefore, the transistor β is not a constant value
January 2004
Fixed Bias
ENGI 242/ELEC 222
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11
ENGI 242/ELEC 222
January 2004
Emitter-Stabilized Bias Circuit
Adding an emitter resistor to the circuit between the emitter lead and ground stabilizes
the bias circuit over Fixed Bias
January 2004
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Base-Emitter Loop
January 2004
Fixed Bias
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12
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January 2004
Equivalent Network
January 2004
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Reflected Input impedance of RE
January 2004
Fixed Bias
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13
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January 2004
Base-Emitter Loop
Applying Kirchoffs voltage law:
Since:
- VCC + IB RB + VBE +IE RE = 0
IE = (β + 1) IB
We can write:
- VCC + IB RB + VBE + (β + 1) IB RE = 0
Grouping terms and solving for IB:
Or we could solve for IE with:
January 2004
VCC - VBE
RB + (β+1)RE
 RB 
- VCC + IE 
 + VBE + IE RE = 0
 (β + 1) 
IB =
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Collector-Emitter Loop
January 2004
Fixed Bias
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14
ENGI 242/ELEC 222
January 2004
Collector-Emitter Loop
Applying Kirchoff’s voltage law:
- VCC + IC RC + VCE + IE RE = 0
Assuming that IE ≅ IC and solving for VCE: VCE = VCC – IC (RC + RE)
If we can not use IE ≅ IC the IC = αIE and: VCE = VCC – IC (RC + αRE)
V E = IE R E
Solve for VE:
Solve for VC:
VC = VCC - IC RC
or
VC = VCE + IE RE
Solve for VB:
VB = VCC - IB RB
or
VB = VBE + IE RE
January 2004
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Transistor Saturation
At saturation, VCE is at a minimum
We will find the value VCEsat = 0.2V
For load line analysis, we use VCE = 0
To solve for ICSAT, use the output KVL
equation:
ICSAT =
January 2004
Fixed Bias
ENGI 242/ELEC 222
V CC - V CE
RC + RE
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15
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January 2004
Load Line Analysis
The load line end points can be calculated:
At cutoff:
VCE = VCC | IC = 0 mA
At saturation:
IC =
January 2004
VCC
| VCE = 0V
RC + RE
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Emitter Stabilized Bias Circuit Example
January 2004
Fixed Bias
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16
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January 2004
Design of an Emitter Bias CE Amplifier
Where .1VCC ≤ VE ≤ .2VCC
And .4VCC ≤ VC ≤ .6VCC
January 2004
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Emitter Bias with Dual Supply
January 2004
Fixed Bias
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17
ENGI 242/ELEC 222
January 2004
Emitter Bias with Dual Supply
Input
January 2004
Fixed Bias
Output
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18