Electromagnetic Interference (EMI) Issues for Mixed-Signal System-on-Package (SOP)
Hideki Sasaki*, Vinu Govind, Krishna Srinivasan, Sidharth Dalmia, Venky Sundaram,
,
Madhavan Swaminathan and Rao Tummala ,
Microsystems Packaging Research Center, Georgia Institute of Technology
813 Ferst Drive NW, Atlanta, GA 30332-0560, USA
*NEC Corporation, Japan, h-sasaki@di.jp.nec.com, Phone: +SI 44 435 1094
Abstract
Electromagnetic
interference
(EMI)
issues . .in
implementing mixed-signal system-on-package (SOP) are
investigated. Each of the testbeds utilized in our
experimentations consists of a digital circuit and a RF fro@end circuit with embedded passives, but they vary in t e h s of
the route of the digital trace. With these testbeds, we
demonstrate two different EM1 mechanisms. The first results
in EM1 due to capacitive coupling through a’small slot and
intermodulation between the digital and RF signals. Even
when the frequency of the digital signal is much lower than
that of the RF signal, this mechanism,causes new harmonics
of the digital signal to appear around the frequency of the RF
signal. The second mechanism produces EM1 due to coupling
through the common power bus in the package. To prevent
such EM1 issues, we describe differential signaling of the
digital interface as our future work. Our results indicate the
correct direction for EM1 design in developing mixed-signal
SOP.
1. Introduction
Almost all of the newest electronics products are mixedsignal systems. A typical example is the cellular phone. It
includes a CPU, memory, voice device, power control,
camera, and RF components. To maintain the rapid progress
in adding new functions, manufacturers require optimum
system packages for obtaining the best possible electrical
characteristics while making each component smaller, thinner,
and lighter. One strategy for implementing such packages is
the system-on-package (SOP).
SOP will provide especially great advantages for mixedsignal systems. For example, latest devices of digital, analog,
RF, MEMS and bio-electronics devices can be combined in
one package without the limitations of these chip process.
Some design issues, however, must be solved in order to
develop mixed-signal SOPS. One of these is electromagnetic
interference (EMI) hetween digital and analog circuits, or
between digital and RF circuits. For example, if digital and
RF chips are stacked in a 3-dimensional chip stacked package
with a CPU and memories for cellular phone applications, the
digital signal and the switching noise will certainly interfere
with the RF operation. This is because the digital devices
must be placed extremely close to the RF devices in the
package, as compared with separating the digital and RF
devices in the same layer.
The purpose of this paper is to investigate undesirable
EM1 problems in mixed-signal SOPs with digital and RF
circuits. In our experiments, we utilized testbeds consisting of
a digital trace and a RF circuit. In each testbed, the digital
0-7803-83656104/520.00 a 0 0 4 IEEE
I
trace is a 50-ohm microstrip line, and the RF circuit is a low
noise amplifier (LNA). Since a LNA’ forms the fust stage of
R$ front-end circuits, it is one of the most critical devices in
these circuits [2]. In addition, the LNA in our testbeds utilizes
embedded passives as components of the. inputioutput
matching circuits [3], because they’iiave much potential to
reduce the package size. We performed two experiments by
using. three different testbeds. In the first experiment, ‘we
evaluated EM1 under the condition that’the frequency of the
digital signal was much lower than that of the RF signal. In
the second experiment, we evaluated EM1 under the condition
that the frequency of the digital signal was close to that of the
RF signal. To analyze the EM1 mechanisms, we focused on
the return current path of the digital signal.
2. Mixed-Signal Testbeds for EM1 Investigation
Figures 1, 2, and 3 show our three testbeds, labeled “A”,
“B,and “C”, respectively. All three are 100 mm by 50 mm,
and this size was determined imagining a cellular phone. The
center of each testbed is the RF layout, and the line from the
left edge to the right edge is the digital trace, which has a
characteristic impedance of 50 ohm. A SMA connector is
attached at the left end of the trace, and a 49.2-ohm chip
resistor is mounted at the right end. The RF parts of all three
testbeds have identical layouts, although these of testbeds B
and C are tumed YO degrees to the lee. The two pads at the
top of the testbeds and near the RF layout are for the power
supply of the RF circuit. These pads are connected with the
common ground (second) and power (third) layers by via
1437
Fig. 1. Mixed-signal testbed A.
I
j
I
,
1
!
~
I
W
Fig. 2. Mixed-signal testbed B.
2004 Electronic Components and Technology Conference
!
~
operation frequency is 1.8 GHz. With a power supply of 3.3
V, the gain of the LNA was approximately 12 dB in the
frequency range from 1.7 to 2.5 GHz. The input pad of the
LNA is at the bottom of the layout, while the output pad is at
the top,In our experiments, when we injected a RF signal and
measured a RF output, RF & microwave probes produced by
Cascade Microtech were attached to the input and output
pads.
Fig. 3. Mixed-signal testbed C.
Figure 4 shows a cro& sectional view of the testbeds, All
three testbeds &e, &layer boards .&d have a thic.kness of 0.8
mm. The first layer is'a signal,layer, the second is the ground
p l a y , ihe third is the power plane, the fourth is &other signal
layer, the fifth has no pattern, and the sixth is the ground pad
layer for the SMA conneclor. As shown in Figures 1, 2, and
4, for,+ testbeds A-and B, the digital trace is placed in both
the first and fourth layers, rinh detours under the RF part. This
route is the most possible layout for mixed-signal boards
when the digital circuit ,is -vertically close to the RF,part. On
the other hand, the digital trace of testbed C is placed.only in
the fust layer, and it detours around the RF part as shown in
Figure 3. This route is the: most common layout for mixedsignal hoards when the digital circuit is separated from the RF
part in the same layer. Eiy employing these testbeds.with
independent digital and RF' circuits, we investigated the EM1
between the two types of circuits.
.. .
3. Casel: EM1 with RF Circuit Due to 100-MHz Digital
Clock
3-1. Measurement Setup
Figure 6 shows themeasurement setup we used for case 1
in our EM1 'experiments. The signal generator, sent a 1.83GHz sine wave into the LNA as a RF signal with a power of 15 dBm. At the same time, the pulse generator injected a 100MHz rectangular signal into the digital trace with an
amplitude of 2 V peak to peak. The spectrum analyzer
received the output of the LNA, which contained both the RF
signal and the'coupled digltal'signal. To eliminate the DC
voltage from the LNA output, a DC blocker was placed at the
input of the spectrum analyzer.'
Pulse Generator
(100MHzRectangular)
1.
.
Signal Generator
i---__
er
~-_-i
Fig. 4. Cross:sectional view of testbeds A and B.
I
'
.~
'
,
,
..,
,..
RF outnut
50-ohm
DC Power
Termination
Supply
Fig. 6. Measurement setup for EM1 experiment: case 1
Fig. 5. Detailed
.. .layout~.
of the RF part.
Figure 5 shows the detailed layout of the RF part in the
upper layer, which is a low noise amplifier (LNA). The input
matching circuit contains an embedded inductor and capacitor
in the testbed. The output matching circuit also contains an
embedded inductor. In implementing these embedded
passives, we did not utili% any special materials, such as a
high-k ceramic composite: for the capacitor. The substrate
material is LD-621, produced by Polyclad Laminates, Inc. At
2 GHz, it has a low dielechic constant of 3.2, and a low loss
tangent of 0.005. The transistor is a HBFP-0420 with a SOT343 package, produced by Agilent .Technology. The typical
. ,
3-2. Measurement Results
Figures 7, 8, and 9 show the measurement results for case
1. Testbeds A and B each exhibited several peaks around the
1.83-GHz RF signal. Testbed C, however, exhibited no peak
other than that of the RF signal. In the range from 1.4 to 2.2
GHz, testbed A exhibited six peaks: at 1.43, 1.53, 1.63, 1.73,
1.93, and 2.13 GHz; testbed B exhibited four peaks: 1.53,
1.73, 1.93, and2.13 GHz.
These peaks are not the harmonics of the digital signal,
because the frequencies are not multiples of 100 MHz. They
instead appear to be due to "intermodulation". .The
frequencies can be obtained by adding or subtracting
multiples of 100 MHz from the RF frequency of 1.83 GHz.
For example, 1.43 GHz subtracts 300 MHz from 1.83 GHz.
The reason why new harmonics appeared around the RF
signal.was that it and the coupled digital signal were mixed in
the transistor of the LNA. The intermodulation arose from the
non-linearity of the transistor [4].
1438
2004 Electronlc Components and Technalogy Conference
similar characteristics. This .is because, the duty ratio of the
digital clock signal was approximately 50 % and the
amplitudes of even harmonics are low.
-80
'
1.4
1.8
2.0
~
_ _Inter-modulation
_ _ _ _ _ _ _ _ _ _ _ _ _ _ -_
I
1.6
1
2.2
Frequency [GHz]
Fig. 7. RF output of testbed A: 100-MHz digital clock.
20
Fig. 10. Intermodulation between digital and RF signals.
3-3. Analysis of EM1 Mechanism
The new harmonics of testbed A due to intermodulation
were higher than these of testhed B. To investigate this
discrepancy, we compared the layouts of these testbeds in
detail. Figure 1 1 shows pictures of both layouts under the RF
part, with the third and fourth layers superimposed. The third
layer is a positive film, while-the fourth is a negative one. The ,
digital trace of testbed A crosses over the square slot in the
third layer, whereas the trace of testbed B is placed apart from
the slot. This slot is located right under one electrode plate of
the embedded capacitor in the LNA's input'matching circuit. ;
This capacitor has its two electrode plates in the first and
second layers, so one of them is close to the third layer, which
is the power plane. In ow design, the small slot was placed in ,
the third layer to reduce the parasitic capacitance between the
embedded capacitor and the power plane. Its size is 5
by
5 mm, and although it is small, it was the main reason for the i
discrepancy in the new'h-onics
of testbeds A and B.
I
n
I
l
~
do
-80
T---jy-\
..
1.4
~1.6
1.8
2.0
2.2
Frequency [GHz]
Fig. 9. RF output oftesthed C : 100-MHz digital clock.
Figure 10 illustrates the principal of intermodulation. The
frequency of the RF carrier, c, is much higher than those of
the digital signal, al, a2, and a3. As a result, the hahnonics do
not directly appear around the RF signal. However, when the
digital signal is mixed into the RF signal at the front stage of
the LNA by any type of coupling, the mixed signal produces
new harmonics in the transistor due to its non-linearity. These
harmonics have frequencies of c-a3, c-a2, c-al, c+al, c+a2,
and c+a3. Incidentally,: in Figure IO, the amplitude of the
harmonics at a2 is lower than that of the harmonics a3. The
measurement results for testbeds A and B also indicated
..
I
(h) Testhed B
(a) Testbed A
Fig.11. Layouts of the third and fourth layers under the RF
Part.
Moran et al. previously discussed the coupling
between a signal trace and a slot in a nearby ground plane [ 5 ] .
When a signal trace is routed over such a slot, the energy of
the signal is coupled to the slot. As a result, the slot resonates
at,some ,frequencies,and EM1,suhsequently occurs in mixedsignal environments.-.In the case of our testbeds, however,
since the slot is much smaller than the wavelengths of both
the digital and RF signals, it can not resonate. Half of the
1439
2004 Electronic Components and Technology Conference
1
!
slot's perimeter is 10 mm, hut resonance of a half wavelength
occurs at 15 GHz in air. Evan if the slot were in our dielectric
substrate, the resonance frequency would never decrease by 2
GHz.
,
Clearly, this case depends on a different mechanism from
the one described above. Where the signal trace crosses over
the slot in the power plane, it is coupled to one of the
electrode plates of the embedded capacitor through the slot.
In other words, the discrepancy resulted from capacitive
coupling between the trace ;and the capacitor.
Figure 12 illustrates the main EM1 mechanism for this
case. When the signal trac,e in the fourth layer crosses over
the slot in the third layer, the energy of the digital signal is
coupled to the embedded capacitor through the slot. The
coupled energy is injected into the input stage of the LNA
along with the RF signal. The transistor in the LNA then
mixes the digital and RF riignals, producing new harmonics
due to its non-linearity.
received the output signal from the LNA. The input power
was -15 a m . At the same time, instead of a high-speed pulse
generator, the other signal generator injected a 1.95-GHz sine
wave into the digital trace in order to generate a highfrequency harmonic of the digital signal. The amplitude was
50 mV,,
which is equivalent to -13 dBm.
Signal Generator
(1.9SGHz Sine)
Signal Generator
Spectrum Analyzer
SO-ohm
Termination
Fig. 13. Measurement setup for EM1 investigation: case 2.
.-.-.-.-.-.-.-._.-.-.-.. -.- ._.Digital(C1ock)
!
!
!
j
4-2. Measurement Results
Figures 14, 15, and 16 show the measurement results for
this experiment. With each testbed, the 1.95-GHz peak
appears to the right of the 1.83-GHz RF signal. Also, as in the
previous investigation, the power of the coupled digital signal
decreased in the order of testheds A, B, and C. We think that
one of the main reasons for this is that the digital signal
crosses over the slot in the nearest metal plane.
Digital
RF
Output
RF
Input
!
L
--
-.
._
RF(LNA)
--
Dig1
!
Fig. 12. EM1 mechanism due to capacitive coupling and
intermodulation,
Since RF circuits transmit data with RF carriers by putting
the data around the carrier,, the peaks caused hy this type of
EM1 will certainly interrupt RF communication. We have thus
concluded that the digital signal has much potential to
interfere with the RF circuit in a mixed-signal package, even
though its frequency is muc,h lower than that of the RF signal.
This result also confirms that a slot in a metal plane behaves
as a coupling path between the digital to RF circuits, even if it
is much smaller than the wavelengths of the digital and RF
signals.
Testbed C did not generate new harmonics due to EM1
between the digital and RF signals. The biggest difference
between testbed C and the others is the signal via transiting
the ground and power planes. The next session describes the
effect of this difference based on another experiment.
4. Case 2: EM1 with RF Circuit Due to Gigahertz
Harmonics
1.4
1440
.
1.6
1.8
I
.
2.0
2.2
Frequency [GHz]
Fig. 14. RF output of testbed A: 1.95-GHz sine wave.
20
B
8"
4
4-1. Measurement Setup
Figure 13 shows the measurement setup we used for case
2 in our EM1 experimeni.s. We investigated EM1 for the
situation in which one harmonic of the digital signal has
approximately the same frequency as the RF signal. As in'the
prev.ious experiment, one of the signal generators sent a 1.83GHz sine wave into the LNA, and the spectrum analyzer
'
-80
-50
-80
K
1.4
1.6
1.8
2.0
2.2
Frequency [GHz]
Fig. 15. RF output of testbed B: 1.95-GHz sine wave.
2004 Electronic Components and Technology Conference
To confirm this mechanism, we changed the return current
path of testbed B by mounting low-impedance capacitors near
the via boles [6]. Figure 19 shows a cross-sectional view of
the testbed after this modification. Two 0.1-uF ceramic
capacitors were mounted near each via hole, with one on each
side. If the impedance of the capacitors is lower than that of
the power bus, the power voltage fluctuation will decrease
and the return current paths will connect.
j
;
!
!
I
-60
-SO
1.4
1.6
2.0
1.8
2.2
I
Frequency [GHz]
Fig. 16. RF output of testbed C 1.95-GHz sine wave
4-3. Analysis of EM1Mechanism
To find another EM1 mechanism, we focused on the
retum current path of the digital signal. Figure 17 shows a
cross-sectional view of testbeds A and B, illustrating the
return current path. The r e m current path for the first layer
is in the second (ground) layer, while that for the fourth layer
is in the third (power) layer. Therefore, at the via holes, these
paths are disconnected between the ground and power layers.
Such discontinuities in the retum current path excite a voltage
between the two layers. In particular, when the resonance
frequency of the power bus, consisting of the power and
ground planes, corresponds to a harmonic of the digital
signal, the voltage dramatically fluctuates, and subsequently
the energy of the power fluctuation is transmitted externally
t61.
Fig. 19. Connection of the return current path by using
capacitors.
RF.JJ\
.........
+-.-Retum current
-~
-
i +f
2o
5
4
i
-40
40
-80
Fig. 17. Discontinuity of the return current path at the via
holes.
I
Figure 20 shows the measurement result for testbed B
with the capacitors mounted. Compared to the result shown in
Figure 15, the amplitude decreased by approximately 3 dB.
Although this is smaller than the difference between testheds
B and C without the capacitors, this experiment also indicates
that the power bus is one of the coupling paths.
........IT Signal
Ground
I*........
i
i
B
7
'
1.4
i
1.6
1.8
2.0
2.2
Frequency [GHz]
Fig. 20. RF output of testbed B with capacitors: 1.95-GHz
sine wave.
Figure 18 illustrates this coupling mechanism. Because
1
testbeds A and B have common power and ground planes for
'
To
investigate
the
energy
coupling
from
the
digital
trace
the digital and RF circuits, strong coupling through the power
to the power bus in more detail, we measured the return loss I
bus will occnr.
_____._______._
of the digital trace. Figure 21 shows the results for testbed B I
without capacitors and with capacitors, indicated by the thick 1
line and the thin line, respectively. There were peaks at
approximately 1.95 and 2.75 GHz. These peaks resulted from I
the energy coupling of the digital trace to the power bus,
which exhibited some resonance. The reduction achieved with
I
the mounted capacitors was again approximately 3 dB.
Coupling through power bus
To confirm the power bus resonance at 1.95GH2, we
measured near-magnetic-field maps above testbed B. As a
: t
magnetic field probe we used a CP-2S, produced by NEC
Glass Components, Ltd. We previously confumed the
accuracy of this probe in another paper [7]. Figures 22(a) and
(b) show the result without and with capacitors; respectively.
These maps display the magnetic field in the y-direction,
which corresponds to the current distribution in the xFig.18. Coupling between the digital and RF signals through direction. The longer dimension of the ground plane is 100
the power bus.
mm, the longer dimension of the power plane is 85 mm, and
.______-________
~
_________________
1441
2004 Electronic Components and Technology Conference
the dielectric constant of the. substrate is 3.2 at 2 GHz.
Thereiore, a wavelength. resonance should occur .at
approximately 1.95 GHz. The field maps also indicate that we
should expect a resonance pattern. Since one contour interval
in the field maps represents 5 dB,.the suppression due to the
mounted capacitors was less than 5 dB. These results for RF
output. return. loss, and ,near-field maps confirm that the
power bus is one of the.coupling paths from the digital signal
to the RF signal.
~~
~
Fig. 23. Mixed-signal testbed using differential signaling.
O
’’
r
-50
.
ji-
1.95GHz
6.Conclulsion
,
We have investigated EM1 issues in implementing mixedsignal system-on-package (SOP) with a digital circuit and a
RF circuit with embedded passives. Our detailed experiments
have demonstrated two EM1 mechanisms: one due to a small
slot near the embedded passives and intermodulation, and
another due to via holes transiting the common power and
ground planes for digital and RF circuits. In the near future,
we will investigate the effectiveness of applying differential
signaling in the digital part of a mixed-signal system in order
to improve the design flexibility for mixed-signal SOPS.
I
1
1.5
.
.
. I .
2’
2.5
,
3
.
Frequency [GHz]
Fig. 21. Return loss of !:he digital trace in the testbed B
without capacitors (thick line), and with capacitors (thin
line).
(3)
(a)
Fig. 22. Near-magnetic-tield maps above testbed B (a)
without capacitors and (b) with capacitors.
. .
5. Discussion and Future ’Work
Our results have demoristrated EM1 due to a small slot in
the nearest metal plane and intermodulation, as well as due to
signal via holes transiting the power and ground planes. These
results that testbed C offers the best layout for mixed-signal
packages. In practical designs, however, the .layouts of
testbeds A and B can not.be excluded. The biggest reason for
these EM1 problems is the discontinujty in the return current
path due to the small.slot or the via holes. We expect that
differential signaling can provide one solution, because in this
approach, the return current flows in each line of a pair. We
will next investigate the effectiveness of the differential
signaling approach by utilizing the testbeds illustrated in
Figure 23.
Acknowledgments’ ’
We thank all the staff of the Microsystems Packaging
Research Center, at the Georgia Institute of Technology, and
our colleagues at NEC’Corporation.
References
1. Sundaram, V. et ai, “Digital and RF lntegration in
System-on-Package (SOP),” Proc 52“d Electronic
Componeyts and Technology Conf; May 2002, pp. 646650.
2. Shen, M. et al, “Cost and Performance Analysis for
Mixed-Signal System Implementation: System-on-Chip or
System-on-Package?,” IEEE Trans-CPMT-C, Vol. 25,
No. 4 (2002), pp. 262-272.
3. Govind, V. et al, “Design of an Integrated Low Noise
Amplifier with Embedded Passives in Organic Substrate,”
Proc 11“ Topical Meeting on Electrical Performance of
Electronic Packaging, Oct 2002, pp. 67-70.
4. Razavi; B., RF Microelectronics, Prentice-Hall (New
York, 1999), Chapter 2.
5. Moran, T. E. et ai, “Methods to Reduce Radiation From
Split Ground Planes in RF and Mixed Signal Packaging
Structure,” IEEE TransfCPMT-B,Vol. 25, No. 3 (2002),
pp. 409-416.
6. Cui, W. et ai, “EM1 Resulting From a Signal Via
Transition Througth DC Power Bus - Effectiveness of
Local SMT Decoupling,” Proc. Asia-Pacific Conference
on Environmental Electromagnetics CEEM, China, May.
2000, pp. 91-95.
7. Srinivasan, K. et al, ‘Calibration of Near Field
Measurements Using Microstriop Line for Noise
Predictions,” Proc 54Ih Electronic Components and
Technology Conf; June 2004, to be published.
See the CD-ROMfor colorfigures
1442
2004 Electronic Components and Technology Conference