Design Considerations for an LLC Resonant Converter
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Design Considerations for an LLC Resonant Converter Hangseok Choi Power Conversion Team www.fairchildsemi.com 1. Introduction Growing demand for higher power density and low profile in power converter has forced to increase switching frequency High frequency operation However, Switching Loss has been an obstacle to high frequency operation Overlap of voltage and current 2 Capacitive loss Reverse recovery loss 1. Introduction Resonant converter: processes power in a sinusoidal manner and the switching devices are softly commutated 9 Voltage across the switch drops to zero before switch turns on (ZVS) • Remove overlap area between V and I when turning on • Capacitive loss is eliminated Series resonant converter / Parallel resonant converter 3 1. Introduction Series Resonant (SR) converter resonant network Q1 Ip Vin Vd n:1 Ro Lr VO Q2 Lm Ids2 + Cr The resonant inductor (Lr) and resonant capacitor (Cr) are in series The resonant capacitor is in series with the load 9 The resonant tank and the load act as a voltage dividerÆ DC gain is always lower than 1 (maximum gain happens at the resonant frequency) 9 The impedance of resonant tank can be changed by varying the frequency of driving voltage (Vd) 4 1. Introduction Series Resonant (SR) converter Advantages 9 Reduced switching loss and EMI through ZVS Æ Improved efficiency 9 Reduced magnetic components size by high frequency operation Drawbacks 9 Can optimize performance at one operating point, but not with wide range of input voltage and load variations 9 Can not regulate the output at no load condition 9 Pulsating rectifier current (capacitor output): limitation for high output current application 5 1. Introduction Parallel Resonant (PR) converter resonant network Q1 Ip Vin Vd Q2 n:1 Ro Llkp Cr + VO - Ids2 The resonant inductor (Lr) and resonant capacitor (Cr) are in series The resonant capacitor is in parallel with the load 9 The impedance of resonant tank can be changed by varying the frequency of driving voltage (Vd) 6 1. Introduction Parallel Resonant (PR) converter Advantages 9 No problem in output regulation at no load condition 9 Continuous rectifier current (inductor output): suitable for high output current application Drawbacks 9 The primary side current is almost independent of load condition: significant current may circulate through the resonant network, even at the no load condition 9 Circulating current increases as input voltage increases: limitation for wide range of input voltage 7 1. Introduction What is LLC resonant converter? 9 Topology looks almost same as the conventional LC series resonant converter 9 Magnetizing inductance (Lm) of the transformer is relatively small and involved in the resonance operation 9 Voltage gain is different from that of LC series resonant converter LC Series resonant converter resonant network Q1 Ip Vin Vd Ro Lr Ids2 + VO Lm resonant network Q1 n:1 Q2 8 LLC resonant converter Ip Vin Vd Q2 Ids2 Io ID Ro Lr + VO Im Lm Cr n:1 Cr 1. Introduction Features of LLC resonant converter - Reduced switching loss through ZVS: Improved efficiency - Narrow frequency variation range over wide load range - Zero voltage switching even at no load condition - Typically, integrated transformer is used instead of discrete magnetic components 9 1. Introduction Integrated transformer in LLC resonant converter 9 Two magnetic components are implemented with a single core (use the primary side leakage inductance as a resonant inductor) 9 One magnetic components (Lr) can be saved 9 Leakage inductance not only exists in the primary side but also in the secondary side 9 Need to consider the leakage inductance in the secondary side Q1 Integrated transformer Q1 Vin n:1 Vd Q2 Io ID Ro Lr + VO Lm Ip Vin Vd Q2 10 Cr Ids2 Ro + VO Im Lm Ids2 Llks Llkp Io ID n:1 Cr 2. Operation principle and Fundamental Approximation Square wave generator: produces a square wave voltage, Vd by driving switches, Q1 and Q2 with alternating 50% duty cycle for each switch. Resonant network: consists of Llkp, Llks, Lm and Cr. The current lags the voltage applied to the resonant network which allows the MOSFET’s to be turned on with zero voltage. Rectifier network: produces DC voltage by rectifying AC current Ip Im Square wave generator resonant network Q1 Ip Vin Vd Q2 Llks Llkp Ro + VO Im Lm Ids2 Io ID n:1 Ids2 Rectifier network - ID Vd (Vds2) Cr Vgs1 Vgs2 11 Vin 2. Operation principle and Fundamental Approximation The resonant network filters the higher harmonic currents. Thus, essentially only sinusoidal current is allowed to flow through the resonant network even though a square wave voltage (Vd) is applied to the resonant network. Fundamental approximation: assumes that only the fundamental component of the square-wave voltage input to the resonant network contributes to the power transfer to the output. The square wave voltage can be replaced by its fundamental component Vd Resonant netw ork 12 Isec Ip Isec Ip Vd Resonant netw ork 2. Operation principle and Fundamental Approximation Because the rectifier circuit in the secondary side acts as an impedance transformer, the equivalent load resistance is different from actual load resistance. The primary side circuit is replaced by a sinusoidal current source (Iac) and a square wave of voltage (VRI) appears at the input to the rectifier. The equivalent load resistance is obtained as I ac pk Io + Iac + VRI VO Ro - Rac = F 8 Vo 8 VRI VRI = = = Ro 2 2 F π Io π I ac I ac I ac = Iac VRIF VRI 13 - F Vo π ⋅ Io VRI F = 2 sin( wt ) 4Vo π sin( wt ) 2. Operation principle and Fundamental Approximation AC equivalent circuit (L-L-L-C) Vin Vd + Cr Llks Llkp + + - - n:1 Rac = π2 Ro - VdF = ω 2 Lm Rac Cr ω2 ω2 2 jω ⋅ (1 − 2 ) ⋅ ( Lm + n Llks ) + Rac (1 − 2 ) ωo ωp Ro n2Llks Cr F VRI Lm 8n 2 VO 4n ⋅ Vo sin(ωt ) VRO 2n ⋅ Vo n ⋅ VRI π M= F = = = 4 Vin Vd Vd F Vin sin(ωt ) π 2 F Rac = Llkp Lm Rac VROF ωo = 8n 2 π2 Ro 1 , ωp = Lr Cr 1 L p Cr Lp = Lm + Llkp , Lr = Llkp + Lm //(n 2 Llks ) - Lr is measured in primary side with secondary winding short circuited - Lp is measured in primary side with secondary winding open circuited 14 2. Operation principle and Fundamental Approximation Simplified AC equivalent circuit (L-L-C) Cr Vd + Vin Llks Llkp + + Ro - - ω2 k ( 2) ωp k +1 VO VRI Lm Assuming Llkp=n2Llks n:1 M= 2n ⋅ VO = Vin - ω ω2 ω2 (k + 1) 2 j ( ) ⋅ (1 − 2 ) ⋅ Q + (1 − 2 ) ωo ωo ωp 2k + 1 Lr = Llkp + Lm //(n Llks ) 2 = Llkp + Lm // Llkp L p = Llkp + Lm Cr VinF 1: Q= Lp L p − Lr Rac VROF M= - Lr is measured in primary side with secondary winding short circuited - Lp is measured in primary side with secondary winding open circuited 15 k= Lm Llkp Expressing in terms of Lp and Lr Lr Lp-Lr Lr / Cr Rac 2n ⋅ VO = Vin ω 2 Lp − Lr ( 2) Lp ωp Lp ω ω2 ω2 + (1 − 2 ) j ( ) ⋅ (1 − 2 ) ⋅ Q Lr ωo ωo ωp 2. Operation principle and Fundamental Approximation Gain characteristics LLC resonant C onverter fp 9 Two resonant frequencies (fo and fp) exist 9 The gain is fixed at resonant frequency (fo) regardless of the load variation fo 2.0 Q= Q=0.2 1.8 Lr / Cr Rac Q= 1 Q = 0.8 1.6 Q = 0.6 Lp Lp − Lr Q = 0.4 1.4 G ain M @ω =ωo k +1 = = k Q = 0.2 1.2 9 Peak gain frequency exists between fo and fp 9 As Q decreases (as load decreases), the peak gain frequency moves to fp and higher peak gain is obtained. 9 As Q increases (as load increases), peak gain frequency moves to fo and the peak gain drops 16 Q=1 1.0 M= 0.8 k +1 = k Lp Lp − Lr 0.6 40 50 60 70 80 90 freq (kH z) 100 110 120 130 140 2. Operation principle and Fundamental Approximation Peak gain (attainable maximum gain) versus Q for different k values 2.4 2.2 Peak Gain 2.0 k=1.5 1.8 k=1.75 k=2 1.6 k=2.5 1.4 k=3 1.2 k=4 k=5 k=7 k=9 1 0.2 0.4 0.6 0.8 Q 17 1 1.2 1.4 3. Design procedure Design example - Input voltage: 380Vdc (output of PFC stage) - Output: 24V/5A (120W) - Holdup time requirement: 17ms - DC link capacitor of PFC output: 100uF PFC DC/DC ID Q1 Ip VDL CDL Vd Q2 Np:Ns Llks Llkp Im - Lm Ids2 18 VO + Cr Ro 3. Design procedure [STEP-1] Define the system specifications 9 Estimated efficiency (Eff) 9 Input voltage range: hold up time should be considered for minimum input voltage Vin min = VO. PFC 2 − 19 2 PinTHU CDL 3. Design procedure [STEP-2] Determine the maximum and minimum voltage gains of the resonant network by choosing k ( k = Lm / Llkp ) - it is typical to set k to be 5~10, which results in a gain of 1.1~1.2 at fo M M min max VRO Lm + n 2 Llks Lm + Llkp k + 1 = max = = = Vin Lm Lm k 2 Vin max min = min M Vin Gain (M) Peak gain (available maximum gain) 1.36 Mmax for Vinmin 1.14 Mmin M= k +1 = 1.14 k fo 20 for Vinmax fs 3. Design procedure [STEP-3] Determine the transformer turns ratio (n=Np/Ns) Vin max n= = ⋅ M min N s 2 (Vo + VF ) Np [STEP-4] Calculate the equivalent load resistance (Rac) 8n 2 Vo 2 Rac = 2 π Po 21 3. Design procedure [STEP-5] Design the resonant network - With k chosen in STEP-2, read proper Q from gain curves k = 7 , M max = 1.36 peak gain = 1.36 × 110% = 1.5 22 3. Design procedure [STEP-6] Design the transformer - Plot the gain curve and read the minimum switching frequency. Then, the minimum number of turns for the transformer primary side is obtained as N p min = 23 n(Vo + VF ) 2 f s min ⋅ ΔB ⋅ Ae 3. Design procedure [STEP-7] Transformer Construction - Since LLC converter design results in relatively large Lr, usually sectional bobbin is typically used - # of turns and winding configuration are the major factors determining Lr - Gap length of the core does not affect Lr much - Lp can be easily controlled with gap length Np=52T Ns1=Ns2=6T Bifilar Design value: Lr=234uH, Lp=998uH 24 3. Design procedure [STEP-8] Select the resonant capacitor I Cr 25 RMS π Io n(V + 2 ⋅ VF ) 2 ≅ [ ] +[ o ] 2 2n 4 2 f o Lm 2 VCr max Vin max 2 ⋅ I Cr RMS ≅ + 2 2 ⋅ π ⋅ f o ⋅ Cr 4. Conclusion Using a fundamental approximation, gain equation has been derived Leakage inductance in the secondary side is also considered (L-L-L-C model) for gain equation L-L-L-C equivalent circuit has been simplified as a conventional L-L-C equivalent circuit Practical design consideration has been presented 26 Appendix - FSFR-series Variable frequency control with 50% duty cycle for half-bridge resonant converter topology High efficiency through zero voltage switching (ZVS) Internal Super-FETs with Fast Recovery Type Body Diode (trr=120ns) Fixed dead time (350ns) Up to 300kHz operating frequency Pulse skipping for Frequency limit (programmable) at light load condition Simple remote ON/OFF control Various Protection functions: Over Voltage Protection (OVP), Over Current Protection (OCP), Abnormal Over Current Protection (AOCP), Internal Thermal Shutdown (TSD) 27 Appendix - FSFR-series demo board 28 Appendix - FSFR-series demo board 29
