HALF-CYCLE CONTROL OF
THE PARALLEL RESONANT CONVERTER
OPERATED AS A HIGH POWER FACTOR RECTIFIER
Jiatian Hong, Dragan MaksimoviC, and Robert Erickson
Iftikhar Khan
Power Electronics Group
Department of Electrical and Computer Engineering
University of Colorado, Boulder, CO 80309-0425
Technology Development
Delco Remy Division
General Motors Corp.
Anderson, IN 46018-9986
Abstract - A half-cycle control technique for the parallel resonant converter operated as a high power factor rectifier is introduced in this paper. Switching of
the bridge power transistors is determined such that
the bridge input current averaged over half switching cycle exactly follows the reference proportional to
the input voltage. Zero-current switching and belowresonance operation are guaranteed, while control of
the input current is the fastest possible, regardless
of the operating point. In contrast to conventional
regulators, the performance is preserved under both
small and large signal variations, and also for large
variations of the power-stage parameter values. Fast
response, stability and robustness are experimentally
verified on a 1.4kW prototype.
1
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Ge+=l
Introduction
The parallel resonant converter (PRC) shown in Fig. 1 has
been successfully applied to low-harmonic rectification [l]. At
the power level of several kW, insulated-gate bipolar transistors (IGBTs) are usually preferred over other types of semiconductor switching devices. When the PRC power stage is
operated below resonance, the power switches are turned off
a t zero current, so that switching losses associated with the
current-tailing phenomenon of the IGBTs are removed. This
opens the possibility of operating the bridge with IGBTs a t
switching frequencies in the order of 100kHz.
Another advantage of the PRC topology is that the single
power stage provides transformer isolation, with the transformer leakage absorbed by the resonant tank inductance.
When the parallel resonant converter is operated as a unitypower factor rectifier, the controller adjusts the switching frequency such that the input current ig(t) follows a reference
proportional t o the input voltage v g ( t ) . The design of a conventional controller based on frequency modulation in the
This work was supported in part by Technology Development, Delco Remy Division, General Motors Corporation, Anderson, Indiana.
0-7803-1456-5194 $4.00 01994 IEEE
Figure 1: Parallel resonant converter operated as a highpower factor rectifier.
feedback loop has been demonstrated in [l].
This paper presents an improved controller for the PRCbased rectifier. The proposed half-cycle control scheme is
based on sensing the polarity and evaluating the average of
the bridge input current & ( t ) over each half switching cycle.
The control concept where switching is initiated upon the condition that the cycle-by-cycle average of a signal is equal to
a reference value was described in [2] in a different context.
Similar approaches have been recently reported in [3] for the
control of PWM DC-DC converters, and in [4] for the control
of a PWM flyback high-power factor rectifier.
The half-cycle controller described in Section 2 incorporates the cycle-by-cycle integration technique and, in addition, employs a zero-crossing detection of the bridge input current to ensure zero-current switching and the desired belowresonance operation under all operating conditions, including
large-signal transients. Stability and input dynamics of the
PRC under the half-cycle control are discussed in Section 3.
556
In Section 4, experimental results obtained on a 1.4kW prototype are used t o illustrate the main advantages of the proposed control scheme: the high-power-factor rectification, fast
response independent of operating conditions, and robustness
against large power-stage parameter variations. Conclusions
are given in Section 5 .
2fs
TO SWITCH
DRIVERS
1.1 N o r m a l i z a t i o n and n o t a t i o n
Figure 2: A simplified implementation of the conventional
For the PRC-based rectifier application, a convenient normalization scheme was described in [l].The converter equations
are normalized with respect t o the dc output voltage V . If n
is the transformer turns ratio, the base quantities referred to
the primary side are:
base voltage:
base impedance:
base current:
V / n,
(1)
R, ,
V/nRo,
(2)
controller.
the switching frequency. The toggle flip-flop ( F F ) outputs symmetrical square-wave signals Q and Q - control the bridge
power transistors through transistor gate drivers.
The conventional frequency modulation scheme has several
disadvantages, especially in applications where values of power
stage parameters cannot be precisely controlled and the resonant frequency f o is uncertain. If the switching frequency f S
exceeds fo, the zero-current switching of the IGBTs is lost and
prolonged operation above resonance may result in overheating of the switching devices. Also, the slope of the frequencyto-output characteristic changes polarity close to fs = f,, so
that the above-resonance feedback becomes positive and the
control is lost. To ensure the desired below-resonance operation, a limit on the allowed frequency range is needed, which
is difficult to achieve if the resonant frequency is not precisely
known and fixed.
(3)
where R, = d L r / C r . As usual, switching frequency fs is
normalized to the resonant frequency, F = f s / f o , where fo =
1 / 2 x a . Time 1 is replaced by the angle variable 6' = w,t.
In particular, the length of one half of the switching period is
denoted by y = w0Ts/2 = K I F .
All normalized voltages are denoted by m (for instantaneous
values) or M (for dc, rms or peak values). For example, the
normalized input voltage is m,(t) = M,I sin w i t [ . All normalized currents are denoted by j (for instantaneous values) or J
(for dc, rms or peak values). Ideally, the PRC is controlled
such that the input current z, is proportional to the input
voltage U,, ig(t) = v,(t)/R,, or:
2.2
where Re is the resistance emulated by the rectifier. The desired operating mode where the IGBTs are turned off at zero
current is below resonance, i.e., for 0.5 < F < 1, and for
operating points in the part of the input plane defined by [l]:
2
Half-cycle control of the PRC
Half-cycle c o n t r o l
In the PRC, the input bridge current i b ( t ) is pulsating a t twice
the switching frequency. A low pass filter L F ~C, F is
~ used to
attenuate the high-frequency components in z b ( 1 ) and obtain
the input current zg(t).
The control scheme proposed in this paper is based on sensing the polarity and evaluating the average of the bridge input
current z b ( t ) over each half switching cycle. A simplified implementation of the half-cycle controller is shown in Fig. 3. Inputs
to the controller are the signal proportional to the bridge input current, -R,ib, and the reference signal R,I,,j. R , is the
equivalent current-sense resistance. Outputs are the signals Q
and Q that control the states of the power switches.
Signal q ( t ) in the controller is obtained by integrating ib(1)Ire f :
In this section, the half-cycle control technique is introduced,
after a brief review of the conventional control technique and
its deficiencies.
2.1
Conventional control
A simplified implementation of the conventional control
scheme is shown in Fig. 2 . T h e sensed input current, R,i,,
is compared to the reference signal proportional to the input
voltage, R,I,,f = R,v,/R,. The error is passed through a linear regulator (error amplifier) A ( s ) . Design of the regulator's
transfer function A ( s) in the conventional frequency modulation scheme is based on a small-signal model of the PRC
[l]. The regulator output controls the voltage-controlled oscillator (VCO). The VCO output is a periodic signal at twice
(7)
In (7), it is assumed that time t i s reset to zero, and that q ( 0 ) =
0 at the beginning of each half switching cycle. During normal
operation, switching occurs a t the zero-crossing of q ( t ) , i.e.,
upon the condition that the average of the bridge input current
i b ( t ) is equal to the average of the reference I,,f, evaluated
over one half of the switching period:
As a result, the input current z g ( t ) , which is equal to the
low-frequency component of i b ( t ) , follows the reference. The
557
reference-to-input current frequency response is determined
only by the response of the input low-pass filter.
The hardware implementation of (8) is very simple: zerocrossing of q ( t ) is detected and used to initiate the transistor
switching. In the circuit of Fig. 3, this function is provided
by the comparator COMPl a t the output of the half-cycle
integrator. Unfortunately, the nature of the PRC prevents
such a straightforward application of the control scheme. The
problem is that the solution for T s / 2 in (8) is not unique, and
the PRC could get into one of many undesirable operating
modes [5].
To ensure the operation in the desired below-resonance o p
erating mode, where the transistors turn off a t zero current,
the commutation instants are constrained between the first
and the second zero-crossing of the bridge input current xb(t).
This is accomplished by use of the comparator COMP2 in
Fig. 3 , which serves as a zero-crossing detector for ib(t).
The controller operation can now be described in more details for the three distinct operating conditions.
Normal operation, q(Ts/2)= 0, ib(Ts/2)< 0
Figure 3: Simplified hardware implementation of the halfcycle controller.
i-a
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Typical controller waveforms for a normal operation, when (8)
is satisfied, together with the relevant power-stage waveforms,
are shown in Fig. 4. When q ( t ) crosses zero a t t = T,/2, signal
S1 goes from low to high. Since ib(Ts/2) < 0, signal s2 is high,
and the rising edge of S1 propagates through NAND1 and
NAND2 gates. The rising edge of the toggle signal T initiates
a pulse S3 from the one-shot circuit OS. Finally, S3 triggers
the flip-flop and the power switches are commutated, which
initiates the next half switching cycle. The toggle signal T also
ensures that the integrator is reset t o zero a t the beginning
of the next half cycle. Immediately after the commutation, i b
changes polarity, S2 goes to low, and the toggle signal T goes
to low. The one-shot circuit is used to prevent false triggering
of the flip-flop, which may be induced by the noise generated
a t the switching instant. In particular, the switching noise
can easily produce spurious oscillations at the output S2 of
the zero-crossing detector COMP2, but the circuit operation
is not affected because the one-shot circuit disables the access
to the output flip-flop immediately after the switching.
0.5
Transient, q(Ts/2)< 0, ib(Ts/2)= 0
0
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g
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s1
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n
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1
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0
1
2
3
4
5
6
7
8
9
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Figure 4: Normalized steady-state waveforms during two half
switching cycles for the following operating conditions: m, =
0.7, j, = Jrej= 0.5, F = 0.68. Top to bottom: the resonanttank capacitor voltage m,(O) and the resonant-tank inductor
current j L ( O ) ; the bridge input current jb(0);logic-level signals
in the controller.
558
To show how the controller ensures the desired belowresonance operation, we first consider the case when the reference Jreris abruptly stepped up from the value in Fig. 4.
The transient waveforms during the first two half cycles are
shown in Fig. 5.
At the zero crossing of q ( t ) , i b > 0, 5 2 = 0 and the commutation is disabled. At t = T s / 2 , ab(Ts/2) = 0, and the
signal S2 goes from low to high. Since q(Ts/2) < 0, signal
S1 is high, so that the rising edge of S2 propagates through
the NAND gates and initiates the commutation. Thus, during
the transient, the transistor commutation cannot occur before
the first zero-crossing of the input bridge current, which prevents the operation above resonance. Note that in the next
half switching cycle, commutation occurs a t the zero crossing
of q ( t ) , which means that (8) is satisfied and that the exact
control over the input current is established again.
Transient, q(Ts/2)
> 0,
cl
zb(Ts/2) = 0
n
U
The opposite transient, when the reference is abruptly stepped
down, is illustrated by the waveforms of Fig. 6. We now have
that q ( t ) does not cross zero a t all, which would force the
controller to extend the length of the half cycle, and eventually
take the PRC into an operating point below f0/2. However,
the negative-to-positive (second) zero-crossing of z b ( t ) causes
the signal S 2 to go from high to low. Since q > 0, S1 is low,
so that the falling edge of S2 propagates through the edgedetection circuit C Z ,R2, and the NAND2 gate to initiate the
commutation. Again, the power stage is forced to remain in
the desired operating mode.
It is interesting t o note that in the transient of Fig. 6,
the PRC passes through the discontinuous capacitor voltage
mode, as evident from the tank capacitor voltage waveform.
0
1
2
3
4
5
6
1
0
1
2
3
4
5
6
1
1.4
1.2
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0.6
0.4
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-0.4
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1
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2.3
Z
Practical implementation issues
From the description of the controller operation, it is clear
that all deficiencies of the conventional controller have been removed. Fast control over the input current is established, and
the PRC is forced to operate in the desired operating mode
always. Zero-current switching of the IGBTs is ensured. This
is all achieved regardless of the power stage parameter values,
and with no need for tuning of the controller’s parameters.
In a practical implementation, the one-shot pulse width is
selected to be smaller than the minimum expected length of
one half cycle, but longer than the length of the switching
transient when the generated noise can adversely affect the
operation. The function of the one shot is similar to the suppression of current spikes immediately after the switching in
current-mode controlled PWM converters. The current-sense
resistance R, and the integrator time constant RlCl are selected so that signals at the comparator inputs are well above
the comparator input offset voltages. The edge-detector time
constant R2C2 should be as small as possible, but long enough
so that the detection of the falling edge of S 2 through N A N D 2
is reliable.
Q
$
s3
2
52
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,
s1
0
I
11
I,
2
3
4
I
5
6
1
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Figure 5 : Normalized waveforms during the first two half
cycles after the reference is stepped up from J,,r = 0.5 to
J,,r = 1. Other operating conditions are the same as in Fig. 4.
I
2 ,
-1
0
2
4
6
8
10
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4
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8
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Stability and input dynamics of the half-cycle
controlled PRC
During the normal operation, switching transitions in the
half-cycle controlled PRC are determined by the zero-crossing
instants of the state variable y ( t ) . Therefore, a possibility
that steady-state trajectories exhibit instabilities observed in
other constraint-modulated switching power converters must
be investigated. One well-known example of the considered
type of instability is the period-doubling in current-mode programmed PWM converters.
To investigate local stability properties of the steady-state
trajectories of the half-cycle controlled PRC, we start with
a given steady-state solution for the normalized, “fast” state
variables: the tank capacitor voltage m c ( 0 ) ,the tank inductor current j ~ ( 0 ) and
,
the integrator output y(0). Using the
I
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E
cl
8
n
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52
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51
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0
1
2
7
4
I
6
8
I
I
I
10
Figure 6: Normalized waveforms during the first two half
cycles after the reference is stepped down from J,,r = 0.5 to
J,,f = 0 . 3 . Other operating conditions are the same as in
Fig. 4.
559
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1
1.5
2
2.5
3
3.5
4
4.5
Figure 8: Input-side, low-frequency model of the half-cycle
controlled PRC. For the rectifier application, Ires = ug/Re.
The main result is that the eigenvalues of K are inside the
unit circle, i.e., that the steady-state trajectories are locally
stable for all operating points, in the part of the input plane
given by (5,6). Stability established above implies that the
perturbed state trajectories asymptotically converge to the
steady-state trajectories if the perturbations are sufficiently
small. Once the stability above is established, interactions
between the “slow” state variables of the input and the output filter, and the “fast” state variables can be studies using
the small-signal model of the PRC [l, 71, where the sign$
8, proportional to the switching frequency perturbation fs
becomes a dependent variable found from the condition that
i b = &,f.
Largesignal stability properties follow from the fact
that the half-cycle controller ensures operation of the PRC in
the region where the steady-state solution exists and is unique.
3.1
Figure 7: Steady-state and perturbed waveforms of the state
variables during one half cycle. Topto-bottom: tank inductor
current j ~ j~,
j L ; tank capacitor voltage m,, mc
h,;
half-cycle integrator output q, q 4. Steady-state operating
conditions are the same as in Fig. 4.
+
+
+
Input d y n a m i c s of the PRC under the half-cycle
control
Under the half-cycle control, the low-frequency input dynamics of the PRC can be modeled as shown in Fig. 8. From
(8),
-Eb = s;
closed-form steady-state results for the PRC [l, 61, the trajectories can be found a t any given operating point specified
by the values of “slow)’ variables: the input voltage mg, the
input current j g = Jref, and the output current J.
Assuming that the input voltage, reference, and the output
current are constant, the “fast” state variables are perturbed
at the beginning of the half switching cycle. The perturbations
j L , hc are propagated to the end of the half cycle, taking
into account that the condition for the end of the half cycle
is determined by zero-crossing of the integrator’s output in
the one-cycle controller, q(0) = q ( y ) = q ( y 9 ) = 0. This
is illustrated in Fig. 7, which shows the steady-state and the
perturbed trajectories, as well as the definition of the statevariable perturbations.
Small perturbations a t the beginning of a half-cycle are related to the perturbations at the end of the half cycle through
lTai2
ia(r)dr = s;
I””
I r e f ( r ) d rz5 Irer(t),
(10)
assuming that the reference current is slowly varying during a
half switching cycle. Therefore, the input to the PRC bridge
can be modeled simply as an ideal current source controlled
by the reference signal Irej.
Complicated dynamics of the PRC completely disappear
from the input side, so that the reference-to-input current dynamic response is determined entirely by the response of the
linear input filter,
+
(9)
where elements of the matrix K can be found in terms of the
steady-state operating conditions.
560
In the rectifier application, Irer = v g / R e ,and the model of
Fig. 8 can be used to design the input filter. The input-filter
damping [l]is necessary in order to supress the oscillatory
response in the input current ig(t) at the zero-crossings of the
input line voltage.
4
Experimental verification
An experimental 1.4kW PRC-based rectifier with the halfcycle controller is shown in Fig. 9. Design of the power stage
Q
Q
L
L
',
Q
LOAD
Q iZ
Figure 9: Experimental, half-cycle controlled 1.4kW PRCbased rectifier. The half-cycle controller block is shown in
Fig. 3.
Figure 10: Experimental details of the steady-state operation of the half-cycle controlled PRC. Top to bottom: 1) halfcycle integrator output q ( t ) , 2) tank inductor current i L ( t ) ,
20A/div, 3) signal S2, 4) signal SI. Conditions: fb = 55.3kHz,
Vg= 12OVdc, I , = 10.9Adc, V = 270Vdc, I = 4.4Adc.
has been discussed in detail in [l].The half-cycle controller is
shown in Fig. 3.
Reference signal R,I,,f is proportional to the input voltage,
R,I,,f = R,v,/R,.
Emulated resistance R,, and therefore
power level, are adjusted in an open-loop manner. Closedloop regulation of the output DC voltage can be added easily.
A small current transformer CT in series with the transformer primary is used to sense the tank inductor current ZL.
We note that
ib=
{
ZL,
-aL
when
, when
Q= 1,Q=0
Q =O,Q= 1
(12)
so that the signal
-&ib
proportional to the bridge input current can be easily reconstructed using four analog switches
controlled by the same signals Q and Q that control the main
power switches.
Compared to the use of a sense resistor in series with the
power bridge, this current-sensing technique is preferred for
several reasons. First, a sense resistor would inevitably introduce a parasitic series inductance, which would contribute to
increased voltage spikes across the bridge, and increased noise
in the sensed current. With the current transformer sensing
the tank inductor current, a low-esr filtering capacitor CFI
can be placed right across the power transistor modules. The
noise in the sensed signal is lower, and power loss on the sense
resistor is eliminated.
4.1
Experimental results
Comprehensive experiments have been performed to evaluate
performance of the half-cycle controlled PRC-based rectifier.
Fig. 10 shows several periods of the steady-state operation
of the controller, when the converter is supplied from a DC
Figure 11: Magnitude (10dB/dZv) and phase (45"ldZv) response of i g / i r e f . a) fs = 50kHz, v, = 50Vdc, I , = 2.9Adc,
V = SOVdc, I = 1.4Adc; b) f, = 68kHz, V, = 10Vdc,
I , = 2.9Adc, V = SOVdc, I = 0.2Adc.
561
line current, when the converter is operated as a high-powerfactor rectifier. In Fig. 12(a), the resonant tank inductor has
its nominal inductance value, while in (b) the resonant-tank
inductance is reduced t o 70% of its nominal value. Approximately the same performance has been achieved with no adjustments needed in the controller.
1
5
3
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f ....
/
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Conclusions
The half-cycle controller for the PRC-based rectifier has several important advantages. Zero-current switching and belowresonance operation are guaranteed, while control of the input current is the fastest possible, regardless of the operating
point. The controller adapts automatically t o the parameters of the power stage and is robust against wide parameter
variations. Unlike conventional regulators, where regulator
parameters must be carefully selected in relation t o the power
stage dynamic response, there are essentially no parameters
to adjust in the half-cycle controller, yet its performance is
preserved under both small and large signal perturbations, up
to saturation conditions.
The proposed control technique has been experimentally
verified on a 1.4kW PRC-based high power factor rectifier.
References
2
[l] J. Hong, E. Ismail, R. Erickson, and I. Khan, “Design of
the parallel resonant converter as a low harmonic rectifier,” Proceeding of the 1993 IEEE APEC, pp. 833-840,
San Diego, March, 1993.
[2] F. C. Schwarz, “An improved method of resonant current
pulse modulation for power converters,” IEEE PESC, 1975
record, pp. 194-204.
4
[3] K. M. Smedley and S. Cuk, “One-cycle control of switching
converters,” IEEE PESC, 1991 Record, pp. 888-896.
Ch4
lOOmV
Figure 12: Experimental waveforms of the input ac line voltage (top, 100V/div) and the input ac line current (bottom,
10A/div). a ) nominal tank inductance, V, = 119.8Vrms,
V = 253.5Vdc, I = 4.3Adc; b) 70% tank inductance, V, =
118.3Vrms, V = 271.9Vdc, I = 4.4Adc.
power source. Measured waveforms can be compared to the
ideal waveforms of Fig. 4. Figs. l l ( a , b ) show measured magnitude and phase response of the reference-to-input current
transfer function i,/i,.,f when the converter is supplied from
a DC voltage source, for two different operating points. Note
that the response is almost exactly the same, which illustrates
the point that the control-loop performance is the same regardless of the operating conditions. Also, one can easily verify that the obtained frequency response is in fact equal to the
frequency response of the input filter, H F ( ~ w=) i 9 / i b , which
verifies the validity of the model in Fig. 8 for a wide range of
frequencies, up to f d / 2 .
Figs. 12(a,b) show measured AC line voltage and the AC
[4] W. Tang, Y. Jiang, G. Hua, F. C. Lee, and I. Cohen,
“Power factor correction with flyback converter employing
charge control,’’ Proceeding of the 1993 IEEE APEC, pp.
293-298, San Diego, March, 1993.
[5] R. Oruganti, F. C. Lee, “State-plane analysis of parallel
resonant converters,” IEEE PESC, 1985 Record, pp. 5673.
[6] S. D. Johnson and R. W. Erickson, “Steady-state analysis and design of the parallel resonant converter,” IEEE
PESC, 1986 Record, pp. 154-165.
[7] A. Witulski, A. Hernandez, and R. Erickson, “Small-signal
equivalent circuit modeling of resonant converters,” IEEE
Transactions on Power Electronics, January 1991.
562