Analysis and Design of Analog Integrated Circuits
Lecture 4
Small Signal Modeling of CMOS Transistors
Michael H. Perrott
February 1, 2012
Copyright © 2012 by Michael H. Perrott
All rights reserved.
M.H. Perrott
Lecture 3 Discussed Large Signal Calculations

In analog circuits, we are often focused on amplifiers in
which the small signal behavior is of high importance
- Large signal calculations lead to the operating point
information of the circuit which is used to determine the
small signal model of the device

Example amplifier circuit:
Small Signal Analysis Steps
ID
RD
1) Solve for bias current Id
RG
vout
vin
Vbias
M.H. Perrott
RS
2) Calculate small signal
parameters (such as gm, ro)
3) Solve for small signal response
using transistor hybrid-π small
signal model
2
A Key Design Parameter is the Sizing of Devices
W
M1
W
L

L
The designer is generally free to choose the width (W)
and length (L) of the device
- Wider width is often chosen to achieve higher channel
current for a given gate bias voltage
- Longer length is often avoided since it lowers the channel
current and decreases the operating speed of the device
 The minimum length for the gate is often used to define the
process name (i.e., 0.18u CMOS or 0.13u CMOS)
 Longer length is used in cases where better matching or
high resistance is desired
M.H. Perrott
3
MOS DC Small Signal Model (Saturation Assumed)
ID
RD
RD
RG
RG
vgs
gmvgs
ro
-gmbvs
RS
vs
RS
gm = μnCox(W/L)(VGS - VTH)(1 + λVDS)
= 2μnCox(W/L)ID (assuming λVDS << 1)
gmb =
γ gm
2 2|ΦF| + VSB
where γ =
2qεsNA
Cox
In practice: gmb = gm/5 to gm/3
ro =

1
λID
How do we model if device is in the triode region?
M.H. Perrott
4
CMOS Devices Also Have Capacitance
Top View
Side View
ID
E
VGS
G
Cov
S
D
Cov
Cgc
Ccb
S
W
Cjsb
LD
B
E
D
Cjdb
LD
L
E
junction bottom wall
cap (per area)
L
source to bulk cap: Cjsb =
drain to bulk cap: Cjsd =
Cj(0)
ΦB
1 + VSB
Cj(0)
1 + VDB
ΦB
overlap cap: Cov = WLDCox + WCfringe
WE +
junction sidewall
cap (per length)
Cjsw(0)
ΦB
1 + VSB
WE +
Cjsw(0)
1 + VDB
ΦB
(W + 2E)
(make 2W for "4 sided"
perimeter in some cases)
(W + 2E)
gate to channel cap: Cgc =
channel to bulk cap: Ccb - ignore in this class
M.H. Perrott
VD>ΔV
2
C W(L-2LD)
3 ox
5
MOS AC Small Signal Model (Device in Saturation)
RD
RG
ID
RD
Cgd
vgs
RG
Cgs
gmvgs
-gmbvs
ro
Cdb
Csb
RS
vs
Cgs = Cgc + Cov =
RS
2
C W(L-2LD) + Cov
3 ox
Cgd = Cov
M.H. Perrott
Csb = Cjsb
(area + perimeter junction capacitance)
Cdb = Cjdb
(area + perimeter junction capacitance)
6
Small Signal Modeling Strategy

We will focus on the DC Small Signal Model first
- This will allow us to calculate the gain of amplifiers
- This will also allow us to derive Thevenin resistances
 We will later combine this information with the capacitors
within the AC Small Signal Model to estimate frequency
response information

Homework 1 should have revealed to you how clumsy
the DC Small Signal Model can be in calculations
- We need a more streamlined approach
 Strategy: give up general approach, and focus on
achieving a simpler model that fits a large number of
circuit topologies that we will encounter
M.H. Perrott
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Thevenin Modeling of CMOS Transistors
Hybrid-π Model
Rthd
RG
g
Key Small-Signal Parameters
RD
d
Parameter
gm
Rthg
vgs
gmvgs
-gmbvs
s
vs
RS
2μnCox(W/L)ID
ro
gmb
Rths
Strong Inversion
ro
γ gm
Weak Inversion
qID
nkT
2 2|ΦF| + VSB
(n-1)qID
nkT
1
λID
1
λID
We will discuss weak inversion
(i.e., subthreshold region) later


Use the Hybrid- model of transistor to calculate
Thevenin resistances at each transistor node
Use these Thevenin resistance calculations for many
circuit topologies that we encounter
M.H. Perrott
8
Thevenin Resistance Expressions
Hybrid-π Model
Rthd
RG
Key Small-Signal Parameters
RD
g
d
Parameter
gm
Rthg
vgs
gmvgs
-gmbvs
s
vs
Note: gmb = 0
if RS=0 or Vsb=0
RS
Thevenin Resistances
Exact
Rth = ro (1+(gm+gmb)RS)+RS
d
ID
RG
g
Rthg
Rthd
d
Rth = (1+RD /ro ) (ro
s
1
)
gm+gmb
Approximation
(gmb << gm, gmro >> 1)
s
Rths
RS
M.H. Perrott
Rthg= infinite
RD
Rthd= ro (1+gmRS)
Rthg= infinite
1 + RD /ro
Rth =
gm
s
2μnCox(W/L)ID
ro
gmb
Rths
Strong Inversion
1
(RD<< ro )
gm
ro


Weak Inversion
qID
nkT
γgm
(n-1)qID
2 2|ΦF| + VSB
nkT
1
λID
1
λID
Thevenin resistances
useful for many
calculations
It would be nice to
replace Hybrid-
model with a simpler
alternative
9
Replace Hybrid- Model with Proposed Thevenin Model
Hybrid-π Model
Rthd
RG
Key Small-Signal Parameters
RD
g
d
Parameter
gm
Rthg
vgs
gmvgs
-gmbvs
ro
s
vs
RS
Thevenin Resistances
Note: gmb = 0
if RS=0 or Vsb=0
RD
RG
g
Rthg
Rthd
d
2 2|ΦF| + VSB
nkT
1
λID
1
λID
g
d
s
Rths
is
Rths
1
)
gm+gmb
Rthg vg
Avvg
Approximation
(gmb << gm, gmro >> 1)
RS
M.H. Perrott
Rths= (1+RD /ro ) (ro
(n-1)qID
Proposed Small Signal Transistor Model
Rthd= ro (1+(gm+gmb)RS)+RS
ID
γ gm
ro
Exact
Rthg= infinite
Weak Inversion
qID
nkT
2μnCox(W/L)ID
gmb
Rths
Strong Inversion
Rthd= ro (1+gmRS)
Exact
Rth = infinite
g
1 + RD /ro
Rth =
gm
s
Av = gmro
1
(RD<< ro )
gm
α is
Rthd
s
Approximation
gm
gm+gmb
α = 1+RD /Rthd
Av = 1 (gmb<<gm, gmro>>1)
α = 1 (RD<<Rthd)
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Key Things to Know About the Proposed Thevenin Model
Thevenin Resistances
Proposed Small Signal Transistor Model
Exact
Rth = ro (1+(gm+gmb)RS)+RS
d
RD
ID
RG
g
Rthg
Rthg= infinite
Rthd
d
d
s
Rths
is
Rths
1
)
gm+gmb
Rthg vg
Avvg
Approximation
(gmb << gm, gmro >> 1)
RS

Rths= (1+RD /ro ) (ro
g
Rthd= ro (1+gmRS)
Exact
Rthg= infinite
1 + RD /ro
Rths=
gm
Av = gmro
1
(RD<< ro )
gm
α is
Rthd
s
Approximation
gm
gm+gmb
α = 1+RD /Rthd
Av = 1 (gmb<<gm, gmro>>1)
α = 1 (RD<<Rthd)
This model may be generally applied in cases where the
transistor is in saturation and where there is not strong
interaction between the transistor terminals
- Works well for open loop amplifier stages which will be our
initial focus

Proposed model is not commonly taught – I developed it
M.H. Perrott
11
A General View of Signal Flow in an Open Loop Device
Vin,d
ID
RG
RD
d
g
Vd
M1
M1
Vs
s
gate signal impacts
source and drain
RS
Vin,g
RG
Vin,s
is
Rths
g
Rthg
source signal impacts
drain
vg
d
α is
Avvg
Rthd
RD
vd
s
vin,g
vin,d
RS
vs
vin,s

To first order, influence of signals go from gate to
source or from gate and/or source to drain
- This is only true when the device is in saturation
M.H. Perrott
12
Example: Small Signal Analysis of Amplifier Circuit
RD
Vout
RG
Vin

Key device characteristics
that must be known:
M1
For gm, ro: W, L, nCox, 
RS
For gmb: gm, , F, VSB
First step: determine the operating region of transistor
For triode region, approximate channel as a resistance
 Id will usually be set primarily by drain and source network
For subthreshold region, approximate channel as open
 Later on, we will take a more accurate view of this
For saturation region, use proposed Thevenin model
 Id will usually be set by gate voltage and source network
(i.e., resistance and voltage)
 Small signal parameters (gm, ro, etc.) can be calculated
once Id is known
-
M.H. Perrott
13
Substitute Proposed Thevenin Model (Assumes Saturation)
RD
Vout
RG
M1
Vin
RS
M1
RG
vin
Rthg
is
Rths
g
vg
d
α is
Avvg
Rthd
RD
vout
s
RS

Notice that all voltages and currents can be calculated
without requiring simultaneous equations!
M.H. Perrott
14
Reduce to Two-Port
RG
RD
Vout
RG
M1
Vin
vin
vg
Rthg
Rthd
Gmvg
RD
vout
RS
M1
RG
vin
Rthg
is
Rths
g
vg
d
α is
Avvg
Rthd
RD
vout
s
RS

Calculation of Gm:
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Detailed Example
1.3V
100Ω
Vin
Vbias= 0.65V



M1
10kΩ
Vout
13u
0.13u
Assumptions:
nCox = 50A/V2, VTHn = 0.5V
 = 1/(10V),  = 0
100Ω
Determine operating point conditions
- Transistor operating region, I
d
Determine small signal parameters of transistor model
- If transistor is in saturation, this is g , r , etc.
m
o
Determine gain of amplifier
M.H. Perrott
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