Subject: Differential Gain and Phase for Composite Video Systems (CVS)
A critical performance characteristic for composite video systems (CVS) relates to
how well each device in the signal path maintains a constant small signal gain and
phase for the relatively low level color carrier at 3.58MHz as the brightness (or
luminance) signal is ramped through its allowed range. This is often specified as the
differential gain and phase.
Figure 1 shows a typical composite video signal. The low frequency ramping shown
in the test signal controls the brightness of the picture, while the 3.58MHz color
carrier (or chrominance signal) riding on top of this controls the color. The amplitude
of this carrier controls the color saturation while the phase shift of the carrier
relative to the color burst sync controls the hue. Any non-linearities in a device's gain
or phase response as the luminance level is changed will show up as a distortion in
the picture color. Note that the amplitudes shown on Figure 1 are those required at
the load end of a doubly terminated 75Ω transmission line.
An amplifier's output DC level can have a profound effect on its small signal response.
This is especially true for composite video signals when several parallel doubly
terminated 75 ohm loads are driven from a single amplifier output causing the
current to vary widely over the luminance range. The CLC2000 and CLC4601 are
especially suited for driving multiple loads.
Differential gain can be defined as either the maximum percentage change in
chrominance gain from the luminance black level to its white level or the
peak-to-peak percentage gain change over the same luminance range. The
peak-to-peak percentage gain change shall be used here.
Differential phase can be defined as either the maximum change in phase shift
through a device, in degrees, from the luminance black level to its white level, or the
peak-to-peak phase shift change over the same luminance range. The peak-to-peak
change in degrees shall be used here.
Conceptually, the gain and phase response through an amplifier element at the
chrominance frequency and amplitude is measured as the luminence, or output DC
level, is ramped from its black level, typically 0 volts, to its white level, typically .7
volts. The peak-to-peak variation in the measured gain and phase is taken as the
differential gain and phase of the device under test.
Although the perceptible level for differential gain and phase errors are well over the
1% and 1° levels, respectively, the cumulative errors of cascaded video channel
devices are calling for individual amplifier errors to be well below the perceptible
level. The traditional means of measuring differential gain and phase using a vector
scope and/or waveform monitor allow measurements to be made down to
approximately the .2% and .1° level. This level of resolution is inadequate for
amplifiers intended for today's higher performance test and video distribution
equipment. An alternative means of measuring this critical performance parameter
using a common network analyzer will be described.
Differential Gain and Phase Measurements Using a Network Analyzer
Using the self-calibration feature commonly available in network analyzers,
exceptionally fine resolution of gain and phase changes from a reference trace can
be determined. Figure 2 shows the overall test configuration that can be used to
measure several video amplifiers for differential gain and phase. Although a
Hewlett-Packard 4195 spectrum/network analyzer was used to perform these
measurements, as well as specific splitters, attenuators, and reflection/transmission
test set, equivalent hardware can be configured to achieve the same result would, of
course, be acceptable. The stand-alone programming capability of the HP4195,
especially for the built-in DC bias source, make it particularly suitable for differential
gain and phase testing. The 4195 has the capability of using the internal DC bias
source as the independent variable for setting up its display trace, precisely the
capability required for these tests.
Figure 3 shows a typical configuration for the Device Under Test (DUT). The end goal
for setting up the DUT stimulus is to generate at the output pin of the amplifier a 0
to 1.4V low-frequency ramp with a .56Vpp 3.58MHz sine wave riding on top of it. This
will generate the amplitudes of Figure 1 at the load if we were driving a doubly
terminated line. The peak-to-peak change in gain and phase for S21 measured over
the DC input sweep, when corrected by a reference trace taken with the DUT
replaced by a short, will yield a measure of the differential gain and phase.
Note that although the test waveform of Figure 1 shows an entire luminance
staircase sweep from white to black in less than 63µsecs, the 4195 will generate a
considerably slower sweep to allow adequate S21 measurement time at each DC
voltage setting. In doing the test this way, we are assuming that no additional device
limitations will be encountered in increasing the luminance rate of change to that
required by the most demanding video signals. This translates into a requirement for
excellent amplifier pulse response which in turn implies adequate slew rate and
broadband frequency response flatness (to limit pulse overshoot and ringing). An
assessment of an amplifier's pulse response should be made independently to
confirm that its response to slowly varying luminance levels is representative of that
to the most rapidly varying signal.
Returning to Figure 2, each element of the test configuration will be described. Since
we need to make a network analyzer measurement of a forward transmission
characteristic, an S21 measurement, a reflected wave measurement must be made
using a reflection/transmission test set. Many network analyzers have this built into
their S-parameter test set. To minimize the reflected signal, a good 50Ω match is
desired looking out of the R/T test set. Hence, the DC source and the DUT input are
made to look like 50Ω on the other side of the power combiner. To minimize any
receiver DC sensitivity, AC coupling is used to isolate the RF measurement paths.
A CADEKA video amplifier is used to buffer the programmable DC source for two
reasons. First, the source by itself does not have the current capability to drive the
100Ω load over the needed voltage range and, secondly, the amplifier provides a
more well-defined AC source impedance looking back into its output than the DC
control output of the HP4195.
The power combiner provides a means of adding the desired AC and DC signals while
maintaining a 50Ω matched environment. There is a 6dB loss for the AC signal
through the splitter to the 50Ω DUT input impedance. With the AC coupling present
at the 3.58MHz signal input to the splitter, there is, however, only a 3dB loss for the
DC signal from the 4195 DC output pin to the 50Ω DUT input. Note that with the
CADEKA buffer video amplifier set up for a gain of 6dB, there is a net gain of 0dB
from the CADEKA amplifier input to the splitter input and then a 3dB loss from there
to the DUT input.
Turning now to Figure 3, the non-inverting input impedance is set to 50Ω to provide
good matching to the power combiner output. For the low gain amplifier parts
tested, the gain is set to +2 with Rf = Rg and the input attenuator is not required. For
the higher gain parts, operated at a linear gain of +20 (10X the low gain), a 20dB
attenuator is used with the same DC sweep voltages and RF signal power to achieve
the desired sweep at the output. The desired test voltage swings shown on Figure 3
at the output of the amplifier are double those shown on Figure 1 to account for the
6d8 loss seen at the load in driving doubly terminated video transmission lines. The
100Ω series output resistor into the 50Ω 14dB attenuator provides the single load
case of 150Ω while providing a good 50Ω source impedance to the network analyzer
receiver input. Additional loading is simulated by connecting parallel 150Ω resistors
to ground directly on the amplifier's output pin.
To make a differential gain and phase measurement for a particular part type, the
DUT (including the 100Ω series output resistor, the input attenuator, and the 50Ω
termination) is replaced by a short. Multiple DC voltage sweeps are then taken with
the measured gain and phase averaged to develop a reference gain and phase
flatness for the test configuration without the DUT in place. Replacing the DUT into
the circuit and averaging multiple gain and phase measurements over the DC voltage
sweep and subtracting the reference trace data from this will yield the gain and
phase flatness for the device. Note that the absolute measured S21 will change going
from the calibration to the DUT due to the 100Ω series output resistor. The absolute
measured phase will also change due to the increased path length with the DUT in
place. Except for non-linearities in the receiver, this won't matter since we are really
only looking at the deviation from flatness for the corrected gain and phase
measurements.
After performing the calibration, an example of which appears in Figure 4 with the
gain shown in dB, a corrected measurement for the same short will yield a measure
of the system resolution. This appears on Figure 5 and shows an approximate gain
flatness resolution of .008% and a phase flatness resolution of .005°. These numbers
result from taking twice the peak-to-peak variation shown in Figure 5 as an
approximate measure of resolution. Note in Figure 4, the uncorrected calibration
sweep, that while the gain appears fairly constant over the DC sweep, there is a
relatively significant phase change of almost .02°. One possible source for this would
be the slight change in the impedance matching looking into the DC bias source out
of the splitter, causing a slight change in the phase shift through the splitter. At any
rate, using this data to correct the DUT measured data improves the resolution to
the levels listed above. These resolution levels are considerably better than those
achievable with a vector scope or a waveform monitor.
Figure. 4
Figure. 5
Measurement Results
Many amplifiers in CADEKA's product line seem particularly appropriate for
composite video distribution (CLC2000, CLC2005, CLC4601, etc.). All of the products
would actually show excellent differential gain and phase response at the 3.58MHz
color carrier due to their exceptionally broad bandwidth and symmetric topologies.
(Most devices utilize a Class AB output stage yielding excellent distortion relative to a
Class A stage.)
The parts selected for testing included three generic low cost/size CADEKA
monolithic video parts. The DUT topologies used and the gain and phase plots vs. DC
voltage for no additional loading attached (representing a single 150Ω load) are
shown in Figures 6 through 10. The required stimulus levels for all of these tests was
a DC sweep from 0 to .98V and an RF level = 7.8dBm. Both of these must be doubled
to generate the desired output levels. The CADEKA DC buffer amplifier shown in
Figure 2 will need to be run with +6V positive supply to accommodate the + 4V
output swing required for the amplifier test. Although not shown on the DUT
drawings, each test circuit included the recommended supply decoupling elements
shown on that part's data sheet.
Figure. 6
CADEKA monolithic voltage feedback video amplifiers optimized for low gain,
showed the best overall differential gain and phase. With a single 150Ω load, the
peak-to-peak gain variation was .03% while peak-to-peak phase variation was .02°.
These are well above the system resolution levels but would present a considerable
challenge measurement to a vector scope and/or a waveform monitor.
Figure. 7
Some CADEKA monolithic current feedback video amplifiers are optimized for higher
gains. Tested at a linear gain of +20, a 20dB attenuator is required to use the same
stimulus levels into the DUT to produce the desired output swing. At a load of 1500,
the peak-to-peak gain variation was .02% while peak-to peak phase variation
was .11 °.
Figure. 8
CADKEA also has monolithic unity gain buffer amplifiers with exceptional bandwidth
and pulse response. The stimulus levels used for them were doubled, both AC and
DC, since this DUT has one-half the gain of a traditional video amplifier. With the
nominal test load of 150Ω, the peak-to-peak gain variation was .17% while the
peak-to-peak phase variation was .01 °. Compared to a traditional CADEKA video
amplifier, this part offers better differential phase but poorer differential gain
performance.
Figure. 9
CADEKA also has hybrid multichip module amplifiers optimized for low gains (KH231,
etc.). They also have the capability of operating at supplies down to ± 5V with almost
full AC performance. It was anticipated that the higher slew rate and output current
capability of this hybrid part would enhance performance.
Figure. 10
Operating the KH231 at its recommended ±15V supplies, being careful to remove the
shorts to the Iadj pins, yields excellent performance. At the nominal load of 150Ω,
peak-to-peak gain variation was .03% and peak-to-peak phase variation was .08°.
This compares very well to other amplifiersand may actually offer better
performance for very high-speed luminance signals due to the higher slew rate
offered by the KH231. All of the parts tested here offer slew rates in excess of
400VIµsec as well as excellent high-speed pulse fidelity. Increasing the luminance
staircase rate to that used in actual composite video signals should have no effect on
the differential gain and phase performance.
When designing a high speed video amplifier circuits, it is important to simply break
down the system into the various functional blocks that make up the system and
address each performance limiting factor. Depending on the overall system
specification, such component versus signal bandwidths, and linearity versus noise
requirements, these numbers will determine many of the required analog
performance specifications of the system including simple layout geometries,
amplifier bandwidths, slew rates, and required gains. The number one thing is to
remember that every node in a circuit has some type of component connected to it
and it is also both an input and an output in some way. Understanding the positive
and adverse effects of this single concept will greatly enhance your ability to design
the system.
Kai ge from CADEKA
(www.cadeka.com)